Paolo Bonzini 3060e9b93b treewide: replace qemu_hw_version() with QEMU_HW_VERSION ...

The version is never set on 2.5+ machine types, so qemu_hw_version() and
qemu_set_hw_version() are not needed anymore.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2026-03-25 18:22:27 +01:00

..

alpha

target/alpha: Reset CPU

2026-02-27 14:48:04 +01:00

arm

target/arm: fix s2prot not set for two-stage PMSA translations

2026-03-24 14:02:29 +00:00

avr

target/avr: Build 'gdbstub.c' once for system single binary

2026-02-26 00:02:14 +01:00

hexagon

target/hexagon: use TCG_COND_TSTEQ/TSTNE for predicate branches

2026-03-20 07:43:03 -07:00

hppa

target/hppa: Always map 64-bit firmware at 0xfffffff0f0000000

2026-03-19 22:06:49 +01:00

i386

tdx: fix use-after-free in tdx_fetch_cpuid

2026-03-25 18:22:27 +01:00

loongarch

gdbstub: Remove @g_pos argument in gdb_register_coprocessor()

2026-03-10 17:12:18 -07:00

m68k

gdbstub: Remove @g_pos argument in gdb_register_coprocessor()

2026-03-10 17:12:18 -07:00

microblaze

gdbstub: Remove @g_pos argument in gdb_register_coprocessor()

2026-03-10 17:12:18 -07:00

mips

target/mips/cpu: Move initialization of memory region to realize function

2026-03-16 10:16:25 +01:00

or1k

target/or1k: Build 'gdbstub.c' once for system single binary

2026-02-26 00:02:14 +01:00

ppc

target/ppc: Replace TARGET_PAGE_BITS -> qemu_target_page_bits()

2026-03-18 06:53:23 +01:00

riscv

target/riscv: Fix scountovf CSR behavior in VS-mode and M-mode

2026-03-20 08:41:15 +10:00

rx

target/rx: Build 'gdbstub.c' once for system single binary

2026-02-26 00:02:14 +01:00

s390x

treewide: replace qemu_hw_version() with QEMU_HW_VERSION

2026-03-25 18:22:27 +01:00

sh4

target/sh4: Build 'gdbstub.c' once for system binaries

2026-02-26 00:02:14 +01:00

sparc

gdbstub: Remove @g_pos argument in gdb_register_coprocessor()

2026-03-10 17:12:18 -07:00

tricore

target/tricore: Build 'gdbstub.c' once for system single binary

2026-02-26 00:02:14 +01:00

xtensa

target/xtensa/cpu: Move initialization of memory region to realize function

2026-03-16 10:16:25 +01:00

Kconfig

target/or1k: Rename from openrisc

2026-02-09 20:51:52 +01:00

meson.build

target/or1k: Rename from openrisc

2026-02-09 20:51:52 +01:00