diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index b55f788342..93c81195b5 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -21,7 +21,7 @@ static const hwaddr aspeed_soc_ast1030_memmap[] = { [ASPEED_DEV_SRAM0] = 0x00000000, - [ASPEED_DEV_SECSRAM] = 0x79000000, + [ASPEED_DEV_SRAM1] = 0x79000000, /* SEC SRAM */ [ASPEED_DEV_IOMEM] = 0x7E600000, [ASPEED_DEV_PWM] = 0x7E610000, [ASPEED_DEV_FMC] = 0x7E620000, @@ -249,14 +249,16 @@ static bool aspeed_soc_ast10x0_realize(Aspeed10x0SoCState *a, Error **errp) memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SRAM0], &s->sram[0]); - memory_region_init_ram(&s->secsram, OBJECT(s), "sec.sram", - sc->secsram_size, &err); + + /* Internal SEC SRAM */ + memory_region_init_ram(&s->sram[1], OBJECT(s), "sec.sram", + sc->sram_size[1], &err); if (err != NULL) { error_propagate(errp, err); return false; } - memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SECSRAM], - &s->secsram); + memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SRAM1], + &s->sram[1]); /* SCU */ if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) { @@ -494,7 +496,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *klass, const void *data) sc->valid_cpu_types = valid_cpu_types; sc->silicon_rev = AST1030_A1_SILICON_REV; sc->sram_size[0] = 0xc0000; - sc->secsram_size = 0x40000; /* 256 * KiB */ + sc->sram_size[1] = 0x40000; /* SEC SRAM 256 * KiB */ sc->spis_num = 2; sc->ehcis_num = 0; sc->wdts_num = 4; @@ -522,7 +524,7 @@ static void aspeed_soc_ast1060_class_init(ObjectClass *klass, const void *data) sc->valid_cpu_types = valid_cpu_types; sc->silicon_rev = AST1060_A2_SILICON_REV; sc->sram_size[0] = 0xc0000; - sc->secsram_size = 0x40000; /* 256 * KiB */ + sc->sram_size[1] = 0x40000; /* SEC SRAM 256 * KiB */ sc->spis_num = 2; sc->wdts_num = 4; sc->uarts_num = 1; diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index dda602e9f2..3aac144cd4 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -60,7 +60,7 @@ #define ASPEED_PCIE_NUM 3 #define ASPEED_INTC_NUM 2 #define ASPEED_IOEXP_NUM 2 -#define ASPEED_SRAM_NUM 1 +#define ASPEED_SRAM_NUM 2 struct AspeedSoCState { DeviceState parent; @@ -89,7 +89,6 @@ struct AspeedSoCState { AspeedSBCState sbc; AspeedSLIState sli; AspeedSLIState sliio; - MemoryRegion secsram; UnimplementedDeviceState sbc_unimplemented; AspeedSDMCState sdmc; AspeedPWMState pwm; @@ -173,7 +172,6 @@ struct AspeedSoCClass { const char * const *valid_cpu_types; uint32_t silicon_rev; uint64_t sram_size[ASPEED_SRAM_NUM]; - uint64_t secsram_size; int pcie_num; int spis_num; int sgpio_num; @@ -225,10 +223,10 @@ enum { ASPEED_DEV_SCU, ASPEED_DEV_ADC, ASPEED_DEV_SBC, - ASPEED_DEV_SECSRAM, ASPEED_DEV_EMMC_BC, ASPEED_DEV_VIDEO, ASPEED_DEV_SRAM0, + ASPEED_DEV_SRAM1, ASPEED_DEV_SDHCI, ASPEED_DEV_GPIO, ASPEED_DEV_GPIO_1_8V,