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hw/ppc/pegasos2: Change device tree generation
We generate a flattened device tree programmatically for VOF. Change this to load the static parts from a device tree blob and only generate the parts that depend on run time conditions such as CPU type, memory size and PCI devices. Moving the static parts in a dts makes the board code simpler and more generic. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Link: https://lore.kernel.org/qemu-devel/383891fc2696609b27d2de9773efe1b4f493e333.1761176219.git.balaton@eik.bme.hu Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
This commit is contained in:
committed by
Harsh Prateek Bora
parent
63a9cc0580
commit
9099b430a4
@@ -58,16 +58,8 @@
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#define BUS_FREQ_HZ 133333333
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#define PCI0_CFG_ADDR 0xcf8
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#define PCI0_MEM_BASE 0xc0000000
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#define PCI0_MEM_SIZE 0x20000000
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#define PCI0_IO_BASE 0xf8000000
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#define PCI0_IO_SIZE 0x10000
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#define PCI1_CFG_ADDR 0xc78
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#define PCI1_MEM_BASE 0x80000000
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#define PCI1_MEM_SIZE 0x40000000
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#define PCI1_IO_BASE 0xfe000000
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#define PCI1_IO_SIZE 0x10000
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#define TYPE_PEGASOS2_MACHINE MACHINE_TYPE_NAME("pegasos2")
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OBJECT_DECLARE_TYPE(Pegasos2MachineState, MachineClass, PEGASOS2_MACHINE)
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@@ -411,7 +403,11 @@ static void pegasos2_machine_reset(MachineState *machine, ResetType type)
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error_report("Memory for initrd is in use");
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exit(1);
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}
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fdt = build_fdt(machine, &sz);
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if (!fdt) {
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exit(1);
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}
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/* FIXME: VOF assumes entry is same as load address */
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d[0] = cpu_to_be64(pm->kernel_entry);
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d[1] = cpu_to_be64(pm->kernel_size - (pm->kernel_entry - pm->kernel_addr));
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@@ -654,113 +650,12 @@ static void dt_usb(PCIBus *bus, PCIDevice *d, FDTInfo *fi)
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qemu_fdt_setprop_string(fi->fdt, fi->path, "device_type", "usb");
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}
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static void dt_isa(PCIBus *bus, PCIDevice *d, FDTInfo *fi)
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{
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GString *name = g_string_sized_new(64);
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uint32_t cells[3];
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qemu_fdt_setprop_cell(fi->fdt, fi->path, "#size-cells", 1);
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qemu_fdt_setprop_cell(fi->fdt, fi->path, "#address-cells", 2);
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qemu_fdt_setprop_string(fi->fdt, fi->path, "device_type", "isa");
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/* additional devices */
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g_string_printf(name, "%s/lpt@i3bc", fi->path);
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qemu_fdt_add_subnode(fi->fdt, name->str);
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qemu_fdt_setprop_cell(fi->fdt, name->str, "clock-frequency", 0);
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cells[0] = cpu_to_be32(7);
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cells[1] = 0;
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qemu_fdt_setprop(fi->fdt, name->str, "interrupts",
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cells, 2 * sizeof(cells[0]));
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cells[0] = cpu_to_be32(1);
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cells[1] = cpu_to_be32(0x3bc);
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cells[2] = cpu_to_be32(8);
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qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0]));
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qemu_fdt_setprop_string(fi->fdt, name->str, "device_type", "lpt");
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g_string_printf(name, "%s/fdc@i3f0", fi->path);
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qemu_fdt_add_subnode(fi->fdt, name->str);
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qemu_fdt_setprop_cell(fi->fdt, name->str, "clock-frequency", 0);
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cells[0] = cpu_to_be32(6);
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cells[1] = 0;
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qemu_fdt_setprop(fi->fdt, name->str, "interrupts",
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cells, 2 * sizeof(cells[0]));
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cells[0] = cpu_to_be32(1);
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cells[1] = cpu_to_be32(0x3f0);
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cells[2] = cpu_to_be32(8);
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qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0]));
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qemu_fdt_setprop_string(fi->fdt, name->str, "device_type", "fdc");
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g_string_printf(name, "%s/timer@i40", fi->path);
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qemu_fdt_add_subnode(fi->fdt, name->str);
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qemu_fdt_setprop_cell(fi->fdt, name->str, "clock-frequency", 0);
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cells[0] = cpu_to_be32(1);
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cells[1] = cpu_to_be32(0x40);
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cells[2] = cpu_to_be32(8);
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qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0]));
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qemu_fdt_setprop_string(fi->fdt, name->str, "device_type", "timer");
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g_string_printf(name, "%s/rtc@i70", fi->path);
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qemu_fdt_add_subnode(fi->fdt, name->str);
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qemu_fdt_setprop_string(fi->fdt, name->str, "compatible", "ds1385-rtc");
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qemu_fdt_setprop_cell(fi->fdt, name->str, "clock-frequency", 0);
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cells[0] = cpu_to_be32(8);
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cells[1] = 0;
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qemu_fdt_setprop(fi->fdt, name->str, "interrupts",
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cells, 2 * sizeof(cells[0]));
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cells[0] = cpu_to_be32(1);
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cells[1] = cpu_to_be32(0x70);
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cells[2] = cpu_to_be32(2);
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qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0]));
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qemu_fdt_setprop_string(fi->fdt, name->str, "device_type", "rtc");
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g_string_printf(name, "%s/keyboard@i60", fi->path);
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qemu_fdt_add_subnode(fi->fdt, name->str);
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cells[0] = cpu_to_be32(1);
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cells[1] = 0;
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qemu_fdt_setprop(fi->fdt, name->str, "interrupts",
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cells, 2 * sizeof(cells[0]));
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cells[0] = cpu_to_be32(1);
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cells[1] = cpu_to_be32(0x60);
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cells[2] = cpu_to_be32(5);
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qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0]));
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qemu_fdt_setprop_string(fi->fdt, name->str, "device_type", "keyboard");
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g_string_printf(name, "%s/8042@i60", fi->path);
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qemu_fdt_add_subnode(fi->fdt, name->str);
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qemu_fdt_setprop_cell(fi->fdt, name->str, "#interrupt-cells", 2);
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qemu_fdt_setprop_cell(fi->fdt, name->str, "#size-cells", 0);
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qemu_fdt_setprop_cell(fi->fdt, name->str, "#address-cells", 1);
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qemu_fdt_setprop_string(fi->fdt, name->str, "interrupt-controller", "");
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qemu_fdt_setprop_cell(fi->fdt, name->str, "clock-frequency", 0);
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cells[0] = cpu_to_be32(1);
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cells[1] = cpu_to_be32(0x60);
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cells[2] = cpu_to_be32(5);
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qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0]));
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qemu_fdt_setprop_string(fi->fdt, name->str, "device_type", "");
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g_string_printf(name, "%s/serial@i2f8", fi->path);
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qemu_fdt_add_subnode(fi->fdt, name->str);
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qemu_fdt_setprop_cell(fi->fdt, name->str, "clock-frequency", 0);
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cells[0] = cpu_to_be32(3);
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cells[1] = 0;
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qemu_fdt_setprop(fi->fdt, name->str, "interrupts",
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cells, 2 * sizeof(cells[0]));
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cells[0] = cpu_to_be32(1);
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cells[1] = cpu_to_be32(0x2f8);
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cells[2] = cpu_to_be32(8);
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qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0]));
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qemu_fdt_setprop_string(fi->fdt, name->str, "device_type", "serial");
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g_string_free(name, TRUE);
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}
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static struct {
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const char *id;
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const char *name;
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void (*dtf)(PCIBus *bus, PCIDevice *d, FDTInfo *fi);
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} device_map[] = {
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{ "pci11ab,6460", "host", NULL },
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{ "pci1106,8231", "isa", dt_isa },
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{ "pci1106,571", "ide", dt_ide },
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{ "pci1106,3044", "firewire", NULL },
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{ "pci1106,3038", "usb", dt_usb },
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@@ -780,7 +675,10 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque)
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pci_get_word(&d->config[PCI_VENDOR_ID]),
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pci_get_word(&d->config[PCI_DEVICE_ID]));
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if (pci_get_word(&d->config[PCI_CLASS_DEVICE]) ==
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if (!strcmp(pn, "pci1106,8231")) {
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return; /* ISA bridge and devices are included in dtb */
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}
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if (pci_get_word(&d->config[PCI_CLASS_DEVICE]) ==
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PCI_CLASS_NETWORK_ETHERNET) {
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name = "ethernet";
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} else if (pci_get_word(&d->config[PCI_CLASS_DEVICE]) >> 8 ==
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@@ -858,131 +756,9 @@ static void add_pci_device(PCIBus *bus, PCIDevice *d, void *opaque)
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g_string_free(node, TRUE);
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}
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static void *build_fdt(MachineState *machine, int *fdt_size)
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static void add_cpu_info(void *fdt, PowerPCCPU *cpu)
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{
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Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine);
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PowerPCCPU *cpu = pm->cpu;
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PCIBus *pci_bus;
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FDTInfo fi;
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uint32_t cells[16];
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void *fdt = create_device_tree(fdt_size);
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fi.fdt = fdt;
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/* root node */
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qemu_fdt_setprop_string(fdt, "/", "CODEGEN,description",
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"Pegasos CHRP PowerPC System");
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qemu_fdt_setprop_string(fdt, "/", "CODEGEN,board", "Pegasos2");
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qemu_fdt_setprop_string(fdt, "/", "CODEGEN,vendor", "bplan GmbH");
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qemu_fdt_setprop_string(fdt, "/", "revision", "2B");
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qemu_fdt_setprop_string(fdt, "/", "model", "Pegasos2");
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qemu_fdt_setprop_string(fdt, "/", "device_type", "chrp");
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qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 1);
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qemu_fdt_setprop_string(fdt, "/", "name", "bplan,Pegasos2");
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/* pci@c0000000 */
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qemu_fdt_add_subnode(fdt, "/pci@c0000000");
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cells[0] = 0;
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cells[1] = 0;
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qemu_fdt_setprop(fdt, "/pci@c0000000", "bus-range",
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cells, 2 * sizeof(cells[0]));
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qemu_fdt_setprop_cell(fdt, "/pci@c0000000", "pci-bridge-number", 1);
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cells[0] = cpu_to_be32(PCI0_MEM_BASE);
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cells[1] = cpu_to_be32(PCI0_MEM_SIZE);
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qemu_fdt_setprop(fdt, "/pci@c0000000", "reg", cells, 2 * sizeof(cells[0]));
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cells[0] = cpu_to_be32(0x01000000);
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cells[1] = 0;
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cells[2] = 0;
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cells[3] = cpu_to_be32(PCI0_IO_BASE);
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cells[4] = 0;
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cells[5] = cpu_to_be32(PCI0_IO_SIZE);
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cells[6] = cpu_to_be32(0x02000000);
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cells[7] = 0;
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cells[8] = cpu_to_be32(PCI0_MEM_BASE);
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cells[9] = cpu_to_be32(PCI0_MEM_BASE);
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cells[10] = 0;
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cells[11] = cpu_to_be32(PCI0_MEM_SIZE);
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qemu_fdt_setprop(fdt, "/pci@c0000000", "ranges",
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cells, 12 * sizeof(cells[0]));
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qemu_fdt_setprop_cell(fdt, "/pci@c0000000", "#size-cells", 2);
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qemu_fdt_setprop_cell(fdt, "/pci@c0000000", "#address-cells", 3);
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qemu_fdt_setprop_string(fdt, "/pci@c0000000", "device_type", "pci");
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fi.path = "/pci@c0000000";
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pci_bus = mv64361_get_pci_bus(pm->mv, 0);
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pci_for_each_device_reverse(pci_bus, 0, add_pci_device, &fi);
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/* pci@80000000 */
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qemu_fdt_add_subnode(fdt, "/pci@80000000");
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cells[0] = 0;
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cells[1] = 0;
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qemu_fdt_setprop(fdt, "/pci@80000000", "bus-range",
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cells, 2 * sizeof(cells[0]));
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qemu_fdt_setprop_cell(fdt, "/pci@80000000", "pci-bridge-number", 0);
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cells[0] = cpu_to_be32(PCI1_MEM_BASE);
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cells[1] = cpu_to_be32(PCI1_MEM_SIZE);
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qemu_fdt_setprop(fdt, "/pci@80000000", "reg", cells, 2 * sizeof(cells[0]));
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qemu_fdt_setprop_cell(fdt, "/pci@80000000", "8259-interrupt-acknowledge",
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0xf1000cb4);
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cells[0] = cpu_to_be32(0x01000000);
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cells[1] = 0;
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cells[2] = 0;
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cells[3] = cpu_to_be32(PCI1_IO_BASE);
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cells[4] = 0;
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cells[5] = cpu_to_be32(PCI1_IO_SIZE);
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cells[6] = cpu_to_be32(0x02000000);
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cells[7] = 0;
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cells[8] = cpu_to_be32(PCI1_MEM_BASE);
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cells[9] = cpu_to_be32(PCI1_MEM_BASE);
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cells[10] = 0;
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cells[11] = cpu_to_be32(PCI1_MEM_SIZE);
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qemu_fdt_setprop(fdt, "/pci@80000000", "ranges",
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cells, 12 * sizeof(cells[0]));
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qemu_fdt_setprop_cell(fdt, "/pci@80000000", "#size-cells", 2);
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qemu_fdt_setprop_cell(fdt, "/pci@80000000", "#address-cells", 3);
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qemu_fdt_setprop_string(fdt, "/pci@80000000", "device_type", "pci");
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fi.path = "/pci@80000000";
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pci_bus = mv64361_get_pci_bus(pm->mv, 1);
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pci_for_each_device_reverse(pci_bus, 0, add_pci_device, &fi);
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qemu_fdt_add_subnode(fdt, "/failsafe");
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qemu_fdt_setprop_string(fdt, "/failsafe", "device_type", "serial");
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qemu_fdt_add_subnode(fdt, "/rtas");
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qemu_fdt_setprop_cell(fdt, "/rtas", "system-reboot", RTAS_SYSTEM_REBOOT);
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qemu_fdt_setprop_cell(fdt, "/rtas", "hibernate", RTAS_HIBERNATE);
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qemu_fdt_setprop_cell(fdt, "/rtas", "suspend", RTAS_SUSPEND);
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qemu_fdt_setprop_cell(fdt, "/rtas", "power-off", RTAS_POWER_OFF);
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qemu_fdt_setprop_cell(fdt, "/rtas", "set-indicator", RTAS_SET_INDICATOR);
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qemu_fdt_setprop_cell(fdt, "/rtas", "display-character",
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RTAS_DISPLAY_CHARACTER);
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qemu_fdt_setprop_cell(fdt, "/rtas", "write-pci-config",
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RTAS_WRITE_PCI_CONFIG);
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qemu_fdt_setprop_cell(fdt, "/rtas", "read-pci-config",
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RTAS_READ_PCI_CONFIG);
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/* Pegasos2 firmware misspells check-exception and guests use that */
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qemu_fdt_setprop_cell(fdt, "/rtas", "check-execption",
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RTAS_CHECK_EXCEPTION);
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qemu_fdt_setprop_cell(fdt, "/rtas", "event-scan", RTAS_EVENT_SCAN);
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qemu_fdt_setprop_cell(fdt, "/rtas", "set-time-of-day",
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RTAS_SET_TIME_OF_DAY);
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qemu_fdt_setprop_cell(fdt, "/rtas", "get-time-of-day",
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RTAS_GET_TIME_OF_DAY);
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qemu_fdt_setprop_cell(fdt, "/rtas", "nvram-store", RTAS_NVRAM_STORE);
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qemu_fdt_setprop_cell(fdt, "/rtas", "nvram-fetch", RTAS_NVRAM_FETCH);
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qemu_fdt_setprop_cell(fdt, "/rtas", "restart-rtas", RTAS_RESTART_RTAS);
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qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-error-log-max", 0);
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qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-event-scan-rate", 0);
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qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-display-device", 0);
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qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-size", 20);
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qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-version", 1);
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/* cpus */
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qemu_fdt_add_subnode(fdt, "/cpus");
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qemu_fdt_setprop_cell(fdt, "/cpus", "#cpus", 1);
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qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 1);
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qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0);
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uint32_t cells[2];
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/* FIXME Get CPU name from CPU object */
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const char *cp = "/cpus/PowerPC,G4";
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@@ -1034,15 +810,43 @@ static void *build_fdt(MachineState *machine, int *fdt_size)
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cells[1] = 0;
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qemu_fdt_setprop(fdt, cp, "reg", cells, 2 * sizeof(cells[0]));
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qemu_fdt_setprop_string(fdt, cp, "device_type", "cpu");
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}
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/* memory */
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qemu_fdt_add_subnode(fdt, "/memory@0");
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static void *load_dtb(const char *filename, int *fdt_size)
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{
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void *fdt;
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g_autofree char *name = qemu_find_file(QEMU_FILE_TYPE_DTB, filename);
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if (!name) {
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error_report("Could not find dtb file '%s'", filename);
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return NULL;
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}
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fdt = load_device_tree(name, fdt_size);
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if (!fdt) {
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error_report("Could not load dtb file '%s'", name);
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}
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return fdt;
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}
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static void *build_fdt(MachineState *machine, int *fdt_size)
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{
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Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine);
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FDTInfo fi;
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PCIBus *pci_bus;
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uint32_t cells[2];
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void *fdt = load_dtb("pegasos2.dtb", fdt_size);
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if (!fdt) {
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return NULL;
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}
|
||||
qemu_fdt_setprop_string(fdt, "/", "name", "bplan,Pegasos2");
|
||||
|
||||
/* Set memory size */
|
||||
cells[0] = 0;
|
||||
cells[1] = cpu_to_be32(machine->ram_size);
|
||||
qemu_fdt_setprop(fdt, "/memory@0", "reg", cells, 2 * sizeof(cells[0]));
|
||||
qemu_fdt_setprop_string(fdt, "/memory@0", "device_type", "memory");
|
||||
|
||||
qemu_fdt_add_subnode(fdt, "/chosen");
|
||||
/* Boot parameters */
|
||||
if (pm->initrd_addr && pm->initrd_size) {
|
||||
qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
|
||||
pm->initrd_addr + pm->initrd_size);
|
||||
@@ -1052,8 +856,15 @@ static void *build_fdt(MachineState *machine, int *fdt_size)
|
||||
qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
|
||||
machine->kernel_cmdline ?: "");
|
||||
|
||||
qemu_fdt_add_subnode(fdt, "/openprom");
|
||||
qemu_fdt_setprop_string(fdt, "/openprom", "model", "Pegasos2,1.1");
|
||||
add_cpu_info(fdt, pm->cpu);
|
||||
|
||||
fi.fdt = fdt;
|
||||
fi.path = "/pci@c0000000";
|
||||
pci_bus = mv64361_get_pci_bus(pm->mv, 0);
|
||||
pci_for_each_device_reverse(pci_bus, 0, add_pci_device, &fi);
|
||||
fi.path = "/pci@80000000";
|
||||
pci_bus = mv64361_get_pci_bus(pm->mv, 1);
|
||||
pci_for_each_device_reverse(pci_bus, 0, add_pci_device, &fi);
|
||||
|
||||
return fdt;
|
||||
}
|
||||
|
||||
@@ -1,6 +1,7 @@
|
||||
dtbs = [
|
||||
'bamboo.dtb',
|
||||
'canyonlands.dtb',
|
||||
'pegasos2.dtb',
|
||||
'petalogix-ml605.dtb',
|
||||
'petalogix-s3adsp1800.dtb',
|
||||
]
|
||||
|
||||
BIN
pc-bios/dtb/pegasos2.dtb
Normal file
BIN
pc-bios/dtb/pegasos2.dtb
Normal file
Binary file not shown.
167
pc-bios/dtb/pegasos2.dts
Normal file
167
pc-bios/dtb/pegasos2.dts
Normal file
@@ -0,0 +1,167 @@
|
||||
/*
|
||||
* QEMU Pegasos2 Device Tree Source
|
||||
*
|
||||
* Copyright 2025 BALATON Zoltan
|
||||
* SPDX-License-Identifier: GPL-2.0-or-later
|
||||
*
|
||||
* This is partial source, more info will be filled in by board code.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
#address-cells = <1>;
|
||||
device_type = "chrp";
|
||||
model = "Pegasos2";
|
||||
revision = "2B";
|
||||
CODEGEN,vendor = "bplan GmbH";
|
||||
CODEGEN,board = "Pegasos2";
|
||||
CODEGEN,description = "Pegasos CHRP PowerPC System";
|
||||
|
||||
openprom {
|
||||
model = "Pegasos2,1.1";
|
||||
};
|
||||
|
||||
chosen {
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0 0>;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
#cpus = <1>;
|
||||
};
|
||||
|
||||
rtas {
|
||||
rtas-version = <1>;
|
||||
rtas-size = <20>;
|
||||
rtas-display-device = <0>;
|
||||
rtas-event-scan-rate = <0>;
|
||||
rtas-error-log-max = <0>;
|
||||
restart-rtas = <0>;
|
||||
nvram-fetch = <1>;
|
||||
nvram-store = <2>;
|
||||
get-time-of-day = <3>;
|
||||
set-time-of-day = <4>;
|
||||
event-scan = <6>;
|
||||
/* Pegasos2 firmware misspells check-exception */
|
||||
check-execption = <7>;
|
||||
read-pci-config = <8>;
|
||||
write-pci-config = <9>;
|
||||
display-character = <10>;
|
||||
set-indicator = <11>;
|
||||
power-off = <17>;
|
||||
suspend = <18>;
|
||||
hibernate = <19>;
|
||||
system-reboot = <20>;
|
||||
};
|
||||
|
||||
failsafe {
|
||||
device_type = "serial";
|
||||
};
|
||||
|
||||
pci@80000000 {
|
||||
device_type = "pci";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
clock-frequency = <33333333>;
|
||||
ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00010000
|
||||
0x02000000 0 0x80000000 0x80000000 0 0x40000000>;
|
||||
8259-interrupt-acknowledge = <0xf1000cb4>;
|
||||
reg = <0x80000000 0x40000000>;
|
||||
pci-bridge-number = <0>;
|
||||
bus-range = <0 0>;
|
||||
|
||||
isa@c {
|
||||
vendor-id = <0x1106>;
|
||||
device-id = <0x8231>;
|
||||
revision-id = <0x10>;
|
||||
class-code = <0x60100>;
|
||||
/* Pegasos firmware has subsystem-id and
|
||||
subsystem-vendor-id swapped */
|
||||
subsystem-id = <0x1af4>;
|
||||
subsystem-vendor-id = <0x1100>;
|
||||
reg = <0x6000 0 0 0 0>;
|
||||
device_type = "isa";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
eisa-slots = <0>;
|
||||
clock-frequency = <8333333>;
|
||||
slot-names = <0>;
|
||||
|
||||
serial@i2f8 {
|
||||
device_type = "serial";
|
||||
reg = <1 0x2f8 8>;
|
||||
interrupts = <3 0>;
|
||||
clock-frequency = <1843200>;
|
||||
compatible = "pnpPNP,501";
|
||||
};
|
||||
|
||||
8042@i60 {
|
||||
device_type = "";
|
||||
reg = <1 0x60 5>;
|
||||
clock-frequency = <0>;
|
||||
compatible = "chrp,8042";
|
||||
interrupt-controller = "";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
};
|
||||
|
||||
keyboard@i60 {
|
||||
device_type = "keyboard";
|
||||
reg = <1 0x60 5>;
|
||||
interrupts = <1 0>;
|
||||
compatible = "pnpPNP,303";
|
||||
};
|
||||
|
||||
rtc@i70 {
|
||||
device_type = "rtc";
|
||||
reg = <1 0x70 2>;
|
||||
interrupts = <8 0>;
|
||||
clock-frequency = <0>;
|
||||
compatible = "ds1385-rtc";
|
||||
};
|
||||
|
||||
timer@i40 {
|
||||
device_type = "timer";
|
||||
reg = <1 0x40 8>;
|
||||
clock-frequency = <0>;
|
||||
compatible = "pnpPNP,100";
|
||||
};
|
||||
|
||||
fdc@i3f0 {
|
||||
device_type = "fdc";
|
||||
reg = <1 0x3f0 8>;
|
||||
interrupts = <6 0>;
|
||||
clock-frequency = <0>;
|
||||
compatible = "pnpPNP,700";
|
||||
};
|
||||
|
||||
lpt@i3bc {
|
||||
device_type = "lpt";
|
||||
reg = <1 0x3bc 8>;
|
||||
interrupts = <7 0>;
|
||||
clock-frequency = <0>;
|
||||
compatible = "pnpPNP,400";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
pci@c0000000 {
|
||||
device_type = "pci";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
clock-frequency = <66666666>;
|
||||
ranges = <0x01000000 0 0x00000000 0xf8000000 0 0x00010000
|
||||
0x02000000 0 0xc0000000 0xc0000000 0 0x20000000>;
|
||||
reg = <0xc0000000 0x20000000>;
|
||||
pci-bridge-number = <1>;
|
||||
bus-range = <0 0>;
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user