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target/loongarch: Use explicit little-endian LD/ST API
The LoongArch architecture uses little endianness. Directly
use the little-endian LD/ST API.
Mechanical change using:
$ end=le; \
for acc in uw w l q tul; do \
sed -i -e "s/ld${acc}_p(/ld${acc}_${end}_p(/" \
-e "s/st${acc}_p(/st${acc}_${end}_p(/" \
$(git grep -wlE '(ld|st)t?u?[wlq]_p' target/loongarch/); \
done
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-ID: <20251224161456.89707-1-philmd@linaro.org>
This commit is contained in:
@@ -172,7 +172,7 @@ TLBRet loongarch_ptw(CPULoongArchState *env, MMUContext *context,
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/* get next level page directory */
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index = (address >> dir_base) & ((1 << dir_width) - 1);
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phys = base | index << 3;
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base = ldq_phys(cs->as, phys);
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base = ldq_le_phys(cs->as, phys);
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if (level) {
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if (FIELD_EX64(base, TLBENTRY, HUGE)) {
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/* base is a huge pte */
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@@ -204,8 +204,8 @@ restart:
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} else if (cpu_has_ptw(env)) {
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index &= 1;
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context->pte_buddy[index] = base;
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context->pte_buddy[1 - index] = ldq_phys(cs->as,
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phys + 8 * (1 - 2 * index));
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context->pte_buddy[1 - index] = ldq_le_phys(cs->as,
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phys + 8 * (1 - 2 * index));
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}
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context->ps = dir_base;
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@@ -237,7 +237,7 @@ restart:
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ret1 = loongarch_cmpxchg_phys(cs, phys, pte, base);
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/* PTE updated by other CPU, reload PTE entry */
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if (ret1 == MEMTX_DECODE_ERROR) {
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base = ldq_phys(cs->as, phys);
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base = ldq_le_phys(cs->as, phys);
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goto restart;
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}
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@@ -22,20 +22,20 @@ uint64_t helper_iocsrrd_b(CPULoongArchState *env, target_ulong r_addr)
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uint64_t helper_iocsrrd_h(CPULoongArchState *env, target_ulong r_addr)
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{
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return address_space_lduw(env->address_space_iocsr, r_addr,
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GET_MEMTXATTRS(env), NULL);
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return address_space_lduw_le(env->address_space_iocsr, r_addr,
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GET_MEMTXATTRS(env), NULL);
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}
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uint64_t helper_iocsrrd_w(CPULoongArchState *env, target_ulong r_addr)
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{
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return address_space_ldl(env->address_space_iocsr, r_addr,
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GET_MEMTXATTRS(env), NULL);
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return address_space_ldl_le(env->address_space_iocsr, r_addr,
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GET_MEMTXATTRS(env), NULL);
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}
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uint64_t helper_iocsrrd_d(CPULoongArchState *env, target_ulong r_addr)
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{
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return address_space_ldq(env->address_space_iocsr, r_addr,
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GET_MEMTXATTRS(env), NULL);
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return address_space_ldq_le(env->address_space_iocsr, r_addr,
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GET_MEMTXATTRS(env), NULL);
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}
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void helper_iocsrwr_b(CPULoongArchState *env, target_ulong w_addr,
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@@ -48,20 +48,20 @@ void helper_iocsrwr_b(CPULoongArchState *env, target_ulong w_addr,
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void helper_iocsrwr_h(CPULoongArchState *env, target_ulong w_addr,
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target_ulong val)
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{
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address_space_stw(env->address_space_iocsr, w_addr,
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val, GET_MEMTXATTRS(env), NULL);
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address_space_stw_le(env->address_space_iocsr, w_addr,
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val, GET_MEMTXATTRS(env), NULL);
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}
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void helper_iocsrwr_w(CPULoongArchState *env, target_ulong w_addr,
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target_ulong val)
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{
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address_space_stl(env->address_space_iocsr, w_addr,
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val, GET_MEMTXATTRS(env), NULL);
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address_space_stl_le(env->address_space_iocsr, w_addr,
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val, GET_MEMTXATTRS(env), NULL);
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}
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void helper_iocsrwr_d(CPULoongArchState *env, target_ulong w_addr,
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target_ulong val)
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{
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address_space_stq(env->address_space_iocsr, w_addr,
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val, GET_MEMTXATTRS(env), NULL);
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address_space_stq_le(env->address_space_iocsr, w_addr,
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val, GET_MEMTXATTRS(env), NULL);
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}
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@@ -719,7 +719,7 @@ target_ulong helper_lddir(CPULoongArchState *env, target_ulong base,
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get_dir_base_width(env, &dir_base, &dir_width, level);
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index = (badvaddr >> dir_base) & ((1 << dir_width) - 1);
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phys = base | index << 3;
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return ldq_phys(cs->as, phys) & TARGET_PHYS_MASK;
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return ldq_le_phys(cs->as, phys) & TARGET_PHYS_MASK;
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}
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void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
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@@ -781,7 +781,7 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
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ptoffset0 = ptindex << 3;
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ptoffset1 = (ptindex + 1) << 3;
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phys = base | (odd ? ptoffset1 : ptoffset0);
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tmp0 = ldq_phys(cs->as, phys) & TARGET_PHYS_MASK;
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tmp0 = ldq_le_phys(cs->as, phys) & TARGET_PHYS_MASK;
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ps = ptbase;
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}
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