339 Commits

Author SHA1 Message Date
Stefan Hajnoczi
67943f9371 Merge tag 'pull-monitor-2026-07-07' of https://repo.or.cz/qemu/armbru into staging
Monitor patches for 2026-07-07

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# gpg: Signature made Tue 07 Jul 2026 11:43:48 CEST
# gpg:                using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg:                issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* tag 'pull-monitor-2026-07-07' of https://repo.or.cz/qemu/armbru: (35 commits)
  docs: mark '-mon' as deprecated in favour of -object
  qemu-options: document new monitor-hmp and monitor-qmp objects
  tests: switch from -mon to -object monitor-qmp
  monitor: add support for auto-deleting monitors upon close
  qom: add trace events for user creatable create/delete APIs
  tests/functional: add a stress test for monitor hot unplug
  tests/functional: add e2e test for dynamic QMP monitor hotplug
  tests/qtest: add tests for dynamic monitor add/remove
  monitor: implement support for deleting QMP objects
  monitor: protect qemu_chr_fe_accept_input with monitor lock
  monitor: reject attempts to delete the current monitor
  monitor: convert from oneshot BH to persistent BH
  monitor: implement "user creatable" interface for adding monitors
  monitor: eliminate monitor_is_hmp_non_interactive method
  monitor: drop unused monitor_is_qmp method
  monitor: use dynamic cast in monitor_is_hmp_non_interactive
  monitor: use dynamic cast in QMP commands
  monitor: drop unused monitor_cur_is_qmp
  util: use dynamic cast in error vreport
  monitor: use dynamic cast in monitor_qmp_requests_pop_any_with_lock
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-07 19:17:41 +02:00
Daniel P. Berrangé
9c3b2c9db5 qom: replace 'can_be_deleted' with 'prepare_delete'
While most objects can perform all their cleanup in the finalizer
method, there can be interactions with other resources / subsystems
/ threads which require that some cleanup be performed on an user
creatable object before unparenting it and entering finalization.

The current 'can_be_deleted' method runs in the deletion path and
is intended to be used to block deletion. While it could be used
to perform cleanup tasks, its name suggests it should be free of
side-effects.

Generalize this by renaming it to 'prepare_delete', explicitly
allowing for cleanup to be provided. Existing users of 'can_be_deleted'
are re-written, which provides them with more detailed/tailored error
messages.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20260706135824.2623960-2-berrange@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2026-07-07 11:16:22 +02:00
Nathan Chen
6befa55274 iommufd: Introduce handler for device ATS support
Introduce a support_ats() handler that returns whether ATS is supported
for a device associated with a host IOMMU device, checking if the
IOMMU_HW_CAP_PCI_ATS_NOT_SUPPORTED capability bit is set.

Implement this handler in a new function for iommufd.

Suggested-by: Shameer Kolothum <skolothumtho@nvidia.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Shameer Kolothum <skolothumtho@nvidia.com>
Signed-off-by: Nathan Chen <nathanc@nvidia.com>
Link: https://lore.kernel.org/qemu-devel/20260623204943.989903-2-nathanc@nvidia.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
2026-07-07 07:12:46 +02:00
Philippe Mathieu-Daudé
0c4f68b2e3 accel: Use GdbBreakpointType enum
Include '_gdbstub_' in the AccelOpsClass handlers to emphasize
we are handling gdbstub-related requests.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-26-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
0533f08413 accel: Remove AccelOpsClass::supports_guest_debug
Now accelerators hold the 'guest debug supported' information
in their state, accessible by the common code. No need to call
a per-accelerator handler, simply check for the SSTEP_ENABLE
in AccelGdbConfig::sstep_flags.

Remove all AccelOpsClass::supports_guest_debug implementations,
inline gdb_supports_guest_debug() and remove the now unnecessary
KVMState::have_guest_debug field.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-18-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
8c60f7f38e accel: Have each implementation return their AccelGdbConfig
Hold the per-accelerator AccelGdbConfig in AccelState, set its
single @sstep_flags field in AccelClass::init_machine handlers.

Remove the AccelClass::gdbstub_supported_sstep_flags() getter
and inline the single accel_supported_gdbstub_sstep_flags() call
in gdb_init_gdbserver_state().

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-15-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
f2468e2f49 accel/kvm: Hold have_guest_debug in KVMState
Prefer to store per-accelerator variables in the per-accelerator
state, rather than as static variables. This is a good practice
to allow concurrent accelerators in the future.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-12-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
67ae20cc4a accel/whpx: Implement missing AccelClass::gdbstub_supported_sstep_flags
Correct gdbstub support requires some gdbstub_supported_sstep_flags.
Apparently missed in commit d7482ffe97 ("whpx: Added support for
breakpoints and stepping"), even with the recent 19b48084f7 ("whpx:
i386: re-enable guest debug support") fixes.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-9-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Philippe Mathieu-Daudé
abdd572a43 accel/mshv: Replace @dirty field by generic CPUState::vcpu_dirty field
No need for accel-specific @dirty field when we have
a generic one in CPUState. (Other accelerators already
did that in commits 6f13a0ada01..36ab216b81d).

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Tested-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260705215729.62196-6-philmd@oss.qualcomm.com>
2026-07-06 15:42:18 +02:00
Stefan Hajnoczi
4ee536fac7 Merge tag 'firmware-20260704-pull-request' of https://gitlab.com/kraxel/qemu into staging
igvm: add device tree support

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# gpg: Signature made Sat 04 Jul 2026 06:52:51 CEST
# gpg:                using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* tag 'firmware-20260704-pull-request' of https://gitlab.com/kraxel/qemu:
  igvm: add device tree parameter support
  igvm: use idiomatic meson conditional for IGVM build files
  igvm: Report error on missing parameter area in directive handlers

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-07-05 08:42:47 +02:00
Luigi Leonardi
4d3b9dc4d1 igvm: Report error on missing parameter area in directive handlers
Parameter areas are how an IGVM file tells QEMU to allocate buffers
for runtime information the guest needs — VP count, memory map,
MADT and so on. Usage directives reference a parameter area by index
to tell QEMU where to write each piece of data. If the index doesn't
match any declared parameter area, the data has nowhere to go and
should be treated as an error.

The directive handlers that look up a parameter area all return 0
(success) when `qigvm_find_param_entry()` can't find it. Therefore,
the load succeeds but the guest never gets the expected parameters.

Note that the IGVM library already validates parameter area indices
when the file is loaded, so this path should only be reachable with
a malformed file that bypassed library validation. This is defensive
programming against that case.

Report the error with error_setg() and return -1 instead.

Signed-off-by: Luigi Leonardi <leonardi@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Message-ID: <20260626-microvm_device_tree-v6-1-9cd13cf057e2@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2026-07-02 11:14:19 +02:00
Stefan Hajnoczi
0951d6dab1 Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* target/i386/mshv: CPU model support
* target/i386/mshv: first part of migration support
* target/i386/mshv: faster register access for MMIO exits
* target/i386/tdx: add support for AMX alias bits in CPUID and AVX10
* Deprecate memory-encryption in favor of confidential-guest-support

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# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (45 commits)
  i386/tdx: Add CPUID_24_0_EBX_AVX10_VL_MASK as supported
  i386/tdx: Make AMX alias bits supported
  i386/tdx: Use .has_gpa field to check if the gpa is valid
  machine: Deprecate memory-encryption
  qemu-options: Add description of tdx-guest object
  qemu-options: Add confidential-guest-support to machine options
  qemu-options: Change memory-encryption to confidential-guest-support in the example
  i386/sev: Remove the example that references memory-encryption
  target/i386/mshv: use the register page to set registers
  target/i386/mshv: use the register page to get registers
  target/i386/mshv: hv_vp_register_page setup for the vcpu
  include/hw/hyperv: add hv_vp_register_page struct definition
  accel: remove unnecessary #ifdefs
  target/i386/mshv: migrate CET/SS MSRs
  target/i386/mshv: migrate MTRR MSRs
  target/i386/mshv: migrate MSRs
  target/i386/mshv: reconstruct hflags after load
  target/i386/mshv: migrate XSAVE state
  target/i386/mshv: migrate pending ints/excs
  target/i386/mshv: move msr code to arch
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-06-27 23:06:04 -04:00
Magnus Kulke
d540dcc5e2 target/i386/mshv: migrate MSRs
In this change the we rewrite the existing MSR logic to make MSRs
migratable:

- we map them on existing QEMU fields in the CPU. A table and a macro
  MSHV_ENV_FIELD is used to associate a HV register name to the their msr
  index and their offset in the cpu state struct. The list is not
  exhaustive and will be extended in follow-up commits.
- mshv_set/get_msrs() fns are called in the arch_load/store_vcpu_state()
  fns. they use use generic registers ioctl's and map the input/output
  via load/store_to/from_env() from/to the hv register content to the
  cpu state representation.
- init_msrs() has been moved from mshv-vcpu to the msr source file
- we need to perform some filtering of MSR because before writing and
  reading, because the hvcalls will fail if the partition doesn't
  support a given MSRs.
- Some MSRs are partition-wide and so we will only write the to on the
  BSP.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-21-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-26 00:48:22 +02:00
Magnus Kulke
b2c0cc6300 target/i386/mshv: migrate pending ints/excs
We use PENDING_INTERRUPTION, INTERRUPT_STATE, PENDING_EVENT hv registers
to map and roundtrip from/to CPUX86State.

We ignore HV_REGISTER_PENDING_EVENT1 which represent events for nested
virt contexts, as we don't support nested virt with MSHV currently.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-30-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:55:41 +02:00
Magnus Kulke
f629431c09 accel/mshv: enable dirty page tracking
This change introduces the functions required to perform dirty page
tracking to speed up migrations. We are using the sync, global_start,
and global_stop hooks.

The sync is implemented in batches.

Before we can disable the dirty page tracking we have to set all dirty bits.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-35-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:55:28 +02:00
Magnus Kulke
a70da3a0e0 target/i386/mshv: expose mshv_get_generic_regs
We expose the fn, so we can call them from the other source files
(msr.c).

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-20-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:54:49 +02:00
Magnus Kulke
e624d93f33 accel/mshv: store partition proc features
We retrieve and store processor features on the state, so we can query
them later when deciding which MSRs to migrate.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-19-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:54:49 +02:00
Magnus Kulke
f2230f044d accel/mshv: remove redundant msi controller
The remaining MsiControl infrastructure can be removed now

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-14-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:09:20 +02:00
Magnus Kulke
c77944aa82 accel/mshv: reserve ioapic routes on s->irq_routes
We reserve 24 ioapic routes using the new functions that operate on the
mshv apic state.

commit/add_msi_routing() fn's can be removed now.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-13-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:09:20 +02:00
Magnus Kulke
f48f2011fd accel/mshv: use s->irq_routes in commit_routes
In mshv_irqchip_commit_routes() the entries that have been accumulated
in s->irq_routes are committed directly to MSHV's irqchip.

The old commit_msi_routing_table() fn will be removed in a subsquent commit.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-12-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:09:20 +02:00
Magnus Kulke
fff9929879 accel/mshv: update s->irq_routes in release_virq
The state's irq_routes field will be updated when an irqchip's gsi
is requested to be released.

The old remove_msi_routing() fn is redundant and can be removed.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-11-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:09:20 +02:00
Magnus Kulke
5cebd7c354 accel/mshv: update s->irq_routes in add_msi_route
The irq_routes field of the state is populated with native mshv irq
route entries. The allocation logic is modelled after the KVM
implementation: we will always allocate a minumum of 64 entries and use
a bitmask to find/set/clear GSIs.

The old implementation of add_msi_routes will be removed in a subsequent
commit.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-9-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:09:20 +02:00
Magnus Kulke
f81fefdeb8 accel/mshv: add irq_routes to state
This change adds fields related to irq routing to the MSHV state, following
similar fields in the KVM implementation.

So far the fields are only initialized, they will be used in subsequent
commits for bookkeeping purposes and storing uncommitted interrupt routes.

The TYPE_MSHV_ACCEL defines have been moved to the header.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-8-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:09:20 +02:00
Magnus Kulke
cc2b30223c accel/accel-irq: add generic commit_route_changes
A generic accel_irqchip_commit_route_changes() fn has been introduced for
usage in the MSHV accelerator. The respective kvm_ fn can be removed
since we handle the commit op in a generic way.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-7-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:08:45 +02:00
Magnus Kulke
49b2dcbd24 accel/accel-irq: add generic begin_route_changes
A generic accel_irqchip_begin_route_change() fn has been introduced for
usage in the MSHV accelerator. It replaces the respective kvm_ fn.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-6-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:08:45 +02:00
Magnus Kulke
61c139c4fa accel/accel-irq: add AccelRouteChange abstraction
The accelerated irqchip routines use a record of changes to batch
changes when programming routes.

Currently this mechanism is coupled to the KVM accelerator, this change
introduces an abstraction that replaces KVMRouteChange and keeps a
pointer to an abstract AccelState instead of the concrete type,
converting the state where necessary.

This is done to further align the irqchip programming in the MSHV
accelerator with the existing KVM code in QEMU. Subsequent commits will
introduce AccelRouteChange to the MSHV accelerator code.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-5-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:08:45 +02:00
Magnus Kulke
62e961af8f target/i386/mshv: impl init/load/store_vcpu_state
In migration we will handle more than registers, so we rework the
routines that were used to load & store CPU registers from/to the
hypervisor into more explicit init/load/store_vcpu_state() functions
that can be called from the appropriate hooks.

load/store_regs() still exists for the purpose of MMIO emulation, but it
will only address standard and special x86 registers.

Functions to retrieve FPU and XCR0 state from the hypervsisor have been
introduced.

MSR and APIC state covered are covered only as part of init_vcpu(). They
are not yet part of the load/store routines.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-4-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:08:45 +02:00
Magnus Kulke
d564c2a296 target/i386/mshv: use generic FPU/xcr0 state
Instead of using an mshv-specific FPU state representation we switch to
the generic i386 representation of the registers.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-3-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:08:45 +02:00
Magnus Kulke
a6961182bc target/i386/mshv: use arch_load/store_reg fns
Improved consistency around the naming of load/store register fn's. this
is required since we want to roundtrip more registers in a migration
than what's currently required for MMIO emulation.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260417105618.3621-2-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:08:44 +02:00
Magnus Kulke
e7c9532d89 accel/mshv: disable la57 (5lvl paging)
This change disable la57 paging on the mshv hypervisor on both the
mshv processor feature bitmap and mask the cpuid feature leaf to the
guest.

Since the removal of hypervisor-assisted gva=>gpa translation in
1c85a4a3d7 we have seen MMIO errors in guests on la57-enabled hw. We
will have to investigate and test this further.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Reviewed-by: Anirudh Rayabharam (Microsoft) <anirudh@anirudhrb.com>
Reviewed-by: Wei Liu <wei.liu@kernel.org>
Reviewed-by: Doru Blânzeanu <dblanzeanu@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260416121116.527927-10-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:08:12 +02:00
Magnus Kulke
38a557bc85 target/i386: query mshv accel for supported cpuids
We implement mshv_get_supported_cpuid() and invoke it in
x86_cpu_get_supported_feature_word() retrieve the cpu features that the
host is supporting. Initially we mask the virtualization capabilitities
potentially we might need to mask more in the future.

Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com>
Reviewed-by: Doru Blânzeanu <dblanzeanu@linux.microsoft.com>
Link: https://lore.kernel.org/r/20260416121116.527927-7-magnuskulke@linux.microsoft.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2026-06-25 19:08:12 +02:00
Marc-André Lureau
1f3241bcae system/physmem: make ram_block_discard_range() handle guest_memfd
Most callers of ram_block_discard_range() want to discard both the
shared and guest_memfd backing. Only kvm_convert_memory() intentionally
discards a single plane during private/shared conversions.

Rename the current implementation to ram_block_discard_shared_range()
and make ram_block_discard_range() a composite that also discards
guest_memfd when present (rb->guest_memfd >= 0). This ensures callers
like virtio-mem, virtio-balloon, hv-balloon, migration.. reclaim
private pages on discard.

Update kvm_convert_memory() to use the plane-specific
ram_block_discard_shared_range() since it only needs to discard
the shared backing when converting to private.

Likewise, after TDVF image copy, use ram_block_discard_shared_range().

Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Link: https://lore.kernel.org/r/20260604-rdm5-v5-11-5768e6a0943d@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2026-06-22 17:08:49 -04:00
Marc-André Lureau
cc9c77f4dd system/memory: implement RamDiscardManager multi-source aggregation
Refactor RamDiscardManager to aggregate multiple RamDiscardSource
instances. This enables scenarios where multiple components (e.g.,
virtio-mem and RamBlockAttributes) can coordinate memory discard
state for the same memory region.

The aggregation uses:
- Populated: ALL sources populated
- Discarded: ANY source discarded

When a source is added with existing listeners, they are notified
about regions that become discarded. When a source is removed,
listeners are notified about regions that become populated.

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Link: https://lore.kernel.org/r/20260604-rdm5-v5-7-5768e6a0943d@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2026-06-22 17:08:48 -04:00
Marc-André Lureau
f46a11c563 system/ram-discard-manager: drop replay from source interface
Remove replay_populated and replay_discarded from RamDiscardSourceClass
now that the RamDiscardManager handles replay iteration internally via
is_populated.

Remove the now-dead replay methods, helpers, and
for_each_populated/discarded_section() from ram-block-attributes, which
was the last source still carrying this code.

Reviewed-by: Peter Xu <peterx@redhat.com>
Acked-by: David Hildenbrand <david@kernel.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Link: https://lore.kernel.org/r/20260604-rdm5-v5-6-5768e6a0943d@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2026-06-22 17:08:48 -04:00
Marc-André Lureau
49a159baae system/memory: constify section arguments
The sections shouldn't be modified.

Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Acked-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com> # for CPR
Acked-by: David Hildenbrand (Arm) <david@kernel.org>
Link: https://lore.kernel.org/r/20260604-rdm5-v5-3-5768e6a0943d@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2026-06-22 17:08:48 -04:00
Marc-André Lureau
d444e348b1 system/memory: move RamDiscardManager to separate compilation unit
Extract RamDiscardManager and RamDiscardSource from system/memory.c into
dedicated a unit.

This reduces coupling and allows code that only needs the
RamDiscardManager interface to avoid pulling in all of memory.h
dependencies.

rust-sys bindings are no longer generated for RamDiscardSourceClass at
this point, thus we drop the unneeded InterfaceClass use.

Reviewed-by: Peter Xu <peterx@redhat.com>
Acked-by: David Hildenbrand <david@kernel.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260604-rdm5-v5-2-5768e6a0943d@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2026-06-22 17:08:48 -04:00
Marc-André Lureau
43d1320c6c system/memory: split RamDiscardManager into source and manager
Refactor the RamDiscardManager interface into two distinct components:
- RamDiscardSource: An interface that state providers (virtio-mem,
  RamBlockAttributes) implement to provide discard state information
  (granularity, populated/discarded ranges, replay callbacks).
- RamDiscardManager: A concrete QOM object that wraps a source, owns
  the listener list, and handles listener registration/unregistration
  and notifications.

This separation moves the listener management logic from individual
source implementations into the central RamDiscardManager, reducing
code duplication between virtio-mem and RamBlockAttributes.

The change prepares for future work where a RamDiscardManager could
aggregate multiple sources.

Note, the original virtio-mem code had conditions before discard:
  if (vmem->size) {
      rdl->notify_discard(rdl, rdl->section);
  }
however, the new code calls discard unconditionally. This is considered
safe, since the populate/discard of sections are already asymmetrical
(unplug & unregister all listener section unconditionally).

Reviewed-by: Peter Xu <peterx@redhat.com>
Acked-by: David Hildenbrand <david@kernel.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260604-rdm5-v5-1-5768e6a0943d@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2026-06-22 17:08:48 -04:00
Gavin Shan
cde9c44562 system/memory: Remove MAX_PHYS_ADDR
Remove MAX_PHYS_ADDR and MAX_PHYS_ADDR_SPACE_BITS as they're not used
since the addition by commit 052e87b073 ("memory: make section size
a 128-bit integer").

Signed-off-by: Gavin Shan <gshan@redhat.com>
Link: https://lore.kernel.org/r/20260608002303.851456-1-gshan@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
2026-06-22 17:08:48 -04:00
Philippe Mathieu-Daudé
e5590b5378 accel/hvf: Reduce hvf_kernel_irqchip_override scope
hvf_kernel_irqchip_override is only used within the
accel/hvf/hvf-all.c file, no need to expose the symbol.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Message-Id: <20260613145356.88410-1-philmd@oss.qualcomm.com>
2026-06-18 14:27:21 +02:00
Philippe Mathieu-Daudé
cb30b8758d system: Move cpu_physical_memory_*() declarations to 'system/physmem.h'
The following cpu_physical_memory_*() methods do not involve any
vCPU but only access physical memory:

 - cpu_physical_memory_read()
 - cpu_physical_memory_write()
 - cpu_physical_memory_map()
 - cpu_physical_memory_unmap()

Rename them removing the 'cpu_' prefix, and move then to the
"system/physmem.h" header with the other methods involved in
global physical address space.

Mechanical change using sed, then adding missing headers manually.

No logical change intended.

Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20260616020839.19104-7-philmd@oss.qualcomm.com>
2026-06-18 14:27:04 +02:00
Philippe Mathieu-Daudé
77293ecc95 system/memory: Constify various MemoryRegionCache arguments
Mark the MemoryRegionCache structure const when it is only
accessed read-only.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20260616020359.18627-7-philmd@oss.qualcomm.com>
2026-06-18 14:27:04 +02:00
Philippe Mathieu-Daudé
47b23339a5 system/memory: Constify various AddressSpace arguments (access)
Mark the AddressSpace structure const when it is only accessed
read-only.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20260616020359.18627-6-philmd@oss.qualcomm.com>
2026-06-18 14:27:04 +02:00
Philippe Mathieu-Daudé
7c862a8a45 system/memory: Constify various AddressSpace arguments (cache)
Mark the AddressSpace structure const when it is only accessed
read-only.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20260616020359.18627-5-philmd@oss.qualcomm.com>
2026-06-18 14:27:04 +02:00
Philippe Mathieu-Daudé
e8d053f4de system/memory: Constify various AddressSpace arguments (notify)
Mark the AddressSpace structure const when it is only accessed
read-only.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20260616020359.18627-4-philmd@oss.qualcomm.com>
2026-06-18 14:27:04 +02:00
Philippe Mathieu-Daudé
ff7ebb3d5e system/memory: Constify various AddressSpace arguments (checks)
Mark the AddressSpace structure const when it is only accessed
read-only.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20260616020359.18627-2-philmd@oss.qualcomm.com>
2026-06-18 14:27:04 +02:00
Stefan Hajnoczi
665f1a0904 Merge tag 'pull-target-arm-20260616' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
 * Implementation of various insns preparatory to FEAT_SVE2p2
 * hw/arm/smmuv3: Make smmuv3 ATS, RIL, SSIDSIZE, and OAS 'auto' properties work
 * hw/pci/pci: Enforce pci_setup_iommu_per_bus() is called only once per bus
 * hw/arm/virt: Introduce Tegra241 CMDQV support for accelerated SMMUv3
 * target/arm: honour CCR.BFHFNMIGN for probed data BusFaults
 * hw/arm/bcm2838: Route I2C interrupts to GIC

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# gpg: Signature made Tue 16 Jun 2026 15:05:17 EDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20260616' of https://gitlab.com/pm215/qemu: (61 commits)
  target/arm: Implement floating-point log and convert to integer (zeroing)
  target/arm: Implement SVE floating-point convert (top, predicated, zeroing)
  target/arm: Enable zeroing in DO_FCVT{N, L}T macros in sve_helper.c
  target/arm: Implement FRINT{32,64}{X,Z}
  target/arm: Implement SCVTF, UCVTF (predicated, zeroing)
  target/arm: Implement Floating-point square root (predicated, zeroing)
  target/arm: Implement Floating-point convert (predicated, zeroing)
  target/arm: Implement Floating-point round to integral value (predicated, zeroing)
  target/arm: Add data argument to do_frint_mode
  target/arm: Implement SVE2 integer unary operations (predicated, zeroing)
  target/arm: Implement SVE reverse doublewords (zeroing)
  target/arm: Implement SVE reverse within elements (zeroing)
  target/arm: Implement SVE bitwise unary operations (predicated, zeroing)
  target/arm: Implement SVE integer unary operations (predicated, zeroing)
  target/arm: Expand DO_ZPZ in translate-sve.c
  target/arm: Enable zeroing in DO_ZPZ macros in sve_helper.c
  target/arm: Rename sve unary predicated patterns
  target/arm: Add feature predicates for SVE2.2 and SME2.2
  hw/arm/bcm2838: Route I2C interrupts to GIC
  target/arm: honour CCR.BFHFNMIGN for probed data BusFaults
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2026-06-17 10:17:03 -04:00
Shameer Kolothum
11b9798c7b memory: Allow RAM device regions to skip IOMMU mapping
Some RAM device regions created with memory_region_init_ram_device_ptr()
are not intended to be P2P DMA targets.

The VFIO listener currently treats all RAM device regions as DMA
capable and attempts to map them into the IOMMU. For regions without
dma-buf backing this fails and prints warnings such as:

  IOMMU_IOAS_MAP failed: Bad address, PCI BAR?

Introduce a MemoryRegion flag (ram_device_skip_iommu_map) to mark RAM
device regions that should not be IOMMU mapped, paired with
memory_region_skip_iommu_map() / memory_region_set_skip_iommu_map()
accessors. When the flag is set, the VFIO listener skips DMA mapping
for that region.

Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Message-id: 20260609112552.378999-21-skolothumtho@nvidia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2026-06-16 11:06:46 +01:00
Shameer Kolothum
9e67a50ea9 system/iommufd: Remove unused viommu pointer from IOMMUFDVeventq
The viommu field is assigned but never used. Callers freeing the
veventq already have access to the IOMMUFDViommu object through other
references, so this field is redundant.

Removing it also simplifies upcoming changes where veventq is
allocated based on the viommu id before the IOMMUFDViommu object is
created (e.g. vendor CMDQV-based veventq allocation).

No functional change.

Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20260609112552.378999-6-skolothumtho@nvidia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2026-06-16 11:06:46 +01:00
Nicolin Chen
b391e41e53 backends/iommufd: Introduce iommufd_backend_viommu_mmap
Add a backend helper to mmap hardware MMIO regions exposed via iommufd for
a vIOMMU instance. This allows user space to access HW-accelerated MMIO
pages provided by the vIOMMU.

The caller is responsible for unmapping the returned region.

Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20260609112552.378999-5-skolothumtho@nvidia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2026-06-16 11:06:46 +01:00
Nicolin Chen
41dae463f4 backends/iommufd: Introduce iommufd_backend_alloc_hw_queue
Add a helper to allocate an iommufd backed HW queue for a vIOMMU.

While at it, define a struct IOMMUFDHWqueue for use by vendor
implementations.

Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20260609112552.378999-4-skolothumtho@nvidia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2026-06-16 11:06:46 +01:00