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[PR #14] [CLOSED] FPMaxNormal should be returned instead of FPInfinity vcvt[t|b] instructions (to half precision) when roundingMode is round-to-zero. #24

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opened 2026-01-31 21:29:25 +00:00 by claunia · 0 comments
claunia commented 2026-01-31 21:29:25 +00:00
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📋 Pull Request Information

Original PR: https://github.com/qemu/qemu/pull/14
Author: @twocode
Created: 8/26/2014
Status: ❌ Closed

Base: master ← Head: master

📝 Commits (1)

  • 0d965b7 FPMaxNormal should be returned instead of FPInfinity vcvt[t|b] instructions (to half precision) when roundingMode is round-to-zero.

📊 Changes

1 file changed (+7 additions, -1 deletions)

View changed files

📝 fpu/softfloat.c (+7 -1)

📄 Description

The inconsistency with real device has existed since time ago. ARMv8 has enabled double-precision to half-precision - vcvt[t|b].f16.f64
also exposes such bug.

According to Page.5020 (DDI0487A), in FPRound():
// Deal with overflow and generate result.
if N != 16 || fpcr.AHP == '0' then // Single, double or IEEE half precision
if biased_exp >= 2^E - 1 then
result = if overflow_to_inf then FPInfinity(sign) else FPMaxNormal(sign);
FPProcessException(FPExc_Overflow, fpcr);
error = 1.0; // Ensure that an Inexact exception occurs
else
result = sign : biased_expN-F-2:0 : int_mantF-1:0;

When round-to-zero, overflow_to_inf is FALSE, FPMaxNormal should be returned.

🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.

## 📋 Pull Request Information **Original PR:** https://github.com/qemu/qemu/pull/14 **Author:** [@twocode](https://github.com/twocode) **Created:** 8/26/2014 **Status:** ❌ Closed **Base:** `master` ← **Head:** `master` --- ### 📝 Commits (1) - [`0d965b7`](https://github.com/qemu/qemu/commit/0d965b790bcb61511607f4aca94c46d43a5b4f71) FPMaxNormal should be returned instead of FPInfinity vcvt[t|b] instructions (to half precision) when roundingMode is round-to-zero. ### 📊 Changes **1 file changed** (+7 additions, -1 deletions) <details> <summary>View changed files</summary> 📝 `fpu/softfloat.c` (+7 -1) </details> ### 📄 Description The inconsistency with real device has existed since time ago. ARMv8 has enabled double-precision to half-precision - vcvt[t|b].f16.f64 also exposes such bug. According to Page.5020 (DDI0487A), in FPRound(): // Deal with overflow and generate result. if N != 16 || fpcr.AHP == '0' then // Single, double or IEEE half precision if biased_exp >= 2^E - 1 then result = if overflow_to_inf then FPInfinity(sign) else FPMaxNormal(sign); FPProcessException(FPExc_Overflow, fpcr); error = 1.0; // Ensure that an Inexact exception occurs else result = sign : biased_expN-F-2:0 : int_mantF-1:0; When round-to-zero, overflow_to_inf is FALSE, FPMaxNormal should be returned. --- <sub>🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.</sub>
claunia added the pull-request label 2026-01-31 21:29:25 +00:00
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Reference: starred/qemu#24
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