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[PR #14] FPMaxNormal should be returned instead of FPInfinity vcvt[t|b] instructions (to half precision) when roundingMode is round-to-zero. #29

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opened 2026-01-31 21:29:26 +00:00 by claunia · 0 comments
claunia commented 2026-01-31 21:29:26 +00:00
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Original Pull Request: https://github.com/qemu/qemu/pull/14

State: closed
Merged: No

The inconsistency with real device has existed since time ago. ARMv8 has enabled double-precision to half-precision - vcvt[t|b].f16.f64
also exposes such bug.

According to Page.5020 (DDI0487A), in FPRound():
// Deal with overflow and generate result.
if N != 16 || fpcr.AHP == '0' then // Single, double or IEEE half precision
if biased_exp >= 2^E - 1 then
result = if overflow_to_inf then FPInfinity(sign) else FPMaxNormal(sign);
FPProcessException(FPExc_Overflow, fpcr);
error = 1.0; // Ensure that an Inexact exception occurs
else
result = sign : biased_expN-F-2:0 : int_mantF-1:0;

When round-to-zero, overflow_to_inf is FALSE, FPMaxNormal should be returned.

**Original Pull Request:** https://github.com/qemu/qemu/pull/14 **State:** closed **Merged:** No --- The inconsistency with real device has existed since time ago. ARMv8 has enabled double-precision to half-precision - vcvt[t|b].f16.f64 also exposes such bug. According to Page.5020 (DDI0487A), in FPRound(): // Deal with overflow and generate result. if N != 16 || fpcr.AHP == '0' then // Single, double or IEEE half precision if biased_exp >= 2^E - 1 then result = if overflow_to_inf then FPInfinity(sign) else FPMaxNormal(sign); FPProcessException(FPExc_Overflow, fpcr); error = 1.0; // Ensure that an Inexact exception occurs else result = sign : biased_expN-F-2:0 : int_mantF-1:0; When round-to-zero, overflow_to_inf is FALSE, FPMaxNormal should be returned.
claunia added the pull-request label 2026-01-31 21:29:26 +00:00
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Reference: starred/qemu#29
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