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32bbab666e
This extension was not ratified with the Zb[abcs] bitmanip extensions. This is the latest draft version (0.93) as implemented by the Ibex core. These instructions are in the reserved encoding space but have not been ratified and could conflict with future ratified instructions. For this reason they are added as a vendor extension to support Ibex's impl. Signed-off-by: James Wainwright <james.wainwright@lowrisc.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260320134254.217123-3-james.wainwright@lowrisc.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
75 lines
2.3 KiB
C
75 lines
2.3 KiB
C
/*
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* QEMU RISC-V CPU CFG
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*
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* Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
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* Copyright (c) 2017-2018 SiFive, Inc.
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* Copyright (c) 2021-2023 PLCT Lab
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef RISCV_CPU_CFG_H
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#define RISCV_CPU_CFG_H
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struct RISCVCPUConfig {
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#define BOOL_FIELD(x) bool x;
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#define TYPED_FIELD(type, x, default) type x;
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#include "cpu_cfg_fields.h.inc"
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};
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typedef struct RISCVCPUConfig RISCVCPUConfig;
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/* Helper functions to test for extensions. */
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static inline bool always_true_p(const RISCVCPUConfig *cfg __attribute__((__unused__)))
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{
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return true;
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}
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static inline bool has_xmips_p(const RISCVCPUConfig *cfg)
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{
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return cfg->ext_xmipscbop || cfg->ext_xmipscmov || cfg->ext_xmipslsp;
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}
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static inline bool has_xthead_p(const RISCVCPUConfig *cfg)
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{
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return cfg->ext_xtheadba || cfg->ext_xtheadbb ||
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cfg->ext_xtheadbs || cfg->ext_xtheadcmo ||
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cfg->ext_xtheadcondmov ||
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cfg->ext_xtheadfmemidx || cfg->ext_xtheadfmv ||
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cfg->ext_xtheadmac || cfg->ext_xtheadmemidx ||
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cfg->ext_xtheadmempair || cfg->ext_xtheadsync;
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}
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#define MATERIALISE_EXT_PREDICATE(ext) \
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static inline bool has_ ## ext ## _p(const RISCVCPUConfig *cfg) \
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{ \
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return cfg->ext_ ## ext ; \
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}
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MATERIALISE_EXT_PREDICATE(xtheadba)
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MATERIALISE_EXT_PREDICATE(xtheadbb)
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MATERIALISE_EXT_PREDICATE(xtheadbs)
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MATERIALISE_EXT_PREDICATE(xtheadcmo)
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MATERIALISE_EXT_PREDICATE(xtheadcondmov)
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MATERIALISE_EXT_PREDICATE(xtheadfmemidx)
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MATERIALISE_EXT_PREDICATE(xtheadfmv)
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MATERIALISE_EXT_PREDICATE(xtheadmac)
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MATERIALISE_EXT_PREDICATE(xtheadmemidx)
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MATERIALISE_EXT_PREDICATE(xtheadmempair)
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MATERIALISE_EXT_PREDICATE(xtheadsync)
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MATERIALISE_EXT_PREDICATE(XVentanaCondOps)
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MATERIALISE_EXT_PREDICATE(xlrbr);
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#endif
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