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614a52cf54
Fixes TCG generation for sh4 `fipr` and `ftrv` instructions. Updates the current logic for these instructions to check the FPSCR register appropriately (according to the sh4 cpu manual, `fipr` and `ftrv` are only defined when the FPSCR register PR flag is 0). Also fixes the mth/nth-vector operands by multiplying by 4 to convert to the correct floating point register offset. Signed-off-by: Randy Schifflin <randy.schifflin@gmail.com> Reviewed-by: Yoshinori Sato <yoshinori.sato@nifty.com> Message-ID: <20260629-fixup-sh4-tcg-fpu-instructions-b4-v1-2-4356b305f971@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>