Introduce the "has_ecdsa" class attribute and enable it for the AST10x0 SBC,
as ECDSA is only supported on this platform.
Add an "sram" link property to the SBC model and initialize a dedicated address
space for accessing the SEC SRAM. This will be used by the ECDSA verify command
to read the public key, signature, and digest from SRAM.
Wrap the SEC SRAM in a container mapped at offset 0. This allows the ECDSA
engine added in a later patch to access the SRAM using relative offsets without
requiring the SBC model to know the SRAM's system address.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260901085238.995968-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
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