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b6726871b9
Add smoke coverage for Octeon QMAC and QMACS fixed-point accumulator instruction paths. The coverage exercises normal accumulation, saturating accumulation, and the sticky saturation flag. Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260608-mips-octeon-missing-insns-v2-v16-21-daef7a0d8b04@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
421 lines
11 KiB
C
421 lines
11 KiB
C
/*
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* Test Octeon-specific user-mode instructions.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include <assert.h>
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#include <stdint.h>
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static uint64_t octeon_baddu(uint64_t rs, uint64_t rt)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[rs]\n\t"
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"move $9, %[rt]\n\t"
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".word 0x71095028\n\t" /* baddu $10, $8, $9 */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [rs] "r" (rs), [rt] "r" (rt)
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: "$8", "$9", "$10");
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return rd;
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}
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static uint64_t octeon_dmul(uint64_t rs, uint64_t rt)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[rs]\n\t"
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"move $9, %[rt]\n\t"
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".word 0x71095003\n\t" /* dmul $10, $8, $9 */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [rs] "r" (rs), [rt] "r" (rt)
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: "$8", "$9", "$10");
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return rd;
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}
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static uint64_t octeon_dpop(uint64_t rs)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[rs]\n\t"
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".word 0x7100502d\n\t" /* dpop $10, $8 */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [rs] "r" (rs)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_seq(uint64_t rs, uint64_t rt)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[rs]\n\t"
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"move $9, %[rt]\n\t"
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".word 0x7109502a\n\t" /* seq $10, $8, $9 */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [rs] "r" (rs), [rt] "r" (rt)
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: "$8", "$9", "$10");
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return rd;
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}
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static uint64_t octeon_sne(uint64_t rs, uint64_t rt)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[rs]\n\t"
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"move $9, %[rt]\n\t"
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".word 0x7109502b\n\t" /* sne $10, $8, $9 */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [rs] "r" (rs), [rt] "r" (rt)
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: "$8", "$9", "$10");
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return rd;
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}
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static uint64_t octeon_vmulu(uint64_t mpl0, uint64_t rs, uint64_t rt)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[mpl0]\n\t"
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"move $9, $0\n\t"
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".word 0x71090008\n\t" /* mtm0 $8, $9 */
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"move $8, %[rs]\n\t"
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"move $9, %[rt]\n\t"
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".word 0x7109500f\n\t" /* vmulu $10, $8, $9 */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [mpl0] "r" (mpl0), [rs] "r" (rs), [rt] "r" (rt)
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: "$8", "$9", "$10");
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return rd;
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}
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static uint64_t octeon_vmm0(uint64_t mpl0, uint64_t p0,
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uint64_t rs, uint64_t rt)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[mpl0]\n\t"
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"move $9, $0\n\t"
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".word 0x71090008\n\t" /* mtm0 $8, $9 */
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"move $8, %[p0]\n\t"
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"move $9, $0\n\t"
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".word 0x71090009\n\t" /* mtp0 $8, $9 */
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"move $8, %[rs]\n\t"
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"move $9, %[rt]\n\t"
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".word 0x71095010\n\t" /* vmm0 $10, $8, $9 */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [mpl0] "r" (mpl0), [p0] "r" (p0),
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[rs] "r" (rs), [rt] "r" (rt)
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: "$8", "$9", "$10");
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return rd;
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}
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static uint64_t octeon_qmac_lo(uint64_t rs, uint64_t rt, uint64_t lo)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[rs]\n\t"
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"move $9, %[rt]\n\t"
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"mtlo %[lo]\n\t"
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"mthi $0\n\t"
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".word 0x710904d2\n\t" /* qmac.03 $8, $9 */
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"mflo %[rd]\n\t"
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: [rd] "=r" (rd)
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: [rs] "r" (rs), [rt] "r" (rt), [lo] "r" (lo)
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: "$8", "$9");
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return rd;
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}
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static uint64_t octeon_qmacs_state(uint64_t rs, uint64_t rt, uint64_t lo)
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{
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uint64_t hi, rd;
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asm volatile(
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"move $8, %[rs]\n\t"
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"move $9, %[rt]\n\t"
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"mtlo %[lo]\n\t"
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"mthi $0\n\t"
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".word 0x71090012\n\t" /* qmacs.00 $8, $9 */
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"mfhi %[hi]\n\t"
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"mflo %[rd]\n\t"
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: [hi] "=r" (hi), [rd] "=r" (rd)
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: [rs] "r" (rs), [rt] "r" (rt), [lo] "r" (lo)
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: "$8", "$9");
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return ((hi & 1) << 32) | (rd & 0xffffffff);
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}
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static uint64_t octeon_vmm0_zeroes_mpl1(void)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[mpl0]\n\t"
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"move $9, $0\n\t"
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".word 0x71090008\n\t" /* mtm0 $8, $9 */
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"move $8, %[mpl1]\n\t"
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"move $9, $0\n\t"
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".word 0x7109000c\n\t" /* mtm1 $8, $9 */
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"move $8, %[vmm0_rs]\n\t"
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"move $9, $0\n\t"
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".word 0x71095010\n\t" /* vmm0 $10, $8, $9 */
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"move $8, %[vmulu_rs]\n\t"
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"move $9, $0\n\t"
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".word 0x7109500f\n\t" /* vmulu $10, $8, $9 */
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"move $8, $0\n\t"
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"move $9, $0\n\t"
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".word 0x7109500f\n\t" /* vmulu $10, $8, $9 */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [mpl0] "r" (1ULL), [mpl1] "r" (1ULL),
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[vmm0_rs] "r" (2ULL), [vmulu_rs] "r" (1ULL)
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: "$8", "$9", "$10");
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return rd;
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}
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static uint64_t octeon_mtp0_zeroes_p1(void)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[mpl0]\n\t"
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"move $9, $0\n\t"
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".word 0x71090008\n\t" /* mtm0 $8, $9 */
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"move $8, %[p1]\n\t"
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"move $9, $0\n\t"
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".word 0x7109000a\n\t" /* mtp1 $8, $9 */
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"move $8, $0\n\t"
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"move $9, $0\n\t"
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".word 0x71090009\n\t" /* mtp0 $8, $9 */
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"move $8, $0\n\t"
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"move $9, $0\n\t"
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".word 0x7109500f\n\t" /* vmulu $10, $8, $9 */
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"move $8, $0\n\t"
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"move $9, $0\n\t"
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".word 0x7109500f\n\t" /* vmulu $10, $8, $9 */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [mpl0] "r" (0ULL), [p1] "r" (1ULL)
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: "$8", "$9", "$10");
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return rd;
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}
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static uint64_t octeon_cop2_key0_readback(uint64_t value)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[value]\n\t"
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".word 0x48a80104\n\t" /* dmtc2 $8, AES_KEY0 selector */
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".word 0x482a0104\n\t" /* dmfc2 $10, AES_KEY0 selector */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [value] "r" (value)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_cop2_key2_readback(uint64_t value)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[value]\n\t"
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".word 0x48a80106\n\t" /* dmtc2 $8, AES_KEY2 selector */
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".word 0x482a0106\n\t" /* dmfc2 $10, AES_KEY2 selector */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [value] "r" (value)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_cop2_key3_readback(uint64_t value)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[value]\n\t"
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".word 0x48a80107\n\t" /* dmtc2 $8, AES_KEY3 selector */
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".word 0x482a0107\n\t" /* dmfc2 $10, AES_KEY3 selector */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [value] "r" (value)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_cop2_keylength_readback(uint64_t value)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[value]\n\t"
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".word 0x48a80110\n\t" /* dmtc2 $8, AES_KEYLENGTH selector */
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".word 0x482a0110\n\t" /* dmfc2 $10, AES_KEYLENGTH selector */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [value] "r" (value)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_cop2_hsh_dat0_readback(uint64_t value)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[value]\n\t"
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".word 0x48a80040\n\t" /* dmtc2 $8, HSH_DAT0 selector */
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".word 0x482a0040\n\t" /* dmfc2 $10, HSH_DAT0 selector */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [value] "r" (value)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_cop2_crc_len_readback(uint64_t value)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[value]\n\t"
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".word 0x48a81202\n\t" /* dmtc2 $8, CRC_LEN selector */
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".word 0x482a0202\n\t" /* dmfc2 $10, CRC_LEN selector */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [value] "r" (value)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_cop2_crc_poly_reflect_readback(uint64_t value)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[value]\n\t"
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".word 0x48a84210\n\t" /* dmtc2 $8, CRC_POLYNOMIAL_REFLECT selector */
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".word 0x482a0200\n\t" /* dmfc2 $10, CRC_POLYNOMIAL selector */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [value] "r" (value)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_cop2_gfm_mul_reflect_write_readback(uint64_t value)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[value]\n\t"
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".word 0x48a80058\n\t" /* dmtc2 $8, GFM_MUL_REFLECT0 selector */
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".word 0x482a0258\n\t" /* dmfc2 $10, GFM_MUL0 selector */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [value] "r" (value)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_cop2_gfm_mul_reflect_readback(uint64_t value)
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{
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uint64_t rd;
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asm volatile(
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"move $8, %[value]\n\t"
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".word 0x48a80258\n\t" /* dmtc2 $8, GFM_MUL0 selector */
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".word 0x482a0058\n\t" /* dmfc2 $10, GFM_MUL_REFLECT0 selector */
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"move %[rd], $10\n\t"
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: [rd] "=r" (rd)
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: [value] "r" (value)
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: "$8", "$10");
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return rd;
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}
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static uint64_t octeon_rdhwr31_non_decreasing(void)
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{
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uint64_t first, second;
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asm volatile(
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".word 0x7c08f83b\n\t" /* rdhwr $8, $31 */
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".word 0x7c09f83b\n\t" /* rdhwr $9, $31 */
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"move %[first], $8\n\t"
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"move %[second], $9\n\t"
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: [first] "=r" (first), [second] "=r" (second)
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:
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: "$8", "$9");
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return second >= first;
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}
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int main(void)
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{
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assert(octeon_baddu(0x123, 0x0f0) == 0x13);
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assert(octeon_dmul(0x12345678, 0x10) == 0x123456780);
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assert(octeon_dpop(0xf0f0f0f0f0f0f0f0ULL) == 32);
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assert(octeon_seq(0xabc, 0xabc) == 1);
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assert(octeon_seq(0xabc, 0xdef) == 0);
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assert(octeon_sne(0xabc, 0xabc) == 0);
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assert(octeon_sne(0xabc, 0xdef) == 1);
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assert(octeon_qmac_lo(0x0003000000000000ULL, 2, 1) == 13);
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assert(octeon_qmacs_state(1, 1, 0x7ffffffe) == 0x17fffffffULL);
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assert(octeon_qmacs_state(0x8000, 0x8000, 0) == 0x17fffffffULL);
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assert(octeon_vmulu(5, 7, 11) == 46);
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assert(octeon_vmm0(5, 13, 7, 11) == 59);
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assert(octeon_vmm0_zeroes_mpl1() == 0);
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assert(octeon_mtp0_zeroes_p1() == 0);
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assert(octeon_cop2_key0_readback(0x1122334455667788ULL) ==
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0x1122334455667788ULL);
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assert(octeon_cop2_key2_readback(0x8877665544332211ULL) ==
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0x8877665544332211ULL);
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assert(octeon_cop2_key3_readback(0x0102030405060708ULL) ==
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0x0102030405060708ULL);
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assert(octeon_cop2_keylength_readback(0xa5) == 1);
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assert(octeon_cop2_hsh_dat0_readback(0x0102030405060708ULL) ==
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0x0102030405060708ULL);
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assert(octeon_cop2_crc_len_readback(0xb5) == 5);
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assert(octeon_cop2_crc_poly_reflect_readback(0x12345678) == 0x482c6a1e);
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assert(octeon_cop2_gfm_mul_reflect_write_readback(
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0x0123456789abcdefULL) == 0xf7b3d591e6a2c480ULL);
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assert(octeon_cop2_gfm_mul_reflect_readback(
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0xfedcba9876543210ULL) == 0x084c2a6e195d3b7fULL);
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assert(octeon_rdhwr31_non_decreasing());
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return 0;
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}
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