mirror of
https://github.com/qemu/qemu.git
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target-arm queue: * Implementation of various insns preparatory to FEAT_SVE2p2 * hw/arm/smmuv3: Make smmuv3 ATS, RIL, SSIDSIZE, and OAS 'auto' properties work * hw/pci/pci: Enforce pci_setup_iommu_per_bus() is called only once per bus * hw/arm/virt: Introduce Tegra241 CMDQV support for accelerated SMMUv3 * target/arm: honour CCR.BFHFNMIGN for probed data BusFaults * hw/arm/bcm2838: Route I2C interrupts to GIC # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmoxnm0ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3pkwEACvFoqnwXHW7hrRI8LneG38 # uAhRJmyUmuzCFFDL7AF9//eJFL37GuFWekifyzoaQdq3Agwh0rhjH1DXWK1jLCaV # jyidDrdZt7dn7VIgxUbfq9618kHtN16wvCJ1Dvi8YVqShpAKeXWTEj006qujiEth # oRqcHVzu2OeYNEw2wlf9jBWjk8j4Pq9PIho2qC2hALB95zFYjOu4aTcPO0sKnFu/ # DwBQyKPTuO+u7uiv4f12CoRQ1PxsSbpObLARmkaQXlwbKVddgHC0PyZDGKN4jRIy # 7w6A4JTEAnkk5btyPkNSm+iRonBnqrVbWOS7s4sOqQB6T6vCKtFIPh4jpL6Lt0ub # BExwssYLGc/YXkHPUEbxwiV8/8lKkJy89JRUN33HEyDU4N5SiMDElUF5tpXIWK58 # hT25QdARNILK0zahGaVhgzmX3tlBuFn/HeHZAJcRL1xLbbvvGNoNJaGHVU5jlbet # 07191qquh6oVW43vWbg+LuspIYgvdzJWoZ32zVn1ZGH+9+Au3+6K60dMDRA/JLXW # bpdF3ClvQHx34dHw8aVPbkh8Vbnz2C0R7jYTlvvQL5ibHX2jCeCdi6bt3gsZLGMB # j1AX+1MkYKttmfp7HubPkwR/p4VxHJB/MP8XL/oQNTjJGR4/C5qF7xdY3UO0JiaM # Eg0Fyw94SNW7nzziYAYF+A== # =rqLU # -----END PGP SIGNATURE----- # gpg: Signature made Tue 16 Jun 2026 15:05:17 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20260616' of https://gitlab.com/pm215/qemu: (61 commits) target/arm: Implement floating-point log and convert to integer (zeroing) target/arm: Implement SVE floating-point convert (top, predicated, zeroing) target/arm: Enable zeroing in DO_FCVT{N, L}T macros in sve_helper.c target/arm: Implement FRINT{32,64}{X,Z} target/arm: Implement SCVTF, UCVTF (predicated, zeroing) target/arm: Implement Floating-point square root (predicated, zeroing) target/arm: Implement Floating-point convert (predicated, zeroing) target/arm: Implement Floating-point round to integral value (predicated, zeroing) target/arm: Add data argument to do_frint_mode target/arm: Implement SVE2 integer unary operations (predicated, zeroing) target/arm: Implement SVE reverse doublewords (zeroing) target/arm: Implement SVE reverse within elements (zeroing) target/arm: Implement SVE bitwise unary operations (predicated, zeroing) target/arm: Implement SVE integer unary operations (predicated, zeroing) target/arm: Expand DO_ZPZ in translate-sve.c target/arm: Enable zeroing in DO_ZPZ macros in sve_helper.c target/arm: Rename sve unary predicated patterns target/arm: Add feature predicates for SVE2.2 and SME2.2 hw/arm/bcm2838: Route I2C interrupts to GIC target/arm: honour CCR.BFHFNMIGN for probed data BusFaults ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
689 lines
20 KiB
C
689 lines
20 KiB
C
/*
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* iommufd container backend
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*
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* Copyright (C) 2023 Intel Corporation.
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* Copyright Red Hat, Inc. 2023
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*
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* Authors: Yi Liu <yi.l.liu@intel.com>
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* Eric Auger <eric.auger@redhat.com>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "system/iommufd.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "qom/object_interfaces.h"
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#include "qemu/error-report.h"
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#include "migration/cpr.h"
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#include "monitor/monitor.h"
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#include "trace.h"
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#include "hw/vfio/vfio-device.h"
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#include <sys/ioctl.h>
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#include <linux/iommufd.h>
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static const char *iommufd_fd_name(IOMMUFDBackend *be)
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{
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return object_get_canonical_path_component(OBJECT(be));
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}
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static void iommufd_backend_init(Object *obj)
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{
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IOMMUFDBackend *be = IOMMUFD_BACKEND(obj);
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be->fd = -1;
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be->users = 0;
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be->owned = true;
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}
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static void iommufd_backend_finalize(Object *obj)
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{
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IOMMUFDBackend *be = IOMMUFD_BACKEND(obj);
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if (be->owned) {
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close(be->fd);
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be->fd = -1;
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}
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}
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static void iommufd_backend_set_fd(Object *obj, const char *str, Error **errp)
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{
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ERRP_GUARD();
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IOMMUFDBackend *be = IOMMUFD_BACKEND(obj);
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int fd = -1;
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fd = monitor_fd_param(monitor_cur(), str, errp);
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if (fd == -1) {
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error_prepend(errp, "Could not parse remote object fd %s:", str);
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return;
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}
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be->fd = fd;
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be->owned = false;
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trace_iommu_backend_set_fd(be->fd);
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}
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static bool iommufd_backend_can_be_deleted(UserCreatable *uc)
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{
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IOMMUFDBackend *be = IOMMUFD_BACKEND(uc);
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return !be->users;
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}
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static void iommufd_backend_complete(UserCreatable *uc, Error **errp)
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{
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IOMMUFDBackend *be = IOMMUFD_BACKEND(uc);
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const char *name = iommufd_fd_name(be);
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if (!be->owned) {
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/* fd came from the command line. Fetch updated value from cpr state. */
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if (cpr_is_incoming()) {
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be->fd = cpr_find_fd(name, 0);
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} else {
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cpr_save_fd(name, 0, be->fd);
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}
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} else if (!g_file_test("/dev/iommu", G_FILE_TEST_EXISTS)) {
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error_setg(errp, "/dev/iommu does not exist"
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" (is your kernel config missing CONFIG_IOMMUFD?)");
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}
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}
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static void iommufd_backend_class_init(ObjectClass *oc, const void *data)
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{
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UserCreatableClass *ucc = USER_CREATABLE_CLASS(oc);
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ucc->can_be_deleted = iommufd_backend_can_be_deleted;
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ucc->complete = iommufd_backend_complete;
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object_class_property_add_str(oc, "fd", NULL, iommufd_backend_set_fd);
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}
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bool iommufd_change_process_capable(IOMMUFDBackend *be)
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{
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struct iommu_ioas_change_process args = {.size = sizeof(args)};
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/*
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* Call IOMMU_IOAS_CHANGE_PROCESS to verify it is a recognized ioctl.
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* This is a no-op if the process has not changed since DMA was mapped.
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*/
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return !ioctl(be->fd, IOMMU_IOAS_CHANGE_PROCESS, &args);
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}
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bool iommufd_change_process(IOMMUFDBackend *be, Error **errp)
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{
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struct iommu_ioas_change_process args = {.size = sizeof(args)};
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bool ret = !ioctl(be->fd, IOMMU_IOAS_CHANGE_PROCESS, &args);
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if (!ret) {
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error_setg_errno(errp, errno, "IOMMU_IOAS_CHANGE_PROCESS fd %d failed",
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be->fd);
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}
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trace_iommufd_change_process(be->fd, ret);
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return ret;
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}
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bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp)
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{
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int fd;
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if (be->owned && !be->users) {
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fd = cpr_open_fd("/dev/iommu", O_RDWR, iommufd_fd_name(be), 0, errp);
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if (fd < 0) {
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return false;
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}
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be->fd = fd;
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}
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if (!be->users && !vfio_iommufd_cpr_register_iommufd(be, errp)) {
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if (be->owned) {
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close(be->fd);
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be->fd = -1;
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}
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return false;
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}
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be->users++;
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trace_iommufd_backend_connect(be->fd, be->owned, be->users);
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return true;
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}
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void iommufd_backend_disconnect(IOMMUFDBackend *be)
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{
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if (!be->users) {
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goto out;
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}
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be->users--;
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if (!be->users) {
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vfio_iommufd_cpr_unregister_iommufd(be);
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if (be->owned) {
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cpr_delete_fd(iommufd_fd_name(be), 0);
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close(be->fd);
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be->fd = -1;
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}
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}
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out:
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trace_iommufd_backend_disconnect(be->fd, be->users);
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}
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bool iommufd_backend_alloc_ioas(IOMMUFDBackend *be, uint32_t *ioas_id,
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Error **errp)
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{
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int fd = be->fd;
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struct iommu_ioas_alloc alloc_data = {
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.size = sizeof(alloc_data),
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.flags = 0,
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};
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if (ioctl(fd, IOMMU_IOAS_ALLOC, &alloc_data)) {
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error_setg_errno(errp, errno, "Failed to allocate ioas");
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return false;
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}
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*ioas_id = alloc_data.out_ioas_id;
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trace_iommufd_backend_alloc_ioas(fd, *ioas_id);
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return true;
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}
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void iommufd_backend_free_id(IOMMUFDBackend *be, uint32_t id)
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{
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int ret, fd = be->fd;
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struct iommu_destroy des = {
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.size = sizeof(des),
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.id = id,
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};
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ret = ioctl(fd, IOMMU_DESTROY, &des);
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trace_iommufd_backend_free_id(fd, id, ret);
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if (ret) {
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error_report("Failed to free id: %u %m", id);
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}
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}
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int iommufd_backend_map_dma(IOMMUFDBackend *be, uint32_t ioas_id, hwaddr iova,
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uint64_t size, void *vaddr, bool readonly)
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{
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int ret, fd = be->fd;
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struct iommu_ioas_map map = {
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.size = sizeof(map),
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.flags = IOMMU_IOAS_MAP_READABLE |
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IOMMU_IOAS_MAP_FIXED_IOVA,
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.ioas_id = ioas_id,
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.__reserved = 0,
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.user_va = (uintptr_t)vaddr,
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.iova = iova,
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.length = size,
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};
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if (!readonly) {
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map.flags |= IOMMU_IOAS_MAP_WRITEABLE;
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}
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ret = ioctl(fd, IOMMU_IOAS_MAP, &map);
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trace_iommufd_backend_map_dma(fd, ioas_id, iova, size,
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vaddr, readonly, ret);
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if (ret) {
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ret = -errno;
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/* TODO: Not support mapping hardware PCI BAR region for now. */
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if (errno == EFAULT) {
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warn_report("IOMMU_IOAS_MAP failed: %m, PCI BAR?");
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}
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}
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return ret;
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}
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int iommufd_backend_map_file_dma(IOMMUFDBackend *be, uint32_t ioas_id,
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hwaddr iova, uint64_t size,
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int mfd, unsigned long start, bool readonly)
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{
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int ret, fd = be->fd;
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struct iommu_ioas_map_file map = {
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.size = sizeof(map),
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.flags = IOMMU_IOAS_MAP_READABLE |
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IOMMU_IOAS_MAP_FIXED_IOVA,
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.ioas_id = ioas_id,
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.fd = mfd,
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.start = start,
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.iova = iova,
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.length = size,
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};
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if (cpr_is_incoming()) {
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return 0;
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}
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if (!readonly) {
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map.flags |= IOMMU_IOAS_MAP_WRITEABLE;
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}
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ret = ioctl(fd, IOMMU_IOAS_MAP_FILE, &map);
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trace_iommufd_backend_map_file_dma(fd, ioas_id, iova, size, mfd, start,
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readonly, ret);
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if (ret) {
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ret = -errno;
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/* TODO: Not support mapping hardware PCI BAR region for now. */
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if (errno == EFAULT) {
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warn_report("IOMMU_IOAS_MAP_FILE failed: %m, PCI BAR?");
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}
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}
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return ret;
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}
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int iommufd_backend_unmap_dma(IOMMUFDBackend *be, uint32_t ioas_id,
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hwaddr iova, uint64_t size)
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{
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int ret, fd = be->fd;
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struct iommu_ioas_unmap unmap = {
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.size = sizeof(unmap),
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.ioas_id = ioas_id,
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.iova = iova,
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.length = size,
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};
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if (cpr_is_incoming()) {
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return 0;
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}
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ret = ioctl(fd, IOMMU_IOAS_UNMAP, &unmap);
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/*
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* IOMMUFD takes mapping as some kind of object, unmapping
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* nonexistent mapping is treated as deleting a nonexistent
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* object and return ENOENT. This is different from legacy
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* backend which allows it. vIOMMU may trigger a lot of
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* redundant unmapping, to avoid flush the log, treat them
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* as succeess for IOMMUFD just like legacy backend.
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*/
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if (ret && errno == ENOENT) {
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trace_iommufd_backend_unmap_dma_non_exist(fd, ioas_id, iova, size, ret);
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ret = 0;
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} else {
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trace_iommufd_backend_unmap_dma(fd, ioas_id, iova, size, ret);
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}
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if (ret) {
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ret = -errno;
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}
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return ret;
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}
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bool iommufd_backend_alloc_hwpt(IOMMUFDBackend *be, uint32_t dev_id,
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uint32_t pt_id, uint32_t flags,
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uint32_t data_type, uint32_t data_len,
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void *data_ptr, uint32_t *out_hwpt,
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Error **errp)
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{
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int ret, fd = be->fd;
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struct iommu_hwpt_alloc alloc_hwpt = {
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.size = sizeof(struct iommu_hwpt_alloc),
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.flags = flags,
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.dev_id = dev_id,
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.pt_id = pt_id,
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.data_type = data_type,
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.data_len = data_len,
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.data_uptr = (uintptr_t)data_ptr,
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};
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ret = ioctl(fd, IOMMU_HWPT_ALLOC, &alloc_hwpt);
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trace_iommufd_backend_alloc_hwpt(fd, dev_id, pt_id, flags, data_type,
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data_len, (uintptr_t)data_ptr,
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alloc_hwpt.out_hwpt_id, ret);
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if (ret) {
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error_setg_errno(errp, errno, "Failed to allocate hwpt");
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return false;
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}
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*out_hwpt = alloc_hwpt.out_hwpt_id;
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return true;
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}
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bool iommufd_backend_set_dirty_tracking(IOMMUFDBackend *be,
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uint32_t hwpt_id, bool start,
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Error **errp)
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{
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int ret;
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struct iommu_hwpt_set_dirty_tracking set_dirty = {
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.size = sizeof(set_dirty),
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.hwpt_id = hwpt_id,
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.flags = start ? IOMMU_HWPT_DIRTY_TRACKING_ENABLE : 0,
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};
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ret = ioctl(be->fd, IOMMU_HWPT_SET_DIRTY_TRACKING, &set_dirty);
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trace_iommufd_backend_set_dirty(be->fd, hwpt_id, start, ret ? errno : 0);
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if (ret) {
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error_setg_errno(errp, errno,
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"IOMMU_HWPT_SET_DIRTY_TRACKING(hwpt_id %u) failed",
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hwpt_id);
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return false;
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}
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return true;
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}
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bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be,
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uint32_t hwpt_id,
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uint64_t iova, ram_addr_t size,
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uint64_t page_size, uint64_t *data,
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uint64_t flags, Error **errp)
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{
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int ret;
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struct iommu_hwpt_get_dirty_bitmap get_dirty_bitmap = {
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.size = sizeof(get_dirty_bitmap),
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.hwpt_id = hwpt_id,
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.iova = iova,
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.length = size,
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.page_size = page_size,
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.data = (uintptr_t)data,
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.flags = flags,
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};
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ret = ioctl(be->fd, IOMMU_HWPT_GET_DIRTY_BITMAP, &get_dirty_bitmap);
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trace_iommufd_backend_get_dirty_bitmap(be->fd, hwpt_id, iova, size,
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flags, page_size, ret ? errno : 0);
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if (ret) {
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error_setg_errno(errp, errno,
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"IOMMU_HWPT_GET_DIRTY_BITMAP (iova: 0x%"HWADDR_PRIx
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" size: 0x"RAM_ADDR_FMT") failed", iova, size);
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return false;
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}
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return true;
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}
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/*
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* @type can carry a desired HW info type defined in the uapi headers. If caller
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* doesn't have one, indicating it wants the default type, then @type should be
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* zeroed (i.e. IOMMU_HW_INFO_TYPE_DEFAULT).
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*/
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bool iommufd_backend_get_device_info(IOMMUFDBackend *be, uint32_t devid,
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uint32_t *type, void *data, uint32_t len,
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uint64_t *caps, uint8_t *max_pasid_log2,
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Error **errp)
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{
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struct iommu_hw_info info = {
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.flags = (*type) ? IOMMU_HW_INFO_FLAG_INPUT_TYPE : 0,
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.size = sizeof(info),
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.dev_id = devid,
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.data_len = len,
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.data_uptr = (uintptr_t)data,
|
|
.in_data_type = *type,
|
|
};
|
|
|
|
if (ioctl(be->fd, IOMMU_GET_HW_INFO, &info)) {
|
|
error_setg_errno(errp, errno, "Failed to get hardware info");
|
|
return false;
|
|
}
|
|
|
|
g_assert(type);
|
|
*type = info.out_data_type;
|
|
g_assert(caps);
|
|
*caps = info.out_capabilities;
|
|
|
|
if (max_pasid_log2) {
|
|
*max_pasid_log2 = info.out_max_pasid_log2;
|
|
}
|
|
return true;
|
|
}
|
|
|
|
bool iommufd_backend_invalidate_cache(IOMMUFDBackend *be, uint32_t id,
|
|
uint32_t data_type, uint32_t entry_len,
|
|
uint32_t *entry_num, void *data,
|
|
Error **errp)
|
|
{
|
|
int ret, fd = be->fd;
|
|
uint32_t total_entries = *entry_num;
|
|
struct iommu_hwpt_invalidate cache = {
|
|
.size = sizeof(cache),
|
|
.hwpt_id = id,
|
|
.data_type = data_type,
|
|
.entry_len = entry_len,
|
|
.entry_num = total_entries,
|
|
.data_uptr = (uintptr_t)data,
|
|
};
|
|
|
|
ret = ioctl(fd, IOMMU_HWPT_INVALIDATE, &cache);
|
|
trace_iommufd_backend_invalidate_cache(fd, id, data_type, entry_len,
|
|
total_entries, cache.entry_num,
|
|
(uintptr_t)data, ret ? errno : 0);
|
|
*entry_num = cache.entry_num;
|
|
|
|
if (ret) {
|
|
error_setg_errno(errp, errno, "IOMMU_HWPT_INVALIDATE failed:"
|
|
" total %d entries, processed %d entries",
|
|
total_entries, cache.entry_num);
|
|
} else if (total_entries != cache.entry_num) {
|
|
error_setg(errp, "IOMMU_HWPT_INVALIDATE succeed but with unprocessed"
|
|
" entries: total %d entries, processed %d entries."
|
|
" Kernel BUG?!", total_entries, cache.entry_num);
|
|
return false;
|
|
}
|
|
|
|
return !ret;
|
|
}
|
|
|
|
bool iommufd_backend_alloc_viommu(IOMMUFDBackend *be, uint32_t dev_id,
|
|
uint32_t viommu_type, uint32_t hwpt_id,
|
|
void *data_ptr, uint32_t data_len,
|
|
uint32_t *out_viommu_id, Error **errp)
|
|
{
|
|
int ret;
|
|
struct iommu_viommu_alloc alloc_viommu = {
|
|
.size = sizeof(alloc_viommu),
|
|
.type = viommu_type,
|
|
.dev_id = dev_id,
|
|
.hwpt_id = hwpt_id,
|
|
.data_len = data_len,
|
|
.data_uptr = (uintptr_t)data_ptr,
|
|
};
|
|
|
|
ret = ioctl(be->fd, IOMMU_VIOMMU_ALLOC, &alloc_viommu);
|
|
|
|
trace_iommufd_backend_alloc_viommu(be->fd, dev_id, viommu_type, hwpt_id,
|
|
(uintptr_t)data_ptr, data_len,
|
|
alloc_viommu.out_viommu_id, ret);
|
|
if (ret) {
|
|
error_setg_errno(errp, errno, "IOMMU_VIOMMU_ALLOC failed");
|
|
return false;
|
|
}
|
|
|
|
g_assert(out_viommu_id);
|
|
*out_viommu_id = alloc_viommu.out_viommu_id;
|
|
return true;
|
|
}
|
|
|
|
bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, uint32_t dev_id,
|
|
uint32_t viommu_id, uint64_t virt_id,
|
|
uint32_t *out_vdev_id, Error **errp)
|
|
{
|
|
int ret;
|
|
struct iommu_vdevice_alloc alloc_vdev = {
|
|
.size = sizeof(alloc_vdev),
|
|
.viommu_id = viommu_id,
|
|
.dev_id = dev_id,
|
|
.virt_id = virt_id,
|
|
};
|
|
|
|
ret = ioctl(be->fd, IOMMU_VDEVICE_ALLOC, &alloc_vdev);
|
|
|
|
trace_iommufd_backend_alloc_vdev(be->fd, dev_id, viommu_id, virt_id,
|
|
alloc_vdev.out_vdevice_id, ret);
|
|
|
|
if (ret) {
|
|
error_setg_errno(errp, errno, "IOMMU_VDEVICE_ALLOC failed");
|
|
return false;
|
|
}
|
|
|
|
g_assert(out_vdev_id);
|
|
*out_vdev_id = alloc_vdev.out_vdevice_id;
|
|
return true;
|
|
}
|
|
|
|
bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id,
|
|
uint32_t type, uint32_t depth,
|
|
uint32_t *out_veventq_id,
|
|
uint32_t *out_veventq_fd, Error **errp)
|
|
{
|
|
int ret;
|
|
struct iommu_veventq_alloc alloc_veventq = {
|
|
.size = sizeof(alloc_veventq),
|
|
.flags = 0,
|
|
.type = type,
|
|
.veventq_depth = depth,
|
|
.viommu_id = viommu_id,
|
|
};
|
|
|
|
ret = ioctl(be->fd, IOMMU_VEVENTQ_ALLOC, &alloc_veventq);
|
|
|
|
trace_iommufd_viommu_alloc_eventq(be->fd, viommu_id, type,
|
|
alloc_veventq.out_veventq_id,
|
|
alloc_veventq.out_veventq_fd, ret);
|
|
if (ret) {
|
|
error_setg_errno(errp, errno, "IOMMU_VEVENTQ_ALLOC failed");
|
|
return false;
|
|
}
|
|
|
|
g_assert(out_veventq_id);
|
|
g_assert(out_veventq_fd);
|
|
*out_veventq_id = alloc_veventq.out_veventq_id;
|
|
*out_veventq_fd = alloc_veventq.out_veventq_fd;
|
|
return true;
|
|
}
|
|
|
|
bool iommufd_backend_alloc_hw_queue(IOMMUFDBackend *be, uint32_t viommu_id,
|
|
uint32_t queue_type, uint32_t index,
|
|
uint64_t addr, uint64_t length,
|
|
uint32_t *out_hw_queue_id, Error **errp)
|
|
{
|
|
int ret;
|
|
struct iommu_hw_queue_alloc alloc_hw_queue = {
|
|
.size = sizeof(alloc_hw_queue),
|
|
.flags = 0,
|
|
.viommu_id = viommu_id,
|
|
.type = queue_type,
|
|
.index = index,
|
|
.nesting_parent_iova = addr,
|
|
.length = length,
|
|
};
|
|
|
|
ret = ioctl(be->fd, IOMMU_HW_QUEUE_ALLOC, &alloc_hw_queue);
|
|
|
|
trace_iommufd_backend_alloc_hw_queue(be->fd, viommu_id, queue_type,
|
|
index, addr, length,
|
|
alloc_hw_queue.out_hw_queue_id, ret);
|
|
if (ret) {
|
|
error_setg_errno(errp, errno, "IOMMU_HW_QUEUE_ALLOC failed");
|
|
return false;
|
|
}
|
|
|
|
g_assert(out_hw_queue_id);
|
|
*out_hw_queue_id = alloc_hw_queue.out_hw_queue_id;
|
|
return true;
|
|
}
|
|
|
|
/*
|
|
* Helper to mmap HW MMIO regions exposed via iommufd for a vIOMMU instance.
|
|
* The caller is responsible for unmapping the mapped region.
|
|
*/
|
|
bool iommufd_backend_viommu_mmap(IOMMUFDBackend *be, uint32_t viommu_id,
|
|
uint64_t size, off_t offset, void **out_ptr,
|
|
Error **errp)
|
|
{
|
|
g_assert(viommu_id);
|
|
g_assert(out_ptr);
|
|
|
|
*out_ptr = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, be->fd,
|
|
offset);
|
|
trace_iommufd_backend_viommu_mmap(be->fd, viommu_id, size, offset);
|
|
if (*out_ptr == MAP_FAILED) {
|
|
error_setg_errno(errp, errno, "IOMMUFD vIOMMU mmap failed");
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,
|
|
uint32_t pasid, uint32_t hwpt_id,
|
|
Error **errp)
|
|
{
|
|
HostIOMMUDeviceIOMMUFDClass *hiodic =
|
|
HOST_IOMMU_DEVICE_IOMMUFD_GET_CLASS(hiodi);
|
|
|
|
g_assert(hiodic->attach_hwpt);
|
|
return hiodic->attach_hwpt(hiodi, pasid, hwpt_id, errp);
|
|
}
|
|
|
|
bool host_iommu_device_iommufd_detach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,
|
|
uint32_t pasid, Error **errp)
|
|
{
|
|
HostIOMMUDeviceIOMMUFDClass *hiodic =
|
|
HOST_IOMMU_DEVICE_IOMMUFD_GET_CLASS(hiodi);
|
|
|
|
g_assert(hiodic->detach_hwpt);
|
|
return hiodic->detach_hwpt(hiodi, pasid, errp);
|
|
}
|
|
|
|
static int hiod_iommufd_get_cap(HostIOMMUDevice *hiod, int cap, Error **errp)
|
|
{
|
|
HostIOMMUDeviceCaps *caps = &hiod->caps;
|
|
|
|
switch (cap) {
|
|
case HOST_IOMMU_DEVICE_CAP_IOMMU_TYPE:
|
|
return caps->type;
|
|
case HOST_IOMMU_DEVICE_CAP_AW_BITS:
|
|
return vfio_device_get_aw_bits(hiod->agent);
|
|
default:
|
|
error_setg(errp, "%s: unsupported capability %x", hiod->name, cap);
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
static bool hiod_iommufd_get_pasid_info(HostIOMMUDevice *hiod,
|
|
PasidInfo *pasid_info)
|
|
{
|
|
HostIOMMUDeviceCaps *caps = &hiod->caps;
|
|
|
|
if (!caps->max_pasid_log2) {
|
|
return false;
|
|
}
|
|
|
|
g_assert(pasid_info);
|
|
pasid_info->exec_perm = (caps->hw_caps & IOMMU_HW_CAP_PCI_PASID_EXEC);
|
|
pasid_info->priv_mod = (caps->hw_caps & IOMMU_HW_CAP_PCI_PASID_PRIV);
|
|
pasid_info->max_pasid_log2 = caps->max_pasid_log2;
|
|
return true;
|
|
}
|
|
|
|
static void hiod_iommufd_class_init(ObjectClass *oc, const void *data)
|
|
{
|
|
HostIOMMUDeviceClass *hiodc = HOST_IOMMU_DEVICE_CLASS(oc);
|
|
|
|
hiodc->get_cap = hiod_iommufd_get_cap;
|
|
hiodc->get_pasid_info = hiod_iommufd_get_pasid_info;
|
|
};
|
|
|
|
static const TypeInfo types[] = {
|
|
{
|
|
.name = TYPE_IOMMUFD_BACKEND,
|
|
.parent = TYPE_OBJECT,
|
|
.instance_size = sizeof(IOMMUFDBackend),
|
|
.instance_init = iommufd_backend_init,
|
|
.instance_finalize = iommufd_backend_finalize,
|
|
.class_size = sizeof(IOMMUFDBackendClass),
|
|
.class_init = iommufd_backend_class_init,
|
|
.interfaces = (const InterfaceInfo[]) {
|
|
{ TYPE_USER_CREATABLE },
|
|
{ }
|
|
}
|
|
}, {
|
|
.name = TYPE_HOST_IOMMU_DEVICE_IOMMUFD,
|
|
.parent = TYPE_HOST_IOMMU_DEVICE,
|
|
.instance_size = sizeof(HostIOMMUDeviceIOMMUFD),
|
|
.class_size = sizeof(HostIOMMUDeviceIOMMUFDClass),
|
|
.class_init = hiod_iommufd_class_init,
|
|
.abstract = true,
|
|
}
|
|
};
|
|
|
|
DEFINE_TYPES(types)
|