Philippe Mathieu-Daudé 3504f104ea accel/tcg: Restrict CPU_TLB_DYN_*_BITS definitions to accel/tcg/ ...

CPU_TLB_DYN_*_BITS definitions are only used by accel/tcg/cputlb.c
and accel/tcg/translate-all.c. Move them to accel/tcg/tb-internal.h.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250305191859.71608-1-philmd@linaro.org>

2025-03-07 07:53:44 -08:00

..

abi_ptr.h

…

address-spaces.h

…

breakpoint.h

…

cpu_ldst.h

…

cpu-all.h

…

cpu-common.h

system/physmem: handle hugetlb correctly in qemu_ram_remap()

2025-02-12 11:33:13 -05:00

cpu-defs.h

accel/tcg: Restrict CPU_TLB_DYN_*_BITS definitions to accel/tcg/

2025-03-07 07:53:44 -08:00

cputlb.h

…

exec-all.h

accel/tcg: Restrict tlb_init() / destroy() to TCG

2025-03-06 15:46:17 +01:00

gdbstub.h

…

helper-gen-common.h

…

helper-gen.h

…

helper-gen.h.inc

…

helper-head.h.inc

…

helper-info.c.inc

…

helper-proto-common.h

…

helper-proto.h

…

helper-proto.h.inc

…

hwaddr.h

…

ioport.h

…

log.h

…

memattrs.h

physmem: teach cpu_memory_rw_debug() to write to more memory regions

2025-02-12 11:33:13 -05:00

memop.h

…

memopidx.h

…

memory_ldst_cached.h.inc

…

memory_ldst_phys.h.inc

…

memory_ldst.h.inc

…

memory-internal.h

…

memory.h

physmem: teach cpu_memory_rw_debug() to write to more memory regions

2025-02-12 11:33:13 -05:00

mmu-access-type.h

…

page-protection.h

qemu/compiler: Absorb 'clang-tsa.h'

2025-03-06 14:21:25 +01:00

page-vary.h

…

plugin-gen.h

…

poison.h

include: Poison TARGET_PHYS_ADDR_SPACE_BITS definition

2025-03-06 15:46:18 +01:00

ram_addr.h

…

ramblock.h

…

ramlist.h

…

replay-core.h

…

target_long.h

…

target_page.h

…

tb-flush.h

…

tlb-common.h

include/exec: Use uintptr_t in CPUTLBEntry

2025-02-18 08:29:02 -08:00

translation-block.h

…

translator.h

…

tswap.h

…

vaddr.h

include/exec: Change vaddr to uintptr_t

2025-02-18 08:29:02 -08:00