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129 lines
3.8 KiB
C
129 lines
3.8 KiB
C
/*
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* Aspeed Machines
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*
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* Copyright 2018 IBM Corp.
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*/
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#ifndef ARM_ASPEED_H
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#define ARM_ASPEED_H
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#include "hw/core/boards.h"
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#include "qom/object.h"
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#include "hw/arm/aspeed_soc.h"
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typedef struct AspeedMachineState AspeedMachineState;
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#define TYPE_ASPEED_MACHINE MACHINE_TYPE_NAME("aspeed")
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typedef struct AspeedMachineClass AspeedMachineClass;
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DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass,
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ASPEED_MACHINE, TYPE_ASPEED_MACHINE)
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#define ASPEED_MAC0_ON (1 << 0)
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#define ASPEED_MAC1_ON (1 << 1)
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#define ASPEED_MAC2_ON (1 << 2)
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#define ASPEED_MAC3_ON (1 << 3)
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/* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
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#if HOST_LONG_BITS == 32
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#define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB)
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#else
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#define ASPEED_RAM_SIZE(sz) (sz)
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#endif
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struct AspeedMachineState {
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MachineState parent_obj;
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AspeedSoCState *soc;
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MemoryRegion boot_rom;
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bool mmio_exec;
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uint32_t uart_chosen;
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char *fmc_model;
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char *spi_model;
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uint32_t hw_strap1;
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};
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struct AspeedMachineClass {
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MachineClass parent_obj;
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const char *name;
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const char *desc;
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const char *soc_name;
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uint32_t hw_strap1;
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uint32_t hw_strap2;
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const char *fmc_model;
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const char *spi_model;
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const char *spi2_model;
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uint32_t num_cs;
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uint32_t num_cs2;
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uint32_t macs_mask;
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void (*i2c_init)(AspeedMachineState *bmc);
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uint32_t uart_default;
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bool sdhci_wp_inverted;
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bool vbootrom;
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};
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/*
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* aspeed_machine_class_init_cpus_defaults:
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* @mc: the #MachineClass to be initialized.
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*
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* Initialize the default CPU configuration for an Aspeed machine class.
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* This function sets the default, minimum, and maximum CPU counts
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* to match the number of CPUs defined in the associated SoC class,
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* and copies its list of valid CPU types.
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*/
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void aspeed_machine_class_init_cpus_defaults(MachineClass *mc);
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/*
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* aspeed_create_pca9552:
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* @soc: pointer to the #AspeedSoCState.
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* @bus_id: the I2C bus index to attach the device.
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* @addr: the I2C address of the PCA9552 device.
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*
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* Create and attach a PCA9552 LED controller device to the specified I2C bus
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* of the given Aspeed SoC. The device is instantiated using
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* i2c_slave_create_simple() with the PCA9552 device type.
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*/
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void aspeed_create_pca9552(AspeedSoCState *soc, int bus_id, int addr);
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/*
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* aspeed_create_pca9554:
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* @soc: pointer to the #AspeedSoCState.
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* @bus_id: the I2C bus index to attach the device.
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* @addr: the I2C address of the PCA9554 device.
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*
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* Create and attach a PCA9554 I/O expander to the specified I2C bus
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* of the given Aspeed SoC. The device is created via
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* i2c_slave_create_simple() and returned as an #I2CSlave pointer.
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*
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* Returns: a pointer to the newly created #I2CSlave instance.
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*/
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I2CSlave *aspeed_create_pca9554(AspeedSoCState *soc, int bus_id, int addr);
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/*
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* aspeed_machine_ast2600_class_emmc_init:
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* @oc: the #ObjectClass to initialize.
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*
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* Initialize eMMC-related properties for the AST2600 Aspeed machine class.
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* This function is typically invoked during class initialization to set up
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* default configuration or attach eMMC-specific devices for AST2600 platforms.
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*/
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void aspeed_machine_ast2600_class_emmc_init(ObjectClass *oc);
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/*
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* aspeed_connect_serial_hds_to_uarts:
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* @bmc: pointer to the #AspeedMachineState.
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*
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* Connect host serial backends (character devices) to the UART interfaces
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* of the Aspeed SoC used by the given BMC machine.
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*
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* The function assigns `serial_hd(0)` to the primary UART channel
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* (either chosen via `bmc->uart_chosen` or the machine class default),
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* and iteratively connects remaining serial ports to other available UARTs
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* on the SoC based on their index.
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*/
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void aspeed_connect_serial_hds_to_uarts(AspeedMachineState *bmc);
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#endif
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