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cf884c075e
The macro is no longer in use and can safely be dropped. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com> Signed-off-by: Anton Johansson <anjo@rev.ng> Message-ID: <20260218-phys_addr-v6-7-a603bf363218@rev.ng> [PMD: Keep TARGET_PHYS_ADDR_SPACE_BITS poisoned] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
29 lines
689 B
C
29 lines
689 B
C
/*
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* MicroBlaze cpu parameters for qemu.
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*
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* Copyright (c) 2009 Edgar E. Iglesias
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* SPDX-License-Identifier: LGPL-2.0-or-later
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*/
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#ifndef MICROBLAZE_CPU_PARAM_H
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#define MICROBLAZE_CPU_PARAM_H
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/*
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* While system mode can address up to 64 bits of address space,
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* this is done via the lea/sea instructions, which are system-only
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* (as they also bypass the mmu).
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*
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* We can improve the user-only experience by only exposing 32 bits
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* of address space.
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*/
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#ifdef CONFIG_USER_ONLY
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#define TARGET_VIRT_ADDR_SPACE_BITS 32
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#else
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#define TARGET_VIRT_ADDR_SPACE_BITS 64
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#endif
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/* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */
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#define TARGET_PAGE_BITS 12
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#endif
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