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900682c572
* Remove deprecated 'highbank' and 'midway' machines * hw/arm: Add missing dependencies for STM32F405 SoC * hw/arm/smmuv3-accel: Read and propagate host vIOMMU events * Minor MAINTAINERS updates * target/arm: Improve logging of migration errors due to system register mismatches between source and destination * hw/arm/aspeed_gpio: Don't leak string in aspeed_gpio_init() * tests/qtest/iommu-smmuv3-test: Free QPCIDevice * chardev: Fix various sanitizer detected leaks * tests/qtest/test-x86-cpuid-compat: Free allocated memory * tests/qtest/qos-test: Plug a couple of leaks * hw/arm/smmuv3: Fix various minor bugs * hvf/arm: expose FEAT_SME2 to guest if available * hvf/arm: drop unneeded includes # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmmq+VsZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lA0D/0YGr838hSBG1ugMp3WCgF6 # AjPUems5HMjuX1LBJwVF3cAekDTVrsXklqiSQHeOYnV9bq5wu87evRo7+uiOUZ3v # i6nxFup8ncdbGBEUqDZHxafNDuBXfOwtcKvmE4eFy+QTDv63Mb58c4v3U2/Rq7/k # EHaIzziHThU/pj4XLcsrY3DPVl87zw8q409J8UBcGTBicQli1bO1dxv8O3fbnarF # /TKhdWwPmAHmMhGA7p9WOvWiXQGNUDo2M84yK3o5HxEysZB3FKcJgQauVjvvFLrt # 9nJUtZlV09sYGX0PKavNhpxSy08hnwxrrPzlbWC2WB7nvRYl5IJsO8wjZgqEwSBt # 2EZ0IznT8YyvL+KSIo+9TvbNqRBWTU/TUbTLnARDj76/kDXvImM/tRtQC9k+jZ6j # afk2IdTPM+L5maTFIahiAf04xWPVPdRax6UCQ/WppOX6rRqZwRyf8JHx1Y0n3uoD # r7kdRtCOkHtg4HC30oAnHF8A5FrCWrxDEahFSyH4MR0FOf+NLoixLmDbk05lb5V5 # jw9JMVQq1W2bOketJord7SqztVq64w1LVUR33WN4SF+m8HVBo7n4GOzVMVue0Zqy # sjMWlv95M9ExlPMhwrvRSL5a1MkU1R2tVAYuuHwfKMETs5NzIeCQp4C7Fx6T7UMu # 3LvSjYWJZ9X64XG+hyhO2A== # =gP/m # -----END PGP SIGNATURE----- # gpg: Signature made Fri Mar 6 15:57:15 2026 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20260306-2' of https://gitlab.com/pm215/qemu: (36 commits) hvf: hvf-all: stop including hvf_arm.h hw/arm: virt: remove hvf_arm.h include hvf/arm: expose FEAT_SME2 to guest if available hvf/arm: handle FEAT_SME2 migration hw/arm/smmuv3: Fix CFGI_CD handling when stage-1 is unsupported hw/arm/smmuv3: Correct SMMUEN field name in CR0 hw/arm/smmuv3-common: Fix incorrect reserved mask for SMMU CR0 register tests/qtest/qos-test: Plug a couple of leaks tests/qtest/test-x86-cpuid-compat: Free allocated memory chardev: Consolidate yank registration chardev: Don't attempt to unregister yank function more than once chardev: Fix QIOChannel refcount tests/qtest/iommu-smmuv3-test: Free QPCIDevice hw/arm/aspeed_gpio: Don't leak string in aspeed_gpio_init() scripts/lsan_suppressions.txt: Add more leaks scripts: Move lsan_suppressions.txt out of oss-fuzz subdir target/arm/machine: Fix detection of unknown incoming cpregs target/arm/machine: Trace all register mismatches target/arm/machine: Trace cpreg names which do not match on migration target/arm/kvm: Tweak print_register_name() for arm64 system register ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>