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Fix compilation for 32-bit ARM.

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This commit is contained in:
Natalia Portillo
2021-10-05 04:18:11 +01:00
parent f98418c7c0
commit fe8e157f89
8 changed files with 55 additions and 10 deletions
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10
CMakeLists.txt
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@@ -1,4 +1,4 @@
cmake_minimum_required(VERSION 3.20)
cmake_minimum_required(VERSION 3.15)
project("Aaru.Checksums.Native" C)
set(CMAKE_C_STANDARD 90)
@@ -14,12 +14,14 @@ if("${CMAKE_BUILD_TYPE}" MATCHES "Release")
add_compile_options("/arch:SSE2")
endif()
else()
add_compile_options(-flto -ffast-math -O3)
add_compile_options(-ffast-math -O3)
if(${CMAKE_SYSTEM_PROCESSOR} MATCHES "x86_64" OR ${CMAKE_SYSTEM_PROCESSOR} MATCHES "i686" OR ${CMAKE_SYSTEM_PROCESSOR} MATCHES "AMD64")
add_compile_options(-march=core2 -mfpmath=sse -msse3 -mtune=westmere)
add_compile_options(-march=core2 -mfpmath=sse -msse3 -mtune=westmere -flto)
elseif(${CMAKE_SYSTEM_PROCESSOR} MATCHES "aarch64")
add_compile_options(-march=armv8-a)
add_compile_options(-march=armv8-a -flto)
elseif(${CMAKE_SYSTEM_PROCESSOR} MATCHES "armv7l")
add_compile_options(-march=armv7)
endif()
endif()
endif()

2
adler32_neon.c
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@@ -10,7 +10,7 @@
#include "adler32.h"
#include "simd.h"
void adler32_neon(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, uint32_t len)
TARGET_WITH_SIMD void adler32_neon(uint16_t* sum1, uint16_t* sum2, const unsigned char* buf, uint32_t len)
{
/*
* Split Adler-32 into component sums.

2
crc32.c
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@@ -48,12 +48,14 @@ AARU_EXPORT int AARU_CALL crc32_update(crc32_ctx* ctx, const uint8_t* data, uint
#endif
#if defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)
#if __ARM_ARCH >= 8
if(have_arm_crc32())
{
ctx->crc = armv8_crc32_little(ctx->crc, data, len);
return 0;
}
#endif
if(have_neon())
{
ctx->crc = ~crc32_vmull(data, len, ~ctx->crc);

4
crc32.h
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@@ -271,8 +271,10 @@ AARU_EXPORT CLMUL uint32_t AARU_CALL crc32_clmul(const uint8_t* src, long len, u
#endif
#if defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)
#if __ARM_ARCH >= 8
AARU_EXPORT TARGET_ARMV8_WITH_CRC uint32_t AARU_CALL armv8_crc32_little(uint32_t crc,
const unsigned char* buf,
uint32_t len);
AARU_EXPORT TARGET_WITH_SIMD uint32_t AARU_CALL crc32_vmull(const uint8_t* src, long len, uint32_t initial_crc);
#endif
AARU_EXPORT TARGET_WITH_SIMD uint32_t AARU_CALL crc32_vmull(const uint8_t* src, long len, uint32_t initial_crc);
#endif

2
crc32_arm_simd.c
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@@ -2,7 +2,7 @@
// Created by claunia on 29/9/21.
//
#if defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)
#if(defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)) && __ARM_ARCH >= 8
#include <arm_acle.h>

2
crc32_vmull.c
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@@ -112,7 +112,7 @@ FORCE_INLINE TARGET_WITH_SIMD uint64x2_t sse2neon_vmull_p64(uint64x1_t _a, uint6
return vreinterpretq_u64_u8(r);
}
FORCE_INLINE uint64x2_t mm_shuffle_epi8(uint64x2_t a, uint64x2_t b)
FORCE_INLINE TARGET_WITH_SIMD uint64x2_t mm_shuffle_epi8(uint64x2_t a, uint64x2_t b)
{
uint8x16_t tbl = vreinterpretq_u8_u64(a); // input a
uint8x16_t idx = vreinterpretq_u8_u64(b); // input b

41
simd.h
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@@ -41,20 +41,57 @@ AARU_EXPORT int have_arm_crypto(void);
#if defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)
#ifndef __ARM_FEATURE_CRC32
#define __ARM_FEATURE_CRC32 1
#endif
#ifdef _MSC_VER
#define TARGET_ARMV8_WITH_CRC
#define TARGET_WITH_CRYPTO
#define TARGET_WITH_SIMD
#else // _MSC_VER
#if defined(__aarch64__) || defined(_M_ARM64)
#ifdef __clang__
#define TARGET_ARMV8_WITH_CRC __attribute__((target("crc")))
#else
#define TARGET_ARMV8_WITH_CRC __attribute__((target("+crc")))
#endif
#ifdef __clang__
#define TARGET_WITH_CRYPTO __attribute__((target("crypto")))
#else
#define TARGET_WITH_CRYPTO __attribute__((target("+crypto")))
#endif
#define TARGET_WITH_SIMD
#else
#if __ARM_ARCH >= 8
#ifdef __clang__
#define TARGET_ARMV8_WITH_CRC __attribute__((target("armv8-a,crc")))
#define TARGET_WITH_CRYPTO __attribute__((target("+crc")))
#define TARGET_WITH_SIMD __attribute__((target("+neon")))
#else
#define TARGET_ARMV8_WITH_CRC __attribute__((target("arch=armv8-a+crc")))
#endif
#endif // __ARM_ARCH >= 8
#ifdef __clang__
#define TARGET_WITH_CRYPTO __attribute__((target("armv8-a,crypto")))
#else
#define TARGET_WITH_CRYPTO __attribute__((target("fpu=crypto-neon-fp-armv8")))
#endif
#ifdef __clang__
#define TARGET_WITH_SIMD __attribute__((target("neon")))
#else
#define TARGET_WITH_SIMD __attribute__((target("fpu=neon")))
#endif
#endif // __aarch64__ || _M_ARM64
#endif // _MSC_VER

2
tests/crc32.cpp
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@@ -81,6 +81,7 @@ TEST_F(crc32Fixture, crc32_clmul)
#endif
#if defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)
#if __ARM_ARCH >= 8
TEST_F(crc32Fixture, crc32_arm_crc32)
{
if(!have_arm_crc32()) return;
@@ -93,6 +94,7 @@ TEST_F(crc32Fixture, crc32_arm_crc32)
EXPECT_EQ(crc, EXPECTED_CRC32);
}
#endif
TEST_F(crc32Fixture, crc32_vmull)
{