Commit Graph

18 Commits

Author SHA1 Message Date
bd5051ce18 General refactor and cleanup. 2024-04-30 15:12:48 +01:00
1905cb0d43 Refactor and reformat. 2023-09-23 18:55:52 +01:00
d4a607345e Lower ARM architecture requirement for CRC32 instructions.
The changes ensure compatibility with compilers targeting ARMv7.
32-bit processors of architecture 8 and higher, or 64-bit processors running in 32-bit mode can have the CRC32 instructions.
With this change we will query the processor instead of the compiler architecture.
2023-09-23 00:53:23 +01:00
7e9f26e2df Update copyright year. 2022-12-01 23:06:20 +00:00
58f97a93f3 Refactor code. 2021-10-13 03:46:47 +01:00
ca65d12c7e Fix header guards. 2021-10-13 03:30:02 +01:00
134709f90f Set file headers. 2021-10-13 03:25:16 +01:00
8d77838be2 Fix compilation on ARM and ARM64 using MSVC. 2021-10-13 00:41:58 +01:00
09f91a4116 Fix compilation in MSVC (x64). 2021-10-12 23:25:54 +01:00
fe8e157f89 Fix compilation for 32-bit ARM. 2021-10-05 04:39:13 +01:00
a9c49a64b4 Add unit tests for Adler-32. 2021-10-05 04:39:12 +01:00
cd4f90e360 Fix SIMD definitions and add more definitions for ARM. 2021-10-05 00:30:24 +01:00
d433af7987 Add ARM special instructions implementation for CRC32. 2021-09-29 02:49:40 +01:00
2458863cb4 Add NEON implementation for Adler32. 2021-09-29 01:27:02 +01:00
fe773bd1b6 Add AVX2 implementation for Adler32. 2021-09-28 22:30:57 +01:00
00a8cb8668 Add SSSE3 implementation for Adler32. 2021-09-28 20:16:40 +01:00
b384450383 Guard SIMD file only for x86 and amd64. 2021-09-26 19:44:47 +01:00
6b45dd6e5b Condition compilation of CLMUL to IA32/AMD64 and check if it's available before executing. 2021-09-26 17:37:50 +01:00