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https://github.com/aaru-dps/Aaru.Checksums.Native.git
synced 2025-12-16 11:14:29 +00:00
114 lines
2.6 KiB
C
114 lines
2.6 KiB
C
#include "simd.h"
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#if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \
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defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86)
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#ifdef _MSC_VER
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#include <intrin.h>
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#else
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/*
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* Newer versions of GCC and clang come with cpuid.h
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* (ftr GCC 4.7 in Debian Wheezy has this)
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*/
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#include <cpuid.h>
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#endif
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static void cpuid(int info, unsigned* eax, unsigned* ebx, unsigned* ecx, unsigned* edx)
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{
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#ifdef _MSC_VER
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unsigned int registers[4];
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__cpuid(registers, info);
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*eax = registers[0];
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*ebx = registers[1];
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*ecx = registers[2];
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*edx = registers[3];
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#else
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/* GCC, clang */
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unsigned int _eax;
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unsigned int _ebx;
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unsigned int _ecx;
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unsigned int _edx;
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__cpuid(info, _eax, _ebx, _ecx, _edx);
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*eax = _eax;
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*ebx = _ebx;
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*ecx = _ecx;
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*edx = _edx;
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#endif
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}
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static void cpuidex(int info, int count, unsigned* eax, unsigned* ebx, unsigned* ecx, unsigned* edx)
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{
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#ifdef _MSC_VER
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unsigned int registers[4];
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__cpuidex(registers, info, count);
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*eax = registers[0];
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*ebx = registers[1];
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*ecx = registers[2];
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*edx = registers[3];
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#else
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/* GCC, clang */
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unsigned int _eax;
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unsigned int _ebx;
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unsigned int _ecx;
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unsigned int _edx;
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__cpuid_count(info, count, _eax, _ebx, _ecx, _edx);
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*eax = _eax;
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*ebx = _ebx;
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*ecx = _ecx;
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*edx = _edx;
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#endif
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}
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int have_clmul(void)
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{
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unsigned eax, ebx, ecx, edx;
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int has_pclmulqdq;
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int has_sse41;
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cpuid(1 /* feature bits */, &eax, &ebx, &ecx, &edx);
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has_pclmulqdq = ecx & 0x2; /* bit 1 */
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has_sse41 = ecx & 0x80000; /* bit 19 */
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return has_pclmulqdq && has_sse41;
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}
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int have_ssse3(void)
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{
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unsigned eax, ebx, ecx, edx;
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cpuid(1 /* feature bits */, &eax, &ebx, &ecx, &edx);
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return ecx & 0x200;
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}
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int have_avx2(void)
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{
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unsigned eax, ebx, ecx, edx;
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cpuidex(7 /* extended feature bits */, 0, &eax, &ebx, &ecx, &edx);
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return ebx & 0x20;
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}
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#endif
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#if defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)
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#include <sys/auxv.h>
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#endif
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#if defined(__aarch64__) || defined(_M_ARM64)
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int have_neon(void)
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{
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return 1; // ARMv8-A made it mandatory
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}
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int have_arm_crc32(void) { return getauxval(AT_HWCAP) & HWCAP_CRC32; }
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int have_arm_crypto(void) { return getauxval(AT_HWCAP) & HWCAP_AES; }
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#endif
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#if defined(__arm__) || defined(_M_ARM)
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int have_neon(void) { return getauxval(AT_HWCAP) & HWCAP_NEON; }
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int have_arm_crc32(void) { return getauxval(AT_HWCAP2) & HWCAP2_CRC32; }
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int have_arm_crypto(void) { return getauxval(AT_HWCAP2) & HWCAP2_AES; }
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#endif |