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https://github.com/aaru-dps/libaaruformat.git
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Implement SIMD helper functions.
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228
src/simd.c
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228
src/simd.c
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// /***************************************************************************
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// Aaru Data Preservation Suite
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// ----------------------------------------------------------------------------
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//
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// Filename : simd.c
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// Author(s) : Natalia Portillo <claunia@claunia.com>
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//
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// Component : libaaruformat.
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//
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// --[ Description ] ----------------------------------------------------------
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//
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// Detects SIMD availability.
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//
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// --[ License ] --------------------------------------------------------------
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//
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// This library is free software; you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as
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// published by the Free Software Foundation; either version 2.1 of the
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// License, or (at your option) any later version.
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//
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// This library is distributed in the hope that it will be useful, but
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// WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Lesser General Public License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public
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// License along with this library; if not, see <http://www.gnu.org/licenses/>.
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//
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// ----------------------------------------------------------------------------
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// Copyright © 2011-2022 Natalia Portillo
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// ****************************************************************************/
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#include <stddef.h>
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#include <stdint.h>
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#include <aaruformat.h>
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#if defined(__x86_64__) || defined(__amd64) || defined(_M_AMD64) || defined(_M_X64) || defined(__I386__) || \
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defined(__i386__) || defined(__THW_INTEL) || defined(_M_IX86)
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#ifdef _MSC_VER
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#include <intrin.h>
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#else
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/*
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* Newer versions of GCC and clang come with cpuid.h
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* (ftr GCC 4.7 in Debian Wheezy has this)
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*/
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#include <cpuid.h>
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#endif
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static void cpuid(int info, unsigned* eax, unsigned* ebx, unsigned* ecx, unsigned* edx)
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{
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#ifdef _MSC_VER
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unsigned int registers[4];
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__cpuid(registers, info);
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*eax = registers[0];
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*ebx = registers[1];
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*ecx = registers[2];
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*edx = registers[3];
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#else
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/* GCC, clang */
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unsigned int _eax;
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unsigned int _ebx;
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unsigned int _ecx;
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unsigned int _edx;
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__cpuid(info, _eax, _ebx, _ecx, _edx);
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*eax = _eax;
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*ebx = _ebx;
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*ecx = _ecx;
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*edx = _edx;
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#endif
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}
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static void cpuidex(int info, int count, unsigned* eax, unsigned* ebx, unsigned* ecx, unsigned* edx)
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{
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#ifdef _MSC_VER
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unsigned int registers[4];
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__cpuidex(registers, info, count);
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*eax = registers[0];
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*ebx = registers[1];
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*ecx = registers[2];
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*edx = registers[3];
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#else
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/* GCC, clang */
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unsigned int _eax;
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unsigned int _ebx;
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unsigned int _ecx;
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unsigned int _edx;
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__cpuid_count(info, count, _eax, _ebx, _ecx, _edx);
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*eax = _eax;
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*ebx = _ebx;
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*ecx = _ecx;
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*edx = _edx;
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#endif
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}
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int have_clmul()
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{
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unsigned eax, ebx, ecx, edx;
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int has_pclmulqdq;
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int has_sse41;
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cpuid(1 /* feature bits */, &eax, &ebx, &ecx, &edx);
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has_pclmulqdq = ecx & 0x2; /* bit 1 */
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has_sse41 = ecx & 0x80000; /* bit 19 */
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return has_pclmulqdq && has_sse41;
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}
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int have_ssse3()
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{
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unsigned eax, ebx, ecx, edx;
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cpuid(1 /* feature bits */, &eax, &ebx, &ecx, &edx);
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return ecx & 0x200;
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}
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int have_avx2()
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{
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unsigned eax, ebx, ecx, edx;
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cpuidex(7 /* extended feature bits */, 0, &eax, &ebx, &ecx, &edx);
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return ebx & 0x20;
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}
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#endif
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#if defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)
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#if defined(_WIN32)
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#include <windows.h>
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#include <processthreadsapi.h>
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#elif defined(__APPLE__)
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#include <sys/sysctl.h>
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#else
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#include <sys/auxv.h>
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#endif
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#endif
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#if(defined(__aarch64__) || defined(_M_ARM64) || defined(__arm__) || defined(_M_ARM)) && defined(__APPLE__)
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int have_neon_apple()
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{
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int value;
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size_t len = sizeof(int);
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int ret = sysctlbyname("hw.optional.neon", &value, &len, NULL, 0);
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if(ret != 0) return 0;
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return value == 1;
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}
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int have_crc32_apple()
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{
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int value;
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size_t len = sizeof(int);
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int ret = sysctlbyname("hw.optional.crc32", &value, &len, NULL, 0);
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if(ret != 0) return 0;
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return value == 1;
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}
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int have_crypto_apple() { return 0; }
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#endif
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#if defined(__aarch64__) || defined(_M_ARM64)
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int have_neon()
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{
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return 1; // ARMv8-A made it mandatory
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}
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int have_arm_crc32()
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{
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#if defined(_WIN32)
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return IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE) != 0;
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#elif defined(__APPLE__)
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return have_crc32_apple();
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#else
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return getauxval(AT_HWCAP) & HWCAP_CRC32;
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#endif
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}
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int have_arm_crypto()
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{
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#if defined(_WIN32)
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return IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) != 0;
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#elif defined(__APPLE__)
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return have_crypto_apple();
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#else
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return getauxval(AT_HWCAP) & HWCAP_AES;
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#endif
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}
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#endif
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#if defined(__arm__) || defined(_M_ARM)
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int have_neon()
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{
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#if defined(_WIN32)
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return IsProcessorFeaturePresent(PF_ARM_VFP_32_REGISTERS_AVAILABLE) != 0;
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#elif defined(__APPLE__)
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return have_neon_apple();
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#else
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return getauxval(AT_HWCAP) & HWCAP_NEON;
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#endif
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}
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int have_arm_crc32()
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{
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#if defined(_WIN32)
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return IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE) != 0;
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#elif defined(__APPLE__)
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return have_crc32_apple();
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#else
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return getauxval(AT_HWCAP2) & HWCAP2_CRC32;
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#endif
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}
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int have_arm_crypto()
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{
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#if defined(_WIN32)
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return IsProcessorFeaturePresent(PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE) != 0;
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#elif defined(__APPLE__)
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return have_crypto_apple();
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#else
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return getauxval(AT_HWCAP2) & HWCAP2_AES;
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#endif
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}
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#endif
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