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86Box/src/video/vid_ati_mach8.c

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Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the 8514/A-compatible Mach8 and Mach32 graphics
* chips from ATI for the ISA/VLB/MCA/PCI buses.
*
*
*
* Authors: TheCollector1995.
*
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
* Copyright 2022-2024 TheCollector1995.
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
*/
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
#include <inttypes.h>
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include <stdatomic.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include <86box/mem.h>
Don't include `cpu.h` in `timer.h` Change the name of the define used to indicate SVGA multi-monitor-capable cards
2025-03-06 19:26:11 +06:00
#include "cpu.h"
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
#include <86box/timer.h>
#include <86box/mca.h>
#include <86box/pci.h>
#include <86box/rom.h>
#include <86box/plat.h>
#include <86box/thread.h>
#include <86box/video.h>
#include <86box/i2c.h>
#include <86box/vid_ddc.h>
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
#include <86box/vid_8514a.h>
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
#include <86box/vid_xga.h>
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
#include <86box/vid_ati_eeprom.h>
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#include <86box/vid_ati_mach8.h>
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
#define BIOS_MACH8_VGA_ROM_PATH "roms/video/mach8/BIOS.BIN"
Switched back to the "Graphics Ultra Pro" ISA-based BIOS as we found the true culprit behind the "brokeness" which is that bit 4 of reg 0xBD of the ATI regs must be set in the reads.
2023-08-15 22:12:30 +02:00
#define BIOS_MACH32_ISA_ROM_PATH "roms/video/mach32/ATi Mach32 Graphics Pro ISA.BIN"
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
#define BIOS_MACH32_VLB_ROM_PATH "roms/video/mach32/MACH32VLB.VBI"
#define BIOS_MACH32_MCA_ROM_PATH "roms/video/mach32/MACH32MCA_Olivetti.BIN"
#define BIOS_MACH32_PCI_ROM_PATH "roms/video/mach32/intelopt_00000.rom"
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Macro Cleaning
2025-02-01 03:29:03 -05:00
static video_timings_t timing_gfxultra_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 };
static video_timings_t timing_mach32_vlb = { .type = VIDEO_BUS, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 20, .read_w = 20, .read_l = 21 };
static video_timings_t timing_mach32_mca = { .type = VIDEO_MCA, .write_b = 4, .write_w = 5, .write_l = 10, .read_b = 5, .read_w = 5, .read_l = 10 };
static video_timings_t timing_mach32_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 20, .read_w = 20, .read_l = 21 };
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
More sonarlint work
2023-06-09 23:46:54 -04:00
static void mach_accel_outb(uint16_t port, uint8_t val, void *priv);
static void mach_accel_outw(uint16_t port, uint16_t val, void *priv);
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
static void mach_accel_outl(uint16_t port, uint32_t val, void *priv);
More sonarlint work
2023-06-09 23:46:54 -04:00
static uint8_t mach_accel_inb(uint16_t port, void *priv);
static uint16_t mach_accel_inw(uint16_t port, void *priv);
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
static uint32_t mach_accel_inl(uint16_t port, void *priv);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Slight cleanup of the 8514/A compatible chips. Hopefully fix various modes altogether in all three chips (640x480, 800x600, 1024x768 and 1280x1024).
2024-01-26 19:03:43 +01:00
static void ati8514_accel_outb(uint16_t port, uint8_t val, void *priv);
static void ati8514_accel_outw(uint16_t port, uint16_t val, void *priv);
static void ati8514_accel_outl(uint16_t port, uint32_t val, void *priv);
static uint8_t ati8514_accel_inb(uint16_t port, void *priv);
static uint16_t ati8514_accel_inw(uint16_t port, void *priv);
static uint32_t ati8514_accel_inl(uint16_t port, void *priv);
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
static void mach_set_resolution(mach_t *mach, svga_t *svga);
Slight cleanup of the 8514/A compatible chips. Hopefully fix various modes altogether in all three chips (640x480, 800x600, 1024x768 and 1280x1024).
2024-01-26 19:03:43 +01:00
static void mach32_updatemapping(mach_t *mach, svga_t *svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
static __inline void mach32_writew_linear(uint32_t addr, uint16_t val, mach_t *mach);
static __inline void mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t *svga);
static mach_t *reset_state = NULL;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
#ifdef ENABLE_MACH_LOG
int mach_do_log = ENABLE_MACH_LOG;
static void
mach_log(const char *fmt, ...)
{
va_list ap;
if (mach_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define mach_log(fmt, ...)
#endif
Macro Cleaning
2025-02-01 03:29:03 -05:00
#define WRITE8(addr, var, val) \
switch ((addr) & 1) { \
case 0: \
var = (var & 0xff00) | (val); \
break; \
case 1: \
var = (var & 0x00ff) | ((val) << 8); \
break; \
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
#define READ8(addr, var) \
switch ((addr) & 1) { \
case 0: \
temp = (var) & 0xff; \
break; \
case 1: \
temp = ((var) >> 8) & 0xff; \
break; \
}
#define READ_PIXTRANS_BYTE_IO(cx, n) \
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if ((mach->accel.cmd_type == 2) || (mach->accel.cmd_type == 5)) { \
Macro Cleaning
2025-02-01 03:29:03 -05:00
if (dev->bpp) { \
if (n == 0) \
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach->accel.pix_trans[(n)] = vram_w[(dev->accel.dest + (cx) + (n)) & (dev->vram_mask >> 1)] & 0xff; \
Macro Cleaning
2025-02-01 03:29:03 -05:00
else \
mach->accel.pix_trans[(n)] = vram_w[(dev->accel.dest + (cx) + (n)) & (dev->vram_mask >> 1)] >> 8; \
} else \
mach->accel.pix_trans[(n)] = dev->vram[(dev->accel.dest + (cx) + (n)) & dev->vram_mask]; \
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Macro Cleaning
2025-02-01 03:29:03 -05:00
#define READ_PIXTRANS_WORD(cx, n) \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if ((cmd == 0) || (cmd == 1) || (cmd == 5) || ((mach->accel.cmd_type == -1) && (cmd != 2))) { \
Macro Cleaning
2025-02-01 03:29:03 -05:00
if (dev->bpp) \
temp = vram_w[((dev->accel.cy * dev->pitch) + (cx) + (n)) & (dev->vram_mask >> 1)]; \
else { \
temp = dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n)) & dev->vram_mask]; \
temp |= (dev->vram[((dev->accel.cy * dev->pitch) + (cx) + (n + 1)) & dev->vram_mask] << 8); \
} \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else if (((cmd == 2) && (mach->accel.cmd_type == -1)) || (mach->accel.cmd_type == 2) || (mach->accel.cmd_type == 5)) { \
Macro Cleaning
2025-02-01 03:29:03 -05:00
if (dev->bpp) \
temp = vram_w[((dev->accel.dest) + (cx) + (n)) & (dev->vram_mask >> 1)]; \
else { \
temp = dev->vram[((dev->accel.dest) + (cx) + (n)) & dev->vram_mask]; \
temp |= (dev->vram[((dev->accel.dest) + (cx) + (n + 1)) & dev->vram_mask] << 8); \
} \
} else if ((mach->accel.cmd_type == 3) || (mach->accel.cmd_type == 4)) { \
if (dev->bpp) \
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
temp = vram_w[(mach->accel.dst_ge_offset + ((dev->accel.cy) * (mach->accel.dst_pitch)) + (cx) + (n)) & (dev->vram_mask >> 1)]; \
Macro Cleaning
2025-02-01 03:29:03 -05:00
else { \
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
temp = dev->vram[(mach->accel.dst_ge_offset + ((dev->accel.cy) * (mach->accel.dst_pitch)) + (cx) + (n)) & dev->vram_mask]; \
temp |= (dev->vram[(mach->accel.dst_ge_offset + ((dev->accel.cy) * (mach->accel.dst_pitch)) + (cx) + (n + 1)) & dev->vram_mask] << 8); \
Macro Cleaning
2025-02-01 03:29:03 -05:00
} \
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Macro Cleaning
2025-02-01 03:29:03 -05:00
#define READ(addr, dat) \
if (dev->bpp) \
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
dat = vram_w[(addr) & (dev->vram_mask >> 1)]; \
Macro Cleaning
2025-02-01 03:29:03 -05:00
else \
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
dat = (dev->vram[(addr) & (dev->vram_mask)]);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Macro Cleaning
2025-02-01 03:29:03 -05:00
#define READ_HIGH(addr, dat) \
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
dat |= (dev->vram[(addr) & (dev->vram_mask)] << 8);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Macro Cleaning
2025-02-01 03:29:03 -05:00
#define MIX(mixmode, dest_dat, src_dat) \
{ \
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
switch ((mixmode) ? dev->accel.frgd_mix : dev->accel.bkgd_mix) { \
Macro Cleaning
2025-02-01 03:29:03 -05:00
case 0x00: \
dest_dat = ~dest_dat; \
break; \
case 0x01: \
dest_dat = 0; \
break; \
case 0x02: \
dest_dat = ~0; \
break; \
case 0x03: \
dest_dat = dest_dat; \
break; \
case 0x04: \
dest_dat = ~src_dat; \
break; \
case 0x05: \
dest_dat = src_dat ^ dest_dat; \
break; \
case 0x06: \
dest_dat = ~(src_dat ^ dest_dat); \
break; \
case 0x07: \
dest_dat = src_dat; \
break; \
case 0x08: \
dest_dat = ~(src_dat & dest_dat); \
break; \
case 0x09: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x11: \
Macro Cleaning
2025-02-01 03:29:03 -05:00
dest_dat = ~src_dat | dest_dat; \
break; \
case 0x0a: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x12: \
Macro Cleaning
2025-02-01 03:29:03 -05:00
dest_dat = src_dat | ~dest_dat; \
break; \
case 0x0b: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x13: \
Macro Cleaning
2025-02-01 03:29:03 -05:00
dest_dat = src_dat | dest_dat; \
break; \
case 0x0c: \
dest_dat = src_dat & dest_dat; \
break; \
case 0x0d: \
dest_dat = src_dat & ~dest_dat; \
break; \
case 0x0e: \
dest_dat = ~src_dat & dest_dat; \
break; \
case 0x0f: \
dest_dat = ~(src_dat | dest_dat); \
break; \
case 0x10: \
dest_dat = MIN(src_dat, dest_dat); \
break; \
case 0x14: \
dest_dat = MAX(src_dat, dest_dat); \
break; \
case 0x15: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = (src_dat | ~dest_dat) >> 1; \
Macro Cleaning
2025-02-01 03:29:03 -05:00
break; \
case 0x16: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = (~src_dat | dest_dat) >> 1; \
Macro Cleaning
2025-02-01 03:29:03 -05:00
break; \
case 0x17: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = (src_dat | dest_dat) >> 1; \
Macro Cleaning
2025-02-01 03:29:03 -05:00
break; \
case 0x18: \
case 0x19: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = MAX(0, ~src_dat | dest_dat); \
Macro Cleaning
2025-02-01 03:29:03 -05:00
break; \
case 0x1a: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = MAX(0, src_dat | ~dest_dat); \
Macro Cleaning
2025-02-01 03:29:03 -05:00
break; \
case 0x1b: \
if (dev->bpp) \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = MIN(0xffff, src_dat | dest_dat); \
Macro Cleaning
2025-02-01 03:29:03 -05:00
else \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = MIN(0xff, src_dat | dest_dat); \
Macro Cleaning
2025-02-01 03:29:03 -05:00
break; \
case 0x1c: \
case 0x1d: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = MAX(0, ~src_dat | dest_dat) >> 1; \
Macro Cleaning
2025-02-01 03:29:03 -05:00
break; \
case 0x1e: \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = MAX(0, src_dat | ~dest_dat) >> 1; \
Macro Cleaning
2025-02-01 03:29:03 -05:00
break; \
case 0x1f: \
if (dev->bpp) \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = (0xffff < (src_dat | dest_dat)) ? 0xffff : ((src_dat | dest_dat) >> 1); \
Macro Cleaning
2025-02-01 03:29:03 -05:00
else \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dest_dat = (0xff < (src_dat | dest_dat)) ? 0xff : ((src_dat | dest_dat) >> 1); \
Macro Cleaning
2025-02-01 03:29:03 -05:00
break; \
} \
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Macro Cleaning
2025-02-01 03:29:03 -05:00
#define WRITE(addr, dat) \
if (dev->bpp) { \
vram_w[((addr)) & (dev->vram_mask >> 1)] = dat; \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->changedvram[(((addr)) & (dev->vram_mask >> 1)) >> 11] = svga->monitor->mon_changeframecount; \
Macro Cleaning
2025-02-01 03:29:03 -05:00
} else { \
dev->vram[((addr)) & (dev->vram_mask)] = dat; \
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->changedvram[(((addr)) & (dev->vram_mask)) >> 12] = svga->monitor->mon_changeframecount; \
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
static int
mach_pixel_write(mach_t *mach)
{
if (mach->accel.dp_config & 1)
return 1;
return 0;
}
static int
mach_pixel_read(mach_t *mach)
{
if (mach->accel.dp_config & 1)
return 0;
return 1;
}
static void
Assorted warning fixes
2025-01-26 15:15:53 -05:00
mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint32_t cpu_dat, UNUSED(svga_t *svga), mach_t *mach, ibm8514_t *dev)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
int compare_mode;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
uint16_t poly_src = 0;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
uint16_t rd_mask = dev->accel.rd_mask;
uint16_t wrt_mask = dev->accel.wrt_mask;
uint16_t dest_cmp_clr = dev->accel.color_cmp;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
uint16_t frgd_color = dev->accel.frgd_color;
uint16_t bkgd_color = dev->accel.bkgd_color;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
int frgd_sel;
int bkgd_sel;
int mono_src;
int compare = 0;
uint16_t src_dat = 0;
uint16_t dest_dat = 0;
uint16_t old_dest_dat;
uint16_t *vram_w = (uint16_t *) dev->vram;
uint16_t mix = 0;
uint32_t mono_dat0 = 0;
uint32_t mono_dat1 = 0;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
int16_t clip_t = dev->accel.clip_top;
int16_t clip_l = dev->accel.clip_left;
int16_t clip_b = dev->accel.clip_bottom;
int16_t clip_r = dev->accel.clip_right;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (clip_l < 0)
clip_l = 0;
if (clip_t < 0)
clip_t = 0;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (!dev->bpp) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
rd_mask &= 0xff;
dest_cmp_clr &= 0xff;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
frgd_color &= 0xff;
bkgd_color &= 0xff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
compare_mode = (mach->accel.dest_cmp_fn >> 3) & 7;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
mono_src = (mach->accel.dp_config >> 5) & 3;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (cpu_input) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((mach->accel.dp_config & 0x200) && (count == 2))
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
count >>= 1;
}
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("cmd_type = %i, frgd_sel = %i, bkgd_sel = %i, mono_src = %i, dpconfig = %04x, cur_x = %d, cur_y = %d, cl = %d, cr = %d, ct = %d, cb = %d, accel_bpp = %d, pitch = %d, hicolbpp = %d, pattlen = %d.\n", cmd_type, frgd_sel, bkgd_sel, mono_src, mach->accel.dp_config, dev->accel.cur_x, dev->accel.cur_y, clip_l, clip_r, clip_t, clip_b, dev->accel_bpp, dev->pitch, dev->bpp, mach->accel.patt_len);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (cmd_type) {
case 1: /*Extended Raw Linedraw from bres_count register (0x96ee)*/
if (!cpu_input) {
dev->accel.dx = dev->accel.cur_x;
if (dev->accel.cur_x >= 0x600)
dev->accel.dx |= ~0x5ff;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.dy = dev->accel.cur_y;
if (dev->accel.cur_y >= 0x600)
dev->accel.dy |= ~0x5ff;
dev->accel.cx = dev->accel.destx_distp;
if (dev->accel.destx_distp >= 0x600)
dev->accel.cx |= ~0x5ff;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cy = dev->accel.desty_axstp;
if (dev->accel.desty_axstp >= 0x600)
dev->accel.cy |= ~0x5ff;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
mach->accel.width = mach->accel.bres_count;
dev->accel.sx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.poly_fill = 0;
mach->accel.stepx = (mach->accel.linedraw_opt & 0x20) ? 1 : -1;
mach->accel.stepy = (mach->accel.linedraw_opt & 0x80) ? 1 : -1;
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("Extended bresenham, CUR(%d,%d), DEST(%d,%d), width = %d, options = %04x, dpconfig = %04x, opt_ena = %03x.\n",
dev->accel.dx, dev->accel.dy, dev->accel.cx, dev->accel.cy, mach->accel.width, mach->accel.linedraw_opt,
mach->accel.dp_config, mach->accel.max_waitstates & 0x100);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (!dev->accel.cmd_back) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach_pixel_write(mach)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Extended Bresenham Write pixtrans.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
dev->data_available = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->data_available2 = 0;
return;
} else if (mach_pixel_read(mach)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Extended Bresenham Read pixtrans.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
dev->data_available = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->data_available2 = 1;
return;
}
}
}
if (mono_src == 1) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
count = mach->accel.width;
mix_dat = mach->accel.mono_pattern_normal[0];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.temp_cnt = 8;
}
if (mach->accel.linedraw_opt & 0x08) { /*Vector Line*/
while (count--) {
switch (mono_src) {
case 0:
mix = 1;
break;
case 1:
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (!dev->accel.temp_cnt) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.temp_cnt = 8;
mix_dat >>= 8;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix = !!(mix_dat & 0x80);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.temp_cnt--;
mix_dat <<= 1;
mix_dat |= 1;
break;
case 2:
if (mach->accel.dp_config & 0x1000) {
mix = mix_dat >> 0x1f;
mix_dat <<= 1;
} else {
if (mach->accel.dp_config & 0x200) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix = mix_dat & 0x01;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix_dat >>= 1;
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix = !!(mix_dat & 0x80);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix_dat <<= 1;
mix_dat |= 1;
}
}
break;
case 3:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch) + dev->accel.cx, mix);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix = (mix & rd_mask) == rd_mask;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->subsys_stat |= INT_GE_BSY;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = bkgd_color;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
break;
case 1:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = frgd_color;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
if (mach_pixel_read(mach))
src_dat = cpu_dat;
else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch) + dev->accel.cx, src_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mono_src == 3)
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
src_dat = (src_dat & rd_mask) == rd_mask;
}
break;
case 5:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
src_dat = mach->accel.color_pattern_hicol[mach->accel.color_pattern_idx];
else
src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx];
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
break;
default:
break;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.linedraw_opt & 0x02) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch) + dev->accel.cx, poly_src);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
poly_src = ((poly_src & rd_mask) == rd_mask);
if (poly_src)
mach->accel.poly_fill = !mach->accel.poly_fill;
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (mach->accel.poly_fill || !(mach->accel.linedraw_opt & 0x02)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch) + dev->accel.dx, dest_dat);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
switch (compare_mode) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 1:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
compare = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 2:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
compare = (dest_dat >= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 3:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
compare = (dest_dat < dest_cmp_clr) ? 0 : 1;
break;
case 4:
compare = (dest_dat != dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 5:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
compare = (dest_dat == dest_cmp_clr) ? 0 : 1;
break;
case 6:
compare = (dest_dat <= dest_cmp_clr) ? 0 : 1;
break;
case 7:
compare = (dest_dat > dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (!compare) {
if (mach_pixel_write(mach)) {
old_dest_dat = dest_dat;
MIX(mix, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (mach->accel.dp_config & 0x10) {
if (mach->accel.linedraw_opt & 0x04) {
if (((mono_src != 1) && (dev->accel.sx < mach->accel.width)) || ((mono_src == 1) && count)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch) + dev->accel.dx, dest_dat);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
}
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch) + dev->accel.dx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
}
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((mono_src == 1) && !count) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
mach->force_busy = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
} else if ((mono_src != 1) && (dev->accel.sx >= mach->accel.width)) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
mach->force_busy = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
cpu_dat >>= 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.color_pattern_idx++;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.color_pattern_idx > mach->accel.patt_len)
mach->accel.color_pattern_idx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (mach->accel.linedraw_opt & 0xe0) {
case 0x00:
dev->accel.cx++;
dev->accel.dx++;
break;
case 0x20:
dev->accel.cx++;
dev->accel.dx++;
dev->accel.cy--;
dev->accel.dy--;
break;
case 0x40:
dev->accel.cy--;
dev->accel.dy--;
break;
case 0x60:
dev->accel.cx--;
dev->accel.dx--;
dev->accel.cy--;
dev->accel.dy--;
break;
case 0x80:
dev->accel.cx--;
dev->accel.dx--;
break;
case 0xa0:
dev->accel.cx--;
dev->accel.dx--;
dev->accel.cy++;
dev->accel.dy++;
break;
case 0xc0:
dev->accel.cy++;
dev->accel.dy++;
break;
case 0xe0:
dev->accel.cx++;
dev->accel.dx++;
dev->accel.cy++;
dev->accel.dy++;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
dev->accel.sx++;
}
} else { /*Bresenham*/
while (count--) {
switch (mono_src) {
case 0:
mix = 1;
break;
case 1:
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (!dev->accel.temp_cnt) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.temp_cnt = 8;
mix_dat >>= 8;
}
mix = (mix_dat & 0x80);
dev->accel.temp_cnt--;
mix_dat <<= 1;
mix_dat |= 1;
break;
case 2:
if (mach->accel.dp_config & 0x1000) {
mix = mix_dat >> 0x1f;
mix_dat <<= 1;
} else {
if (mach->accel.dp_config & 0x200) {
mix = mix_dat & 1;
mix_dat >>= 1;
} else {
mix = mix_dat & 0x80;
mix_dat <<= 1;
mix_dat |= 1;
}
}
break;
case 3:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch) + dev->accel.cx, mix);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix = (mix & rd_mask) == rd_mask;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->subsys_stat |= INT_GE_BSY;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = bkgd_color;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
break;
case 1:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = frgd_color;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
if (mach_pixel_read(mach))
src_dat = cpu_dat;
else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch) + dev->accel.cx, src_dat);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (mono_src == 3) {
src_dat = (src_dat & rd_mask) == rd_mask;
}
}
break;
case 5:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
src_dat = mach->accel.color_pattern_hicol[mach->accel.color_pattern_idx];
else
src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx];
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
break;
default:
break;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.linedraw_opt & 0x02) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch) + dev->accel.cx, poly_src);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
poly_src = ((poly_src & rd_mask) == rd_mask);
if (poly_src)
mach->accel.poly_fill = !mach->accel.poly_fill;
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (mach->accel.poly_fill || !(mach->accel.linedraw_opt & 0x02)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch) + dev->accel.dx, dest_dat);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
switch (compare_mode) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 1:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
compare = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 2:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
compare = (dest_dat >= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 3:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
compare = (dest_dat < dest_cmp_clr) ? 0 : 1;
break;
case 4:
compare = (dest_dat != dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 5:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
compare = (dest_dat == dest_cmp_clr) ? 0 : 1;
break;
case 6:
compare = (dest_dat <= dest_cmp_clr) ? 0 : 1;
break;
case 7:
compare = (dest_dat > dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (!compare) {
if (mach_pixel_write(mach)) {
old_dest_dat = dest_dat;
MIX(mix, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (mach->accel.dp_config & 0x10) {
if (mach->accel.linedraw_opt & 0x04) {
if (((mono_src != 1) && (dev->accel.sx < mach->accel.width)) || ((mono_src == 1) && count)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch) + dev->accel.dx, dest_dat);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
}
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch) + dev->accel.dx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
}
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((mono_src == 1) && !count) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
} else if ((mono_src != 1) && (dev->accel.sx >= mach->accel.width)) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
cpu_dat >>= 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.color_pattern_idx++;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.color_pattern_idx > mach->accel.patt_len)
mach->accel.color_pattern_idx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.linedraw_opt & 0x40) {
dev->accel.dy += mach->accel.stepy;
if ((frgd_sel == 3) || (bkgd_sel == 3))
dev->accel.cy += mach->accel.stepy;
if (dev->accel.err_term >= 0) {
dev->accel.err_term += dev->accel.destx_distp;
dev->accel.dx += mach->accel.stepx;
if ((frgd_sel == 3) || (bkgd_sel == 3))
dev->accel.cx += mach->accel.stepx;
} else {
dev->accel.err_term += dev->accel.desty_axstp;
}
} else {
dev->accel.dx += mach->accel.stepx;
if ((frgd_sel == 3) || (bkgd_sel == 3))
dev->accel.cx += mach->accel.stepx;
if (dev->accel.err_term >= 0) {
dev->accel.err_term += dev->accel.destx_distp;
dev->accel.dy += mach->accel.stepy;
if ((frgd_sel == 3) || (bkgd_sel == 3))
dev->accel.cy += mach->accel.stepy;
} else {
dev->accel.err_term += dev->accel.desty_axstp;
}
}
dev->accel.sx++;
}
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
mach->accel.poly_fill = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cur_x = dev->accel.dx;
dev->accel.cur_y = dev->accel.dy;
break;
case 2: /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/
if (!cpu_input) {
mach->accel.stepx = 0;
mach->accel.stepy = 0;
dev->accel.dx = dev->accel.cur_x;
if (dev->accel.cur_x >= 0x600)
dev->accel.dx |= ~0x5ff;
dev->accel.dy = dev->accel.cur_y;
if (dev->accel.cur_y >= 0x600)
dev->accel.dy |= ~0x5ff;
/*Destination Width*/
mach->accel.dx_start = mach->accel.dest_x_start;
if (mach->accel.dest_x_start >= 0x600)
mach->accel.dx_start |= ~0x5ff;
mach->accel.dx_end = mach->accel.dest_x_end;
if (mach->accel.dest_x_end >= 0x600)
mach->accel.dx_end |= ~0x5ff;
if (mach->accel.dx_end > mach->accel.dx_start) {
mach->accel.width = (mach->accel.dx_end - mach->accel.dx_start);
mach->accel.stepx = 1;
} else if (mach->accel.dx_end < mach->accel.dx_start) {
mach->accel.width = (mach->accel.dx_start - mach->accel.dx_end);
mach->accel.stepx = -1;
if (dev->accel.dx > 0)
dev->accel.dx--;
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("BitBLT: Dst Negative X, dxstart = %d, end = %d, width = %d, dx = %d, dpconfig = %04x.\n",
mach->accel.dest_x_start, mach->accel.dest_x_end, mach->accel.width, dev->accel.dx,
mach->accel.dp_config);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
mach->accel.stepx = 1;
mach->accel.width = 0;
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("BitBLT: Dst Indeterminate X, dpconfig = %04x, destxend = %d, destxstart = %d.\n",
mach->accel.dp_config, mach->accel.dest_x_end, mach->accel.dest_x_start);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.sx = 0;
mach->accel.poly_fill = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
/*Height*/
mach->accel.dy_start = dev->accel.cur_y;
if (dev->accel.cur_y >= 0x600)
mach->accel.dy_start |= ~0x5ff;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.dy_end = mach->accel.dest_y_end;
if (mach->accel.dest_y_end >= 0x600)
mach->accel.dy_end |= ~0x5ff;
if (mach->accel.dy_end > mach->accel.dy_start) {
mach->accel.height = (mach->accel.dy_end - mach->accel.dy_start);
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
mach->accel.stepy = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else if (mach->accel.dy_end < mach->accel.dy_start) {
mach->accel.height = (mach->accel.dy_start - mach->accel.dy_end);
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
mach->accel.stepy = -1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
mach->accel.height = 0;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
mach->accel.stepy = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
if (mach->accel.dp_config == 0x4011)
mach->accel.height++;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.sy = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.dest = mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.src_stepx = 0;
/*Source Width*/
dev->accel.cx = mach->accel.src_x;
if (mach->accel.src_x >= 0x600)
dev->accel.cx |= ~0x5ff;
dev->accel.cy = mach->accel.src_y;
if (mach->accel.src_y >= 0x600)
dev->accel.cy |= ~0x5ff;
mach->accel.sx_start = mach->accel.src_x_start;
if (mach->accel.src_x_start >= 0x600)
mach->accel.sx_start |= ~0x5ff;
mach->accel.sx_end = mach->accel.src_x_end;
if (mach->accel.src_x_end >= 0x600)
mach->accel.sx_end |= ~0x5ff;
if (mach->accel.sx_end > mach->accel.sx_start) {
mach->accel.src_width = (mach->accel.sx_end - mach->accel.sx_start);
mach->accel.src_stepx = 1;
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("BitBLT: Src Positive X: wh(%d,%d), srcwidth = %d, coordinates: %d,%d px, start: %d, end: %d px, stepx = %d, dpconfig = %04x, oddwidth = %d.\n",
mach->accel.width, mach->accel.height, mach->accel.src_width, dev->accel.cx, dev->accel.cy, mach->accel.src_x_start, mach->accel.src_x_end,
mach->accel.src_stepx, mach->accel.dp_config, mach->accel.src_width & 1);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else if (mach->accel.sx_end < mach->accel.sx_start) {
mach->accel.src_width = (mach->accel.sx_start - mach->accel.sx_end);
mach->accel.src_stepx = -1;
if (dev->accel.cx > 0)
dev->accel.cx--;
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("BitBLT: Src Negative X: width = %d, coordinates: %d,%d px, end: %d px, stepx = %d, dpconfig = %04x, oddwidth = %d.\n",
mach->accel.src_width, dev->accel.cx, dev->accel.cy, mach->accel.src_x_end, mach->accel.src_stepx, mach->accel.dp_config
mach->accel.src_width & 1);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
mach->accel.src_stepx = 1;
mach->accel.src_width = 0;
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("BitBLT: Src Indeterminate X: width = %d, coordinates: %d,%d px, end: %d px, stepx = %d, dpconfig = %04x, oddwidth = %d.\n",
mach->accel.src_width, dev->accel.cx, dev->accel.cy, mach->accel.src_x_end, mach->accel.src_stepx,
mach->accel.dp_config, mach->accel.src_width & 1);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
mach->accel.sx = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (mach->accel.patt_data_idx < 0x10)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach->accel.color_pattern_idx = mach->accel.patt_idx;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
else
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach->accel.color_pattern_idx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.src = mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mono_src == 1) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.mono_pattern_enable || mach->accel.block_write_mono_pattern_enable) {
mono_dat0 = mach->accel.mono_pattern_normal[0];
mono_dat0 |= (mach->accel.mono_pattern_normal[1] << 8);
mono_dat0 |= (mach->accel.mono_pattern_normal[2] << 16);
mono_dat0 |= (mach->accel.mono_pattern_normal[3] << 24);
mono_dat1 = mach->accel.mono_pattern_normal[4];
mono_dat1 |= (mach->accel.mono_pattern_normal[5] << 8);
mono_dat1 |= (mach->accel.mono_pattern_normal[6] << 16);
mono_dat1 |= (mach->accel.mono_pattern_normal[7] << 24);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("MonoData0=%x, MonoData1=%x, enable mono pattern=%x, dpconfig=%04x.\n", mono_dat0, mono_dat1, mach->accel.mono_pattern_enable, mach->accel.dp_config);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
for (uint8_t y = 0; y < 8; y++) {
for (uint8_t x = 0; x < 8; x++) {
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
uint32_t temp = (y & 4) ? mono_dat1 : mono_dat0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.mono_pattern[y][7 - x] = (temp >> (x + ((y & 3) << 3))) & 1;
}
}
}
}
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (!dev->accel.cmd_back) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach_pixel_write(mach)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Non-Conforming BitBLT Write pixtrans.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
dev->data_available = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->data_available2 = 0;
return;
} else if (mach_pixel_read(mach)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Non-Conforming BitBLT Read pixtrans.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
dev->data_available = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->data_available2 = 1;
return;
}
}
}
if (mono_src == 1) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!mach->accel.mono_pattern_enable && !mach->accel.block_write_mono_pattern_enable) {
if (((dev->accel_bpp == 24) && (frgd_sel != 5)) || (dev->accel_bpp != 24)) {
mix_dat = mach->accel.mono_pattern_normal[0] ^ ((mach->accel.patt_idx & 0x01) ? 0xff : 0);
dev->accel.temp_cnt = 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
}
More sonarlint work
2023-06-09 23:46:54 -04:00
if (mach->accel.dy_end == mach->accel.dy_start) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach_log("No DEST.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return;
}
if ((mono_src == 3) || (bkgd_sel == 3) || (frgd_sel == 3)) {
if (mach->accel.sx_end == mach->accel.sx_start) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach_log("No SRC.\n");
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return;
}
}
if (cpu_input) {
if (mach->accel.dp_config == 0x3251) {
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("DPCONFIG 3251: monosrc=%d, frgdsel=%d, bkgdsel=%d, pitch=%d.\n",
mono_src, frgd_sel, bkgd_sel, dev->pitch);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (dev->accel.sy == mach->accel.height) {
mach_log("No Blit on DPCONFIG=3251.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
while (count--) {
switch (mono_src) {
case 0:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix = 0x01;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 1:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.mono_pattern_enable || mach->accel.block_write_mono_pattern_enable)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix = mach->accel.mono_pattern[dev->accel.dy & 7][dev->accel.dx & 7];
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
else if ((dev->accel_bpp == 24) && (frgd_sel == 5))
mix = 0x01;
More and more video changes and fixes (8514/A and compatibles): 1. Made the 8514/A mode switch to VGA and viceversa (including ATI mode) actually usable and eliminating the last bugs related to them. Fixes 8514/A mode in OS/2 1.x/2.x (both IBM and Microsoft). 2. More sanity checks to the 8514/A and XGA pointers. Should fix emulator crashes on hard resets.
2023-11-08 23:47:16 +01:00
else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->accel.temp_cnt) {
dev->accel.temp_cnt = 8;
mix_dat >>= 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix = !!(mix_dat & 0x80);
dev->accel.temp_cnt--;
mix_dat <<= 1;
mix_dat |= 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
case 2:
Mach32 changes of the day (February 20th, 2025) 1. Actually fix the LFB access by subtracting the linear base address from the current address when LFB/MMIO is on. This fixes blankness of certain Mach32 drivers on Win3.1x. 2. Apply a minor but important fix to the fonts used by said Win3.1x driver when the dpconfig activates bit 2 without bit 12 set (e.g.: 0x2255), ergo, issuing host data as monochrome without swapping it.
2025-02-20 15:35:56 +01:00
if ((mach->accel.dp_config & 0x1000) || (mach->accel.dp_config & 0x04)) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix = mix_dat >> 0x1f;
mix_dat <<= 1;
} else {
if (mach->accel.dp_config & 0x200) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix = mix_dat & 0x01;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix_dat >>= 1;
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix = !!(mix_dat & 0x80);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix_dat <<= 1;
mix_dat |= 1;
}
}
break;
case 3:
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
READ(dev->accel.src + dev->accel.cx, mix);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix = (mix & rd_mask) == rd_mask;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->subsys_stat |= INT_GE_BSY;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.dp_config & 0x02) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
READ(dev->accel.src + dev->accel.cx, poly_src);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
poly_src = ((poly_src & rd_mask) == rd_mask);
if (poly_src)
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
mach->accel.poly_fill ^= 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.poly_fill || !(mach->accel.dp_config & 0x02)) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = bkgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 1:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = frgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
if (mach_pixel_read(mach))
src_dat = cpu_dat;
else {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
READ(dev->accel.src + dev->accel.cx, src_dat);
More and more video changes and fixes (8514/A and compatibles): 1. Made the 8514/A mode switch to VGA and viceversa (including ATI mode) actually usable and eliminating the last bugs related to them. Fixes 8514/A mode in OS/2 1.x/2.x (both IBM and Microsoft). 2. More sanity checks to the 8514/A and XGA pointers. Should fix emulator crashes on hard resets.
2023-11-08 23:47:16 +01:00
if (mono_src == 3)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
src_dat = (src_dat & rd_mask) == rd_mask;
}
break;
case 5:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
src_dat = mach->accel.color_pattern_hicol[mach->accel.color_pattern_idx];
else
src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel_bpp == 24) && (mono_src == 1) && (frgd_sel == 5) && !mach->accel.mono_pattern_enable) {
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (dev->accel.sy & 1) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(dev->accel.dest + dev->accel.dx - mach->accel.dst_pitch, dest_dat);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
} else {
READ(dev->accel.dest + dev->accel.dx, dest_dat);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
READ(dev->accel.dest + dev->accel.dx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
switch (compare_mode) {
case 1:
compare = 1;
break;
case 2:
compare = (dest_dat >= dest_cmp_clr) ? 0 : 1;
break;
case 3:
compare = (dest_dat < dest_cmp_clr) ? 0 : 1;
break;
case 4:
compare = (dest_dat != dest_cmp_clr) ? 0 : 1;
break;
case 5:
compare = (dest_dat == dest_cmp_clr) ? 0 : 1;
break;
case 6:
compare = (dest_dat <= dest_cmp_clr) ? 0 : 1;
break;
case 7:
compare = (dest_dat > dest_cmp_clr) ? 0 : 1;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
default:
break;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (!compare) {
if (mach_pixel_write(mach)) {
old_dest_dat = dest_dat;
MIX(mix, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (mach->accel.dp_config & 0x10) {
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((dev->accel_bpp == 24) && (mono_src == 1) && (frgd_sel == 5) && !mach->accel.mono_pattern_enable) {
if (dev->accel.sy & 1) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(dev->accel.dest + dev->accel.dx - mach->accel.dst_pitch, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else {
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
} else {
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
}
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
cpu_dat >>= 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (mach->accel.dp_config == 0x2071)
mach_log("FontBlit: SX=%d, C(%d,%d), SRCWidth=%d, frgdmix=%d, bkgdmix=%d, rdmask=%04x, D(%d,%d), geoffset=%x, addr=%08x, 8bppdata=%02x, 16bppdata=%04x, vgabase=%06x.\n",
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach->accel.sx, dev->accel.cx, dev->accel.cy, mach->accel.src_width, dev->accel.frgd_mix & 0x1f,
dev->accel.bkgd_mix & 0x1f, rd_mask, dev->accel.dx, dev->accel.dy, dev->accel.ge_offset,
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
(dev->accel.src + dev->accel.cx) & dev->vram_mask, dev->vram[(dev->accel.src + dev->accel.cx) & dev->vram_mask], vram_w[(dev->accel.src + dev->accel.cx) & (dev->vram_mask >> 1)], svga->mapping.base);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if ((mono_src == 3) || (frgd_sel == 3) || (bkgd_sel == 3) || (mach->accel.dp_config & 0x02)) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cx += mach->accel.src_stepx;
mach->accel.sx++;
if (mach->accel.sx >= mach->accel.src_width) {
mach->accel.sx = 0;
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
if (mach->accel.src_stepx == -1)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cx += mach->accel.src_width;
else
dev->accel.cx -= mach->accel.src_width;
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cy += (mach->accel.src_y_dir ? 1 : -1);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.src = mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.color_pattern_idx++;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((mono_src == 1) && !mach->accel.mono_pattern_enable && !mach->accel.block_write_mono_pattern_enable && (frgd_sel == 5) && (dev->accel_bpp == 24)) {
if (mach->accel.color_pattern_idx > 2)
mach->accel.color_pattern_idx = 0;
} else {
if (mach->accel.color_pattern_idx > mach->accel.patt_len)
mach->accel.color_pattern_idx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dx += mach->accel.stepx;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.sx++;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if ((dev->accel.sx >= mach->accel.width) || (dev->accel.dx >= 0x600)) {
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
dev->accel.sx = 0;
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
if (mach->accel.stepx == -1)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.dx += mach->accel.width;
else
dev->accel.dx -= mach->accel.width;
dev->accel.dy += mach->accel.stepy;
dev->accel.sy++;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
mach->accel.poly_fill = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.dest = mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (dev->accel.sy >= mach->accel.height) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((mono_src == 2) || (mono_src == 3) || (frgd_sel == 3) || (bkgd_sel == 3) || (mach->accel.dp_config & 0x02))
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((mono_src == 1) && (frgd_sel == 5) && (dev->accel_bpp == 24))
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return;
dev->accel.cur_x = dev->accel.dx;
dev->accel.cur_y = dev->accel.dy;
return;
}
}
}
break;
case 3: /*Direct Linedraw (Polyline) from linedraw indexes (0xfeee)*/
case 4:
if (!cpu_input) {
dev->accel.cx = dev->accel.cur_x;
dev->accel.cy = dev->accel.cur_y;
if (dev->accel.cur_x >= 0x600) {
mach_log("Linedraw XOver = %d.\n", dev->accel.cur_x);
dev->accel.cx |= ~0x5ff;
}
if (dev->accel.cur_y >= 0x600) {
mach_log("Linedraw YOver = %d.\n", dev->accel.cur_y);
dev->accel.cy |= ~0x5ff;
}
dev->accel.dx = ABS(mach->accel.cx_end_line - dev->accel.cx) << 1;
dev->accel.dy = ABS(mach->accel.cy_end_line - dev->accel.cy) << 1;
mach->accel.stepx = (mach->accel.cx_end_line < dev->accel.cx) ? -1 : 1;
mach->accel.stepy = (mach->accel.cy_end_line < dev->accel.cy) ? -1 : 1;
dev->accel.sx = 0;
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("Linedraw: c(%d,%d), d(%d,%d), cend(%d,%d), bounds: l=%d, r=%d, t=%d, b=%d.\n",
dev->accel.cur_x, dev->accel.cur_y, dev->accel.dx, dev->accel.dy, mach->accel.cx_end_line,
mach->accel.cy_end_line, mach->accel.bleft, mach->accel.bright, mach->accel.btop, mach->accel.bbottom);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (!dev->accel.cmd_back) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach_pixel_write(mach)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Direct Linedraw Write pixtrans.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
dev->data_available = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->data_available2 = 0;
return;
} else if (mach_pixel_read(mach)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Direct Linedraw Read pixtrans.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
dev->data_available = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->data_available2 = 1;
return;
}
}
}
if (mono_src == 1) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix_dat = mach->accel.mono_pattern_normal[0];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.temp_cnt = 8;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
count = (dev->accel.dx > dev->accel.dy) ? (dev->accel.dx >> 1) : (dev->accel.dy >> 1);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.width = count;
if (dev->accel.dx > dev->accel.dy) {
mach->accel.err = (dev->accel.dy - dev->accel.dx) >> 1;
if (mono_src == 1) {
while (count--) {
if (!dev->accel.temp_cnt) {
dev->accel.temp_cnt = 8;
mix_dat >>= 8;
}
mix = (mix_dat & 0x80);
dev->accel.temp_cnt--;
mix_dat <<= 1;
mix_dat |= 1;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->subsys_stat |= INT_GE_BSY;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.clip_overrun = 0;
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = bkgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 1:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = frgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
if (mach_pixel_read(mach))
src_dat = cpu_dat;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
else
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
src_dat = 0;
break;
case 5:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
src_dat = mach->accel.color_pattern_hicol[mach->accel.color_pattern_idx];
else
src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (compare_mode) {
case 1:
compare = 1;
break;
case 2:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat >= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 3:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat < dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 4:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat != dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 5:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat == dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 6:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat <= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 7:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat > dest_cmp_clr) ? 0 : 1;
break;
default:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
}
if (!compare) {
if (mach_pixel_write(mach)) {
old_dest_dat = dest_dat;
MIX(mix, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
}
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
} else
mach->accel.clip_overrun = ((mach->accel.clip_overrun + 1) & 0x0f);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if (!count) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
cpu_dat >>= 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.color_pattern_idx++;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.color_pattern_idx > mach->accel.patt_len)
mach->accel.color_pattern_idx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.err >= 0) {
dev->accel.cy += mach->accel.stepy;
mach->accel.err -= dev->accel.dx;
}
dev->accel.cx += mach->accel.stepx;
mach->accel.err += dev->accel.dy;
}
} else {
while (count--) {
switch (mono_src) {
case 0:
case 3:
mix = 1;
break;
case 2:
if (mach->accel.dp_config & 0x1000) {
mix = mix_dat >> 0x1f;
mix_dat <<= 1;
} else {
if (mach->accel.dp_config & 0x200) {
mix = mix_dat & 1;
mix_dat >>= 1;
} else {
mix = mix_dat & 0x80;
mix_dat <<= 1;
mix_dat |= 1;
}
}
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->subsys_stat |= INT_GE_BSY;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.clip_overrun = 0;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (mach->accel.linedraw_opt & 0x02) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch) + dev->accel.cx, poly_src);
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (poly_src)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach->accel.poly_fill ^= 1;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = bkgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 1:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = frgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
if (mach_pixel_read(mach))
src_dat = cpu_dat;
else {
src_dat = 0;
}
break;
case 5:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
src_dat = mach->accel.color_pattern_hicol[mach->accel.color_pattern_idx];
else
src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (compare_mode) {
case 1:
compare = 1;
break;
case 2:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat >= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 3:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat < dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 4:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat != dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 5:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat == dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 6:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat <= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 7:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat > dest_cmp_clr) ? 0 : 1;
break;
default:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
}
if (!compare) {
if (mach_pixel_write(mach)) {
old_dest_dat = dest_dat;
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
if (mach->accel.poly_fill || !(mach->accel.linedraw_opt & 0x02)) {
MIX(mix, dest_dat, src_dat);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
}
}
if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) {
if (mach->accel.linedraw_opt & 0x04) {
if (dev->accel.sx < mach->accel.width) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
} else
mach->accel.clip_overrun = ((mach->accel.clip_overrun + 1) & 0x0f);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if (dev->accel.sx >= mach->accel.width) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
cpu_dat >>= 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.color_pattern_idx++;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.color_pattern_idx > mach->accel.patt_len)
mach->accel.color_pattern_idx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.err >= 0) {
dev->accel.cy += mach->accel.stepy;
mach->accel.err -= dev->accel.dx;
}
dev->accel.cx += mach->accel.stepx;
mach->accel.err += dev->accel.dy;
dev->accel.sx++;
}
}
} else {
mach->accel.err = (dev->accel.dx - dev->accel.dy) >> 1;
if (mono_src == 1) {
while (count--) {
if (dev->accel.temp_cnt == 0) {
dev->accel.temp_cnt = 8;
mix_dat >>= 8;
}
mix = (mix_dat & 0x80);
dev->accel.temp_cnt--;
mix_dat <<= 1;
mix_dat |= 1;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->subsys_stat |= INT_GE_BSY;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.clip_overrun = 0;
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = bkgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 1:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = frgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
if (mach_pixel_read(mach))
src_dat = cpu_dat;
else {
src_dat = 0;
}
break;
case 5:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
src_dat = mach->accel.color_pattern_hicol[mach->accel.color_pattern_idx];
else
src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (compare_mode) {
case 1:
compare = 1;
break;
case 2:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat >= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 3:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat < dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 4:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat != dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 5:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat == dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 6:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat <= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 7:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat > dest_cmp_clr) ? 0 : 1;
break;
default:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
}
if (!compare) {
if (mach_pixel_write(mach)) {
old_dest_dat = dest_dat;
MIX(mix, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
}
}
if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
} else
mach->accel.clip_overrun = ((mach->accel.clip_overrun + 1) & 0x0f);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if (!count) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
cpu_dat >>= 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.color_pattern_idx++;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.color_pattern_idx > mach->accel.patt_len)
mach->accel.color_pattern_idx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.err >= 0) {
dev->accel.cx += mach->accel.stepx;
mach->accel.err -= dev->accel.dy;
}
dev->accel.cy += mach->accel.stepy;
mach->accel.err += dev->accel.dx;
}
} else {
while (count--) {
switch (mono_src) {
case 0:
case 3:
mix = 1;
break;
case 2:
if (mach->accel.dp_config & 0x1000) {
mix = mix_dat >> 0x1f;
mix_dat <<= 1;
} else {
if (mach->accel.dp_config & 0x200) {
mix = mix_dat & 1;
mix_dat >>= 1;
} else {
mix = mix_dat & 0x80;
mix_dat <<= 1;
mix_dat |= 1;
}
}
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->subsys_stat |= INT_GE_BSY;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.clip_overrun = 0;
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = bkgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 1:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = frgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
if (mach_pixel_read(mach))
src_dat = cpu_dat;
else {
src_dat = 0;
}
break;
case 5:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
src_dat = mach->accel.color_pattern_hicol[mach->accel.color_pattern_idx];
else
src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (compare_mode) {
case 1:
compare = 1;
break;
case 2:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat >= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 3:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat < dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 4:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat != dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 5:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat == dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 6:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat <= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 7:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat > dest_cmp_clr) ? 0 : 1;
break;
default:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
}
if (!compare) {
if (mach_pixel_write(mach)) {
old_dest_dat = dest_dat;
MIX(mix, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
}
}
if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) {
if (mach->accel.linedraw_opt & 0x04) {
if (dev->accel.sx < mach->accel.width) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE(mach->accel.dst_ge_offset + (dev->accel.cy * mach->accel.dst_pitch) + dev->accel.cx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
} else
mach->accel.clip_overrun = ((mach->accel.clip_overrun + 1) & 0x0f);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if (dev->accel.sx >= mach->accel.width) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (cpu_input) {
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
cpu_dat >>= 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.color_pattern_idx++;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->accel.color_pattern_idx > mach->accel.patt_len)
mach->accel.color_pattern_idx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.err >= 0) {
dev->accel.cx += mach->accel.stepx;
mach->accel.err -= dev->accel.dy;
}
dev->accel.cy += mach->accel.stepy;
mach->accel.err += dev->accel.dx;
dev->accel.sx++;
}
}
}
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
mach->accel.poly_fill = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.line_array[(cmd_type == 4) ? 4 : 0] = dev->accel.cx;
mach->accel.line_array[(cmd_type == 4) ? 5 : 1] = dev->accel.cy;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel.cur_x = dev->accel.cx;
dev->accel.cur_y = dev->accel.cy;
mach_log("Done: %i, %i\n", dev->accel.cur_x, dev->accel.cur_y);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 5: /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/
if (!cpu_input) {
mach->accel.stepx = 0;
mach->accel.stepy = 0;
dev->accel.dx = dev->accel.cur_x;
if (dev->accel.cur_x >= 0x600)
dev->accel.dx |= ~0x5ff;
dev->accel.dy = dev->accel.cur_y;
if (dev->accel.cur_y >= 0x600)
dev->accel.dy |= ~0x5ff;
/*Destination Width*/
mach->accel.dx_start = dev->accel.cur_x;
if (dev->accel.cur_x >= 0x600)
mach->accel.dx_start |= ~0x5ff;
mach->accel.dx_end = mach->accel.scan_to_x;
if (mach->accel.scan_to_x >= 0x600)
mach->accel.dx_end |= ~0x5ff;
if (mach->accel.dx_end > mach->accel.dx_start) {
mach->accel.width = (mach->accel.dx_end - mach->accel.dx_start);
mach->accel.stepx = 1;
} else if (mach->accel.dx_end < mach->accel.dx_start) {
mach->accel.width = (mach->accel.dx_start - mach->accel.dx_end);
mach->accel.stepx = -1;
if (dev->accel.dx > 0)
dev->accel.dx--;
} else {
mach->accel.stepx = 1;
mach->accel.width = 0;
}
dev->accel.sx = 0;
/*Step Y*/
mach->accel.dy_start = dev->accel.cur_y;
if (dev->accel.cur_y >= 0x600)
mach->accel.dy_start |= ~0x5ff;
mach->accel.dy_end = mach->accel.dest_y_end;
if (mach->accel.dest_y_end >= 0x600)
mach->accel.dy_end |= ~0x5ff;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (mach->accel.dy_end > mach->accel.dy_start) {
dev->accel.sy = (mach->accel.dy_end - mach->accel.dy_start);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.stepy = 1;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else if (mach->accel.dy_end < mach->accel.dy_start) {
dev->accel.sy = (mach->accel.dy_start - mach->accel.dy_end);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.stepy = -1;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.stepy = 0;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel.sy = 0;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.dest = mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->accel.src_stepx = 0;
/*Source Width*/
dev->accel.cx = mach->accel.src_x;
if (mach->accel.src_x >= 0x600)
dev->accel.cx |= ~0x5ff;
dev->accel.cy = mach->accel.src_y;
if (mach->accel.src_y >= 0x600)
dev->accel.cy |= ~0x5ff;
mach->accel.sx_start = mach->accel.src_x_start;
if (mach->accel.src_x_start >= 0x600)
mach->accel.sx_start |= ~0x5ff;
mach->accel.sx_end = mach->accel.src_x_end;
if (mach->accel.src_x_end >= 0x600)
mach->accel.sx_end |= ~0x5ff;
if (mach->accel.sx_end > mach->accel.sx_start) {
mach->accel.src_width = (mach->accel.sx_end - mach->accel.sx_start);
mach->accel.src_stepx = 1;
} else if (mach->accel.sx_end < mach->accel.sx_start) {
mach->accel.src_width = (mach->accel.sx_start - mach->accel.sx_end);
mach->accel.src_stepx = -1;
if (dev->accel.cx > 0)
dev->accel.cx--;
} else {
mach->accel.src_stepx = 1;
mach->accel.src_width = 0;
}
mach->accel.sx = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.src = mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch);
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ScanToX: Parameters=%04x: xbit=%d, ybit=%d, widthbit=%d, DX=%d, DY=%d, CX=%d, CY=%d, dstwidth=%d, srcwidth=%d, height=%d, frmix=%02x, colpatidx=%d, srcpitch=%d, dstpitch=%d, scantox=%d.\n",
mach->accel.dp_config, dev->accel.dx & 1, dev->accel.dy & 1, mach->accel.width & 1, dev->accel.dx, dev->accel.dy, dev->accel.cx, dev->accel.cy, mach->accel.width, mach->accel.src_width, dev->accel.sy, dev->accel.frgd_mix & 0x1f, mach->accel.color_pattern_idx, mach->accel.src_pitch, mach->accel.dst_pitch, mach->accel.scan_to_x);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (!dev->accel.cmd_back) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach_pixel_write(mach)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Scan To X Write pixtrans.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
dev->data_available = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->data_available2 = 0;
return;
} else if (mach_pixel_read(mach)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Scan To X Read pixtrans.\n");
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->force_busy = 1;
dev->force_busy2 = 1;
mach->force_busy = 1;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
dev->data_available = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->data_available2 = 1;
return;
}
}
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if ((dev->accel_bpp == 24) && (mach->accel.dp_config == 0x6211)) {
int64_t cx;
int64_t cy;
cx = mach->accel.src_x_scan;
cy = mach->accel.src_y_scan;
if (mach->accel.src_stepx == -1) {
if (cx > 0)
cx--;
}
dev->accel.src = mach->accel.src_ge_offset + (cy * mach->accel.src_pitch);
while (1) {
mix = 1;
if ((dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
dev->subsys_stat |= INT_GE_BSY;
READ(dev->accel.src + cx, src_dat);
READ(dev->accel.dest + dev->accel.dx, dest_dat);
switch (compare_mode) {
case 1:
compare = 1;
break;
case 2:
compare = (dest_dat >= dest_cmp_clr) ? 0 : 1;
break;
case 3:
compare = (dest_dat < dest_cmp_clr) ? 0 : 1;
break;
case 4:
compare = (dest_dat != dest_cmp_clr) ? 0 : 1;
break;
case 5:
compare = (dest_dat == dest_cmp_clr) ? 0 : 1;
break;
case 6:
compare = (dest_dat <= dest_cmp_clr) ? 0 : 1;
break;
case 7:
compare = (dest_dat > dest_cmp_clr) ? 0 : 1;
break;
default:
break;
}
if (!compare) {
old_dest_dat = dest_dat;
MIX(mix, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
}
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
}
cx += mach->accel.src_stepx;
mach->accel.sx++;
if (mach->accel.sx >= mach->accel.src_width) {
mach->accel.sx = 0;
cx = mach->accel.src_x_scan;
if (mach->accel.src_stepx == -1) {
if (cx > 0)
cx--;
}
cy += (mach->accel.src_y_dir ? 1 : -1);
dev->accel.src = mach->accel.src_ge_offset + (cy * mach->accel.src_pitch);
}
dev->accel.dx += mach->accel.stepx;
dev->accel.sx++;
if (dev->accel.sx >= mach->accel.width) {
dev->accel.sx = 0;
dev->accel.dy += mach->accel.stepy;
dev->accel.dest = mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch);
if (mach->accel.line_idx == 2) {
mach->accel.line_array[0] = dev->accel.dx;
mach->accel.line_array[4] = dev->accel.dx;
}
if (dev->accel.sy >= 0)
dev->accel.sy--;
dev->fifo_idx = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
dev->accel.cmd_back = 1;
dev->accel.cur_x = dev->accel.dx;
dev->accel.cur_y = dev->accel.dy;
mach->accel.src_x_scan = cx;
mach->accel.src_y_scan = cy;
return;
}
}
return;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mono_src == 1) {
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
count = mach->accel.width;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mix_dat = mach->accel.mono_pattern_normal[0];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.temp_cnt = 8;
}
while (count--) {
switch (mono_src) {
case 0:
mix = 1;
break;
case 1:
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (!dev->accel.temp_cnt) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.temp_cnt = 8;
mix_dat >>= 8;
}
mix = (mix_dat & 0x80);
dev->accel.temp_cnt--;
mix_dat <<= 1;
mix_dat |= 1;
break;
case 2:
if (mach->accel.dp_config & 0x1000) {
mix = mix_dat >> 0x1f;
mix_dat <<= 1;
} else {
if (mach->accel.dp_config & 0x200) {
mix = mix_dat & 1;
mix_dat >>= 1;
} else {
mix = mix_dat & 0x80;
mix_dat <<= 1;
mix_dat |= 1;
}
}
break;
case 3:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
READ(dev->accel.src + dev->accel.cx, mix);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mix = (mix & rd_mask) == rd_mask;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->subsys_stat |= INT_GE_BSY;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (mix ? frgd_sel : bkgd_sel) {
case 0:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = bkgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 1:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
src_dat = frgd_color;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 2:
src_dat = cpu_dat;
break;
case 3:
if (mach_pixel_read(mach))
src_dat = cpu_dat;
else {
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
READ(dev->accel.src + dev->accel.cx, src_dat);
if (mono_src == 3)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
src_dat = (src_dat & rd_mask) == rd_mask;
}
break;
case 5:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->bpp)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
src_dat = mach->accel.color_pattern_hicol[mach->accel.color_pattern_idx];
else
src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
READ(dev->accel.dest + dev->accel.dx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (compare_mode) {
case 1:
compare = 1;
break;
case 2:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat >= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 3:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat < dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 4:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat != dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 5:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat == dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 6:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat <= dest_cmp_clr) ? 0 : 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 7:
More sonarlint work
2023-06-09 23:46:54 -04:00
compare = (dest_dat > dest_cmp_clr) ? 0 : 1;
break;
default:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
}
if (!compare) {
if (mach_pixel_write(mach)) {
old_dest_dat = dest_dat;
MIX(mix, dest_dat, src_dat);
dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask);
}
}
if (mach->accel.dp_config & 0x10) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
WRITE(dev->accel.dest + dev->accel.dx, dest_dat);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->bpp)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
cpu_dat >>= 16;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
cpu_dat >>= 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cx += mach->accel.src_stepx;
mach->accel.sx++;
if (mach->accel.sx >= mach->accel.src_width) {
mach->accel.sx = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (mach->accel.src_stepx == -1)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cx += mach->accel.src_width;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
else
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cx -= mach->accel.src_width;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.cy += (mach->accel.src_y_dir ? 1 : -1);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.src = mach->accel.src_ge_offset + (dev->accel.cy * mach->accel.src_pitch);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.color_pattern_idx++;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (mach->accel.color_pattern_idx > mach->accel.patt_len)
mach->accel.color_pattern_idx = 0;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->accel.dx += mach->accel.stepx;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.sx++;
if (dev->accel.sx >= mach->accel.width) {
dev->accel.sx = 0;
dev->accel.dy += mach->accel.stepy;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.dest = mach->accel.dst_ge_offset + (dev->accel.dy * mach->accel.dst_pitch);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.line_idx == 2) {
mach->accel.line_array[0] = dev->accel.dx;
mach->accel.line_array[4] = dev->accel.dx;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (dev->accel.sy >= 0)
dev->accel.sy--;
dev->fifo_idx = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return;
}
}
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
static void
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_out_pixtrans(svga_t *svga, mach_t *mach, ibm8514_t *dev, uint16_t val)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
int frgd_sel;
int bkgd_sel;
int mono_src;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
int swap = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
mono_src = (mach->accel.dp_config >> 5) & 3;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((mach->accel.dp_config & 0x04) && (mach->accel.cmd_type != 5)) {
mach_log("Read Host Monochrome Data.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
val = (val >> 8) | (val << 8);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
swap = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
switch (mach->accel.dp_config & 0x200) {
case 0x000: /*8-bit size*/
More sonarlint work
2023-06-09 23:46:54 -04:00
if (mono_src == 2) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if ((frgd_sel != 2) && (bkgd_sel != 2)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if ((mach->accel.dp_config & 0x1000) && !swap) {
mach_log("8-bit bus size swap.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
val = (val >> 8) | (val << 8);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 8, val | (val << 16), 0, svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 1, -1, val | (val << 16), svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 1, -1, val | (val << 16), svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x200: /*16-bit size*/
More sonarlint work
2023-06-09 23:46:54 -04:00
if (mono_src == 2) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if ((frgd_sel != 2) && (bkgd_sel != 2)) {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if (((mach->accel.dp_config & 0x1000) && !swap) || (!(mach->accel.dp_config & 0x1000) && swap)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach_log("16-bit bus size swap.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
val = (val >> 8) | (val << 8);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 16, val | (val << 16), 0, svga, mach, dev);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 2, -1, val | (val << 16), svga, mach, dev);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 2, -1, val | (val << 16), svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_out(uint16_t addr, uint8_t val, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
uint8_t old;
uint8_t rs2;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
uint8_t rs3;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1))
addr ^= 0x60;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if ((addr >= 0x3c6) && (addr <= 0x3c9)) {
mach_log("VGA DAC write regs=%03x, on=%d, display control=%02x, on1=%x, clocksel=%02x.\n",
addr, dev->on, dev->disp_cntl & 0x60, dev->accel.advfunc_cntl & 0x01, mach->accel.clock_sel & 0x01);
} else if ((addr >= 0x2ea) && (addr <= 0x2ed)) {
mach_log("8514/A DAC write regs=%03x, on=%d, display control=%02x, on1=%x, clocksel=%02x.\n",
addr, dev->on, dev->disp_cntl & 0x60, dev->accel.advfunc_cntl & 0x01, mach->accel.clock_sel & 0x01);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (addr) {
case 0x1ce:
mach->index = val;
break;
case 0x1cf:
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
old = mach->regs[mach->index];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->regs[mach->index] = val;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI VGA write reg=%02x, val=%02x, old=%02x.\n", mach->index, val, old);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (mach->index) {
case 0xa3:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((old ^ val) & 0x10) {
mach_log("ATI A3 bit 7.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_recalctimings(svga);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0xa7:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((old ^ val) & 0x80) {
mach_log("ATI A7 bit 7.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_recalctimings(svga);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0xad:
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((old ^ val) & 0x0c) {
mach_log("ATI AD bits 2-3.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_recalctimings(svga);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
case 0xb0:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((old ^ val) & 0x60) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (dev->_8514crt) {
if (!(mach->accel.clock_sel & 0x01)) {
if ((val & 0x20) && !(old & 0x20)) {
dev->on = 1;
dev->vendor_mode = !!(ATI_MACH32);
mach_set_resolution(mach, svga);
mach32_updatemapping(mach, svga);
} else if (!(val & 0x20) && (old & 0x20)) {
dev->on = 0;
dev->vendor_mode = 0;
mach_set_resolution(mach, svga);
mach32_updatemapping(mach, svga);
}
}
} else
svga_recalctimings(svga);
mach_log("ATI B0 bits 5-6: old=%02x, val=%02x, on=%d, bpp=%d, hires=%x, vgahires=%02x, base=%05x.\n",
old & 0x60, val & 0x60, dev->on, dev->accel_bpp, dev->accel.advfunc_cntl & 0x04, svga->gdcreg[5] & 0x60, svga->mapping.base);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0xae:
case 0xb2:
case 0xbe:
mach_log("ATI VGA write reg=0x%02X, val=0x%02X\n", mach->index, val);
if (mach->regs[0xbe] & 0x08) { /* Read/write bank mode */
mach->bank_r = (((mach->regs[0xb2] & 1) << 3) | ((mach->regs[0xb2] & 0xe0) >> 5));
mach->bank_w = ((mach->regs[0xb2] & 0x1e) >> 1);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
More sonarlint work
2023-06-09 23:46:54 -04:00
mach->bank_r |= ((mach->regs[0xae] & 0x0c) << 2);
mach->bank_w |= ((mach->regs[0xae] & 3) << 4);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Separate B2Bank = %02x, AEbank = %02x.\n", mach->regs[0xb2], mach->regs[0xae]);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else { /* Single bank mode */
mach->bank_w = ((mach->regs[0xb2] & 0x1e) >> 1);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32)
More sonarlint work
2023-06-09 23:46:54 -04:00
mach->bank_w |= ((mach->regs[0xae] & 3) << 4);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->bank_r = mach->bank_w;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Single B2Bank = %02x, AEbank = %02x.\n", mach->regs[0xb2], mach->regs[0xae]);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
svga->read_bank = mach->bank_r << 16;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga->write_bank = mach->bank_w << 16;
if (mach->index == 0xbe) {
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((old ^ val) & 0x10) {
mach_log("ATI BE bit 4.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_recalctimings(svga);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
case 0xbd:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((old ^ val) & 0x04)
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach32_updatemapping(mach, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0xb3:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
ati_eeprom_write(&mach->eeprom, val & 0x08, val & 0x02, val & 0x01);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0xb6:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((old ^ val) & 0x10) {
mach_log("ATI B6 bit 4.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_recalctimings(svga);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0xb8:
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((old ^ val) & 0x40) {
mach_log("ATI B8 bit 6.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_recalctimings(svga);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
if ((old ^ val) & 0xc0)
svga_recalctimings(svga);
}
break;
case 0xb9:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((old ^ val) & 0x02) {
mach_log("ATI B9 bit 1.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_recalctimings(svga);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
case 0x2ea:
case 0x2eb:
case 0x2ec:
case 0x2ed:
rs2 = !!(mach->accel.ext_ge_config & 0x1000);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
rs3 = !!(mach->accel.ext_ge_config & 0x2000);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("8514/A Extended mode=%02x.\n", mach->regs[0xb0] & 0x20);
if (ATI_MACH32 && !dev->on) {
if (mach->pci_bus && !mach->ramdac_type)
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
else
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else
svga_out(addr, val, svga);
return;
case 0x3C6:
case 0x3C7:
case 0x3C8:
case 0x3C9:
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
rs2 = !!(mach->regs[0xa0] & 0x20);
rs3 = !!(mach->regs[0xa0] & 0x40);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("VGA Extended mode=%02x.\n", mach->regs[0xb0] & 0x20);
if (ATI_MACH32 && !dev->on) {
if (mach->pci_bus && !mach->ramdac_type)
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
else
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else
svga_out(addr, val, svga);
return;
Even better (hopefully) way to fix the mode switches (November 3rd, 2024) 1. Added the missing call to mach32_updatemapping from port 0x3CF through its index 6. 2. If the accelerator DAC is active and the extended 256 color bit is on too then enable 8514/A mode when needed, otherwise it's VGA mode or decided by the passthrough/clock selection ports. 3. VGA DAC reads are redirected to the 8514/A DAC reads only when 8514/A mode is on.
2024-11-03 04:46:32 +01:00
case 0x3CF:
if (svga->gdcaddr == 6) {
uint8_t old_val = svga->gdcreg[6];
svga->gdcreg[6] = val;
if ((svga->gdcreg[6] & 0xc) != (old_val & 0xc)) {
mach_log("GDCREG6=%02x.\n", svga->gdcreg[6] & 0xc);
mach32_updatemapping(mach, svga);
}
return;
}
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0x3D4:
svga->crtcreg = val & 0x3f;
return;
case 0x3D5:
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (svga->crtcreg & 0x20)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80) && !(mach->regs[0xb4] & 0x80))
return;
if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80) && !(mach->regs[0xb4] & 0x80))
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
val = (svga->crtc[7] & ~0x10) | (val & 0x10);
old = svga->crtc[svga->crtcreg];
svga->crtc[svga->crtcreg] = val;
if (old != val) {
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) {
if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) {
svga->fullchange = 3;
svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5);
} else {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
svga->fullchange = svga->monitor->mon_changeframecount;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_recalctimings(svga);
}
}
}
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
svga_out(addr, val, svga);
}
static uint8_t
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_in(uint16_t addr, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
uint8_t temp = 0xff;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
uint8_t rs2;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
uint8_t rs3;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1))
addr ^= 0x60;
Even better (hopefully) way to fix the mode switches (November 3rd, 2024) 1. Added the missing call to mach32_updatemapping from port 0x3CF through its index 6. 2. If the accelerator DAC is active and the extended 256 color bit is on too then enable 8514/A mode when needed, otherwise it's VGA mode or decided by the passthrough/clock selection ports. 3. VGA DAC reads are redirected to the 8514/A DAC reads only when 8514/A mode is on.
2024-11-03 04:46:32 +01:00
if ((addr >= 0x3c6) && (addr <= 0x3c9) && dev->on) {
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
addr -= 0xdc;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_log("VGA DAC read regs=%03x.\n", addr);
} else if ((addr >= 0x2ea) && (addr <= 0x2ed))
mach_log("8514/A DAC read regs=%03x.\n", addr);
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (addr) {
case 0x1ce:
temp = mach->index;
break;
case 0x1cf:
switch (mach->index) {
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
case 0xa0:
temp = mach->regs[0xa0] | 0x10;
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0xa8:
temp = (svga->vc >> 8) & 3;
break;
case 0xa9:
temp = svga->vc & 0xff;
break;
Small ATI Mach8 changes (May 19th, 2025) 1. Report the ATI 28800 of the Graphics Ultra as 28800-6. 2. Access the upper word properly on vdisp. 3. Make sure there's enough vsyncstart/vtotal space for a full vertical display.
2025-05-19 22:22:03 +02:00
case 0xaa:
if (ATI_GRAPHICS_ULTRA)
temp = 0x06;
else
temp = 0x00;
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0xb0:
temp = mach->regs[0xb0] | 0x80;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
temp &= ~0x18;
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) { /*Mach32 VGA 1MB memory*/
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
temp |= 0x08;
} else { /*ATI 28800 VGA 512kB memory*/
temp |= 0x10;
}
break;
case 0xb7:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
temp = mach->regs[0xb7] & ~0x08;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (ati_eeprom_read(&mach->eeprom))
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
temp |= 0x08;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Switched back to the "Graphics Ultra Pro" ISA-based BIOS as we found the true culprit behind the "brokeness" which is that bit 4 of reg 0xBD of the ATI regs must be set in the reads.
2023-08-15 22:12:30 +02:00
case 0xbd:
temp = mach->regs[0xbd] | 0x10;
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
default:
temp = mach->regs[mach->index];
break;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("ATI VGA read reg=%02x, val=%02x.\n", mach->index, temp);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x2ea:
case 0x2eb:
case 0x2ec:
case 0x2ed:
rs2 = !!(mach->accel.ext_ge_config & 0x1000);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
rs3 = !!(mach->accel.ext_ge_config & 0x2000);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (ATI_MACH32 && !dev->on) {
if (mach->pci_bus && !mach->ramdac_type)
temp = ati68860_ramdac_in((addr & 3) | (rs2 << 2) | (rs3 << 3), svga->ramdac, svga);
else
temp = ati68875_ramdac_in(addr, rs2, rs3, svga->ramdac, svga);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
} else
temp = svga_in(addr, svga);
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0x3D4:
temp = svga->crtcreg;
break;
case 0x3D5:
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (svga->crtcreg & 0x20)
temp = 0xff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
else
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = svga->crtc[svga->crtcreg];
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
default:
temp = svga_in(addr, svga);
break;
}
return temp;
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
void
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
ati8514_out(uint16_t addr, uint8_t val, void *priv)
{
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
mach_log("[%04X:%08X]: ADDON OUT addr=%03x, val=%02x.\n", CS, cpu_state.pc, addr, val);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
8514/A compatible changes on Mach32 of the day (November 3rd, 2024) Mark the ATI extended 8514/A mode accordingly (that is, if bit 5 of ATI reg 0xb0 and using ATI extended ports at the same time). Fixes wrong colors in some instances using standard IBM 8514/A drivers on Mach32.
2024-11-03 23:21:18 +01:00
svga_out(addr, val, priv);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
uint8_t
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
ati8514_in(uint16_t addr, void *priv)
{
uint8_t temp = 0xff;
8514/A compatible changes on Mach32 of the day (November 3rd, 2024) Mark the ATI extended 8514/A mode accordingly (that is, if bit 5 of ATI reg 0xb0 and using ATI extended ports at the same time). Fixes wrong colors in some instances using standard IBM 8514/A drivers on Mach32.
2024-11-03 23:21:18 +01:00
temp = svga_in(addr, priv);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
mach_log("[%04X:%08X]: ADDON IN addr=%03x, temp=%02x.\n", CS, cpu_state.pc, addr, temp);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
return temp;
}
Video changes of the day (January 26th, 2025) XGA: 1. Added a proper poll so to have its timings independent of the SVGA core and changes its renderer accordingly, mainly a blank render one. 2. Workaround the Ctrl-Alt-Del reset of Windows 2.x so that it switches back to VGA text mode correctly when using the 0xA000 64K aperture (in vid_svga.c). SVGA core: Re-organized the way the different timers are organized so that the XGA and 8514/A pollers can coexist with the SVGA timer without conflicts. ATI Mach32: Reworked the true color renderer and made it a Mach32 exclusive due to its differences from the standard one. Fixes wrong rendered colors in NT using the 32bpp renderer in RGB mode.
2025-01-26 14:25:35 +01:00
static void
ati_render_24bpp(svga_t *svga)
{
mach_t *mach = (mach_t *) svga->priv;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint32_t *p;
uint32_t dat;
if ((dev->displine + svga->y_add) < 0)
return;
if (dev->changedvram[dev->ma >> 12] || dev->changedvram[(dev->ma >> 12) + 1] || svga->fullchange) {
p = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
if (mach->accel.ext_ge_config & 0x400) { /*BGR, Blue-(23:16), Green-(15:8), Red-(7:0)*/
for (int x = 0; x <= dev->h_disp; x += 4) {
dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]);
p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
dat = *(uint32_t *) (&dev->vram[(dev->ma + 3) & dev->vram_mask]);
p[x + 1] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
dat = *(uint32_t *) (&dev->vram[(dev->ma + 6) & dev->vram_mask]);
p[x + 2] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
dat = *(uint32_t *) (&dev->vram[(dev->ma + 9) & dev->vram_mask]);
p[x + 3] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
dev->ma += 12;
}
} else { /*RGB, Red-(23:16), Green-(15:8), Blue-(7:0)*/
for (int x = 0; x <= dev->h_disp; x += 4) {
dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]);
p[x] = dat & 0xffffff;
dat = *(uint32_t *) (&dev->vram[(dev->ma + 3) & dev->vram_mask]);
p[x + 1] = dat & 0xffffff;
dat = *(uint32_t *) (&dev->vram[(dev->ma + 6) & dev->vram_mask]);
p[x + 2] = dat & 0xffffff;
dat = *(uint32_t *) (&dev->vram[(dev->ma + 9) & dev->vram_mask]);
p[x + 3] = dat & 0xffffff;
dev->ma += 12;
}
}
dev->ma &= dev->vram_mask;
}
}
static void
ati_render_32bpp(svga_t *svga)
{
mach_t *mach = (mach_t *) svga->priv;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
int x;
uint32_t *p;
uint32_t dat;
if ((dev->displine + svga->y_add) < 0)
return;
if (dev->changedvram[dev->ma >> 12] || dev->changedvram[(dev->ma >> 12) + 1] || dev->changedvram[(dev->ma >> 12) + 2] || svga->fullchange) {
p = &buffer32->line[dev->displine + svga->y_add][svga->x_add];
if (dev->firstline_draw == 2000)
dev->firstline_draw = dev->displine;
dev->lastline_draw = dev->displine;
if (mach->accel.ext_ge_config & 0x400) { /*BGR, Blue-(23:16), Green-(15:8), Red-(7:0)*/
for (x = 0; x <= dev->h_disp; x++) {
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 2)) & dev->vram_mask]);
*p++ = ((dat & 0x00ff0000) >> 16) | (dat & 0x0000ff00) | ((dat & 0x000000ff) << 16);
}
} else { /*RGB, Red-(31:24), Green-(23:16), Blue-(15:8)*/
for (x = 0; x <= dev->h_disp; x++) {
dat = *(uint32_t *) (&dev->vram[(dev->ma + (x << 2)) & dev->vram_mask]);
*p++ = ((dat & 0xffffff00) >> 8);
}
}
dev->ma += (x * 4);
dev->ma &= dev->vram_mask;
}
}
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
/*The situation is the following:
When ATI mode is selected, allow complete auto-detection.
But when 8514/A mode is selected, allow detection based on the shadow register sets.
*/
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
static void
mach_set_resolution(mach_t *mach, svga_t *svga)
{
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
int ret = 0;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->h_total = dev->htotal + 1;
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if (dev->h_total == 1) /*Default to 1024x768 87hz 8514/A htotal timings if it goes to 0.*/
dev->h_total = 0x9e;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->hdisp = (dev->hdisped + 1) << 3;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->vdisp = (dev->v_disp + 1) >> 1;
if ((dev->vdisp == 478) || (dev->vdisp == 598) || (dev->vdisp == 766) || (dev->vdisp == 1022))
dev->vdisp += 2;
dev->v_total = dev->v_total_reg + 1;
dev->v_syncstart = dev->v_sync_start + 1;
Small ATI Mach8 changes (May 19th, 2025) 1. Report the ATI 28800 of the Graphics Ultra as 28800-6. 2. Access the upper word properly on vdisp. 3. Make sure there's enough vsyncstart/vtotal space for a full vertical display.
2025-05-19 22:22:03 +02:00
mach_log("VSYNCSTART=%d, VTOTAL=%d, interlace=%02x, vdisp=%d.\n", dev->v_syncstart, dev->v_total, dev->interlace, dev->vdisp);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
Late night fixes for the Mach8 (May 5th, 2025) 1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows. 2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
if (ATI_8514A_ULTRA) {
if ((mach->accel.clock_sel & 0x01) &&
!(dev->accel.advfunc_cntl & 0x01))
ret = 2;
else if ((dev->accel.advfunc_cntl & 0x01) &&
!(mach->accel.clock_sel & 0x01))
ret = 1;
else if ((!(dev->accel.advfunc_cntl & 0x01) && (mach->old_on1 & 0x01)) ||
(!(mach->accel.clock_sel & 0x01) && (mach->old_on2 & 0x01)))
ret = 0;
} else {
if ((mach->accel.clock_sel & 0x01) && !(mach->old_on2 & 0x01) &&
!(dev->accel.advfunc_cntl & 0x01))
ret = 2;
else if ((dev->accel.advfunc_cntl & 0x01) && !(mach->old_on1 & 0x01) &&
!(mach->accel.clock_sel & 0x01))
ret = 1;
else if ((!(dev->accel.advfunc_cntl & 0x01) && (mach->old_on1 & 0x01)) ||
(!(mach->accel.clock_sel & 0x01) && (mach->old_on2 & 0x01)))
ret = 0;
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (ret) {
if (ret == 2)
svga_recalctimings(svga);
else {
switch (mach->shadow_set & 0x03) {
case 0x00:
if (mach->crt_resolution)
svga_recalctimings(svga);
else {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if (dev->accel.advfunc_cntl & 0x04) {
if (dev->hdisp == 640) {
dev->hdisp = 1024;
dev->vdisp = 768;
Late night fixes for the Mach8 (May 5th, 2025) 1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows. 2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
mach_log("1024x768.\n");
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
}
} else {
if (dev->hdisp == 1024) {
dev->hdisp = 640;
dev->vdisp = 480;
Late night fixes for the Mach8 (May 5th, 2025) 1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows. 2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
mach_log("640x480.\n");
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
}
}
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
svga_recalctimings(svga);
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
break;
case 0x01:
mach->crt_resolution = 0x01;
break;
case 0x02:
mach->crt_resolution = 0x02;
break;
default:
break;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
}
} else
svga_recalctimings(svga);
mach_log("Shadow set ATI=%x, shadow set 8514/A and on1=%x, on2=%x, resolution h=%d, v=%d, vtotal=%d, vsyncstart=%d, crtres=%d, ret=%d, actual passthrough=%x.\n", mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01, dev->hdisp, dev->vdisp, dev->v_total, dev->v_syncstart, mach->crt_resolution, ret, dev->on);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
void
ati8514_recalctimings(svga_t *svga)
{
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
mach_t *mach = (mach_t *) svga->ext8514;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach_log("ON=%d, vgahdisp=%d.\n", dev->on, svga->hdisp);
if (dev->on) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->interlace = !!(dev->disp_cntl & 0x10);
Fix pitch regression of the ATI Mach8/32 side (April 28th, 2025) This patch fixes the pitch that was originally 0 when specifying the 8514/A compatible side in the Mach8/32 cards, which should be 1024 for 8514/A compatible stuff.
2025-04-28 19:28:58 +02:00
dev->pitch = dev->ext_pitch;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
dev->rowoffset = dev->ext_crt_pitch;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
dev->rowcount = !!(dev->disp_cntl & 0x08);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16)) << 2;
mach->accel.crt_offset = (mach->accel.crt_offset_lo | (mach->accel.crt_offset_hi << 16)) << 2;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.ge_offset -= mach->accel.crt_offset;
Late night fixes for the Mach8 (May 5th, 2025) 1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows. 2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
Fixed log excess.
2025-03-29 20:36:00 +01:00
mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x.\n",
Macro Cleaning
2025-02-01 03:29:03 -05:00
dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x05, mach->accel.clock_sel & 0x01);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Late night fixes for the Mach8 (May 5th, 2025) 1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows. 2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
mach->accel.src_pitch = dev->pitch;
mach->accel.dst_pitch = dev->pitch;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.src_ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16)) << 2;
mach->accel.dst_ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16)) << 2;
mach->accel.src_ge_offset -= mach->accel.crt_offset;
mach->accel.dst_ge_offset -= mach->accel.crt_offset;
Late night fixes for the Mach8 (May 5th, 2025) 1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows. 2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
mach_log("8514/A ON, pitch=%d, GE offset=%08x.\n", ((mach->accel.ge_pitch & 0xff) << 3), dev->accel.ge_offset);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->h_disp = dev->hdisp;
dev->dispend = dev->vdisp;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (dev->dispend == 600)
dev->h_disp = 800;
else if (dev->h_disp == 640)
dev->dispend = 480;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
if (dev->accel.advfunc_cntl & 0x04)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga->clock_8514 = (cpuclock * (double) (1ULL << 32)) / 44900000.0;
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
else
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga->clock_8514 = (cpuclock * (double) (1ULL << 32)) / 25175000.0;
Major video changes of the day (October 3rd, 2024) 8514/A changes: 1. Correct interlaced display resolution. 2. Added a limit to cursor coordinates. 3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS. 4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping). Cirrus related: 1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual). IBM VGA: 1. Built-in/option rom-less VGA don't need the "available" flag. ATI Mach8/32: 1. As with 8514/A, corrected interlaced display. XGA-1/-2: 1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs. 2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init. 3. The Memory Mapped R/W sides now account for instance in their address range. 4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading. 5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT. 6. More logs when enabled to see any future bugs.
2024-10-03 14:56:23 +02:00
if (dev->interlace)
dev->dispend >>= 1;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("cntl=%d, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d.\n",
dev->accel.advfunc_cntl & 0x04, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset,
mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->vram_512k_8514) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (dev->h_disp == 640)
dev->pitch = 640;
else
dev->pitch = 1024;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
dev->accel_bpp = 8;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
svga->render8514 = ibm8514_render_8bpp;
Late night fixes for the Mach8 (May 5th, 2025) 1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows. 2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
} else
mach->crt_resolution = 0;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static void
mach_recalctimings(svga_t *svga)
{
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach_t *mach = (mach_t *) svga->priv;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Fix more compile warnings
2023-08-14 18:59:02 -04:00
int clock_sel;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Horizontal blanking calculation now takes into account horizontal timings multiplications and divisions, fixes a lot of S3 (and ViRGE) modes.
2024-01-13 03:54:56 +01:00
if (mach->regs[0xad] & 0x08)
Fixed off by one errors in (S)VGA horizontal blanking start calculation.
2024-02-18 17:54:14 +01:00
svga->hblankstart = ((mach->regs[0x0d] >> 2) << 8) + svga->crtc[2];
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
clock_sel = ((svga->miscout >> 2) & 3) | ((mach->regs[0xbe] & 0x10) >> 1) | ((mach->regs[0xb9] & 2) << 1);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->regs[0xad] & 0x04)
svga->ma_latch |= 0x40000;
if (mach->regs[0xad] & 0x08)
svga->ma_latch |= 0x80000;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (mach->regs[0xa3] & 0x10)
svga->ma_latch |= 0x10000;
More sonarlint work
2023-06-09 23:46:54 -04:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (mach->regs[0xb0] & 0x40)
svga->ma_latch |= 0x20000;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
ATI VGA mode fixes: 1. Fixed 4-bit packed modes. 2. Preparation of fixing the 2-bit modes. 3. Extra: fixed the accelerator mode switches again (Mach8/32 only).
2023-12-27 16:07:03 +01:00
if ((mach->regs[0xb6] & 0x18) >= 0x10) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga->hdisp <<= 1;
svga->htotal <<= 1;
Fix horizontal blanking calculation, fixes some S3 blanking excesses.
2024-02-07 00:11:02 +01:00
svga->dots_per_clock <<= 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga->rowoffset <<= 1;
}
ATI VGA mode fixes: 1. Fixed 4-bit packed modes. 2. Preparation of fixing the 2-bit modes. 3. Extra: fixed the accelerator mode switches again (Mach8/32 only).
2023-12-27 16:07:03 +01:00
if (mach->regs[0xb0] & 0x20) {
if ((mach->regs[0xb6] & 0x18) >= 0x10)
svga->packed_4bpp = 1;
else
svga->packed_4bpp = 0;
} else
svga->packed_4bpp = 0;
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (!ATI_MACH32) {
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((mach->regs[0xb6] & 0x18) == 0x08) {
ATI VGA mode fixes: 1. Fixed 4-bit packed modes. 2. Preparation of fixing the 2-bit modes. 3. Extra: fixed the accelerator mode switches again (Mach8/32 only).
2023-12-27 16:07:03 +01:00
svga->hdisp <<= 1;
svga->htotal <<= 1;
Fix horizontal blanking calculation, fixes some S3 blanking excesses.
2024-02-07 00:11:02 +01:00
svga->dots_per_clock <<= 1;
ATI VGA mode fixes: 1. Fixed 4-bit packed modes. 2. Preparation of fixing the 2-bit modes. 3. Extra: fixed the accelerator mode switches again (Mach8/32 only).
2023-12-27 16:07:03 +01:00
svga->ati_4color = 1;
} else
svga->ati_4color = 0;
}
Couple of changes in the video side. 1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...) 2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach_log("ON=%d, override=%d, gelo=%04x, gehi=%04x, vgahdisp=%d.\n", dev->on, svga->override, mach->accel.ge_offset_lo, mach->accel.ge_offset_hi, svga->hdisp);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->on) {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
dev->ma_latch = 0; /*(mach->accel.crt_offset_lo | (mach->accel.crt_offset_hi << 16)) << 2;*/
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->interlace = !!(dev->disp_cntl & 0x10);
Fix pitch regression of the ATI Mach8/32 side (April 28th, 2025) This patch fixes the pitch that was originally 0 when specifying the 8514/A compatible side in the Mach8/32 cards, which should be 1024 for 8514/A compatible stuff.
2025-04-28 19:28:58 +02:00
dev->pitch = dev->ext_pitch;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->rowoffset = dev->ext_crt_pitch;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
dev->rowcount = !!(dev->disp_cntl & 0x08);
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
dev->accel.ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16));
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.crt_offset = (mach->accel.crt_offset_lo | (mach->accel.crt_offset_hi << 16));
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (dev->bpp) {
dev->accel.ge_offset <<= 1;
mach->accel.crt_offset <<= 1;
} else {
dev->accel.ge_offset <<= 2;
mach->accel.crt_offset <<= 2;
}
if (ATI_MACH32 && !dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
dev->accel.ge_offset <<= 1;
mach->accel.crt_offset <<= 1;
}
dev->accel.ge_offset -= mach->accel.crt_offset;
mach_log("RowCount=%x, rowoffset=%x, pitch=%d, geoffset=%x, crtoffset=%x.\n", dev->rowcount, dev->rowoffset, dev->pitch, dev->accel.ge_offset, mach->accel.crt_offset);
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x, interlace=%x.\n",
dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04,
mach->accel.clock_sel & 0xfe, dev->interlace);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->h_disp = dev->hdisp;
dev->dispend = dev->vdisp;
if (dev->dispend == 959) { /*FIXME: vertical resolution mess on EEPROM tests on Mach8*/
dev->dispend >>= 1;
dev->dispend++;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
} else if (dev->dispend == 600)
dev->h_disp = 800;
else if (dev->h_disp == 640)
dev->dispend = 480;
Mach8/32 horizontal display changes. Make sure for the 9001st time to display correctly the horizontal side of the display (looking at you, ATI 1992 set for win3.1x and Mach8/32 drivers for OS/2 1.2x).
2024-03-01 19:50:23 +01:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga->clock_8514 = (cpuclock * (double) (1ULL << 32)) / svga->getclock((mach->accel.clock_sel >> 2) & 0x0f, svga->clock_gen);
Mach32 and clock changes of the day (September 22nd, 2024) 1. Going from screenshots of the Mach32 chips, they all have the ati18811-1 clock regardless of the bus type, whilst the Mach8 has an ati18812, which is actually a ati18811-0 2. Unbreak the NS3.1 Mach32 driver, ergo, don't block the LFB processing.
2024-09-22 21:05:10 +02:00
if (mach->accel.clock_sel & 0x40)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga->clock_8514 *= 2;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
if (dev->interlace)
dev->dispend >>= 1;
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
switch ((mach->shadow_set >> 8) & 0x03) {
case 0x00:
mach->accel.src_pitch = ((mach->accel.ge_pitch & 0xff) << 3);
mach->accel.dst_pitch = ((mach->accel.ge_pitch & 0xff) << 3);
mach->accel.src_ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16));
mach->accel.dst_ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16));
if (dev->bpp) {
mach->accel.src_ge_offset <<= 1;
mach->accel.dst_ge_offset <<= 1;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.src_ge_offset <<= 2;
mach->accel.dst_ge_offset <<= 2;
}
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
mach->accel.src_ge_offset <<= 1;
mach->accel.dst_ge_offset <<= 1;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.src_ge_offset -= mach->accel.crt_offset;
mach->accel.dst_ge_offset -= mach->accel.crt_offset;
dev->accel.src_pitch = mach->accel.src_pitch;
dev->accel.dst_pitch = mach->accel.dst_pitch;
dev->accel.src_ge_offset = mach->accel.src_ge_offset;
dev->accel.dst_ge_offset = mach->accel.dst_ge_offset;
break;
case 0x01:
mach->accel.dst_pitch = ((mach->accel.ge_pitch & 0xff) << 3);
mach->accel.dst_ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16));
if (dev->bpp)
mach->accel.dst_ge_offset <<= 1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.dst_ge_offset <<= 2;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
mach->accel.dst_ge_offset <<= 1;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.dst_ge_offset -= mach->accel.crt_offset;
dev->accel.dst_pitch = mach->accel.dst_pitch;
dev->accel.dst_ge_offset = mach->accel.dst_ge_offset;
break;
case 0x02:
mach->accel.src_pitch = ((mach->accel.ge_pitch & 0xff) << 3);
mach->accel.src_ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16));
if (dev->bpp)
mach->accel.src_ge_offset <<= 1;
else
mach->accel.src_ge_offset <<= 2;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
mach->accel.src_ge_offset <<= 1;
mach->accel.src_ge_offset -= mach->accel.crt_offset;
dev->accel.src_pitch = mach->accel.src_pitch;
dev->accel.src_ge_offset = mach->accel.src_ge_offset;
break;
default:
break;
}
mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n",
dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset,
mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace, svga->hdisp);
if ((mach->accel.ext_ge_config & 0x800) || (!(mach->accel.ext_ge_config & 0x8000) && !(mach->accel.ext_ge_config & 0x800))) {
mach_log("hv=%d,%d, pitch=%d, rowoffset=%d, gextconfig=%03x, bpp=%d, shadow=%x, vgahdisp=%d.\n",
Macro Cleaning
2025-02-01 03:29:03 -05:00
dev->h_disp, dev->dispend, dev->pitch, dev->ext_crt_pitch, mach->accel.ext_ge_config & 0xcec0,
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel_bpp, mach->shadow_set & 0x03, svga->hdisp);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
switch (dev->accel_bpp) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 8:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if ((mach->accel.ext_ge_config & 0x30) == 0x00) {
if (dev->vram_512k_8514) {
if (dev->h_disp == 640)
dev->pitch = 640;
else
dev->pitch = 1024;
}
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
svga->render8514 = ibm8514_render_8bpp;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
case 15:
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
svga->render8514 = ibm8514_render_15bpp;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
case 16:
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
svga->render8514 = ibm8514_render_16bpp;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
case 24:
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
mach_log("GEConfig24bpp: %03x.\n", mach->accel.ext_ge_config & 0x600);
Video changes of the day (January 26th, 2025) XGA: 1. Added a proper poll so to have its timings independent of the SVGA core and changes its renderer accordingly, mainly a blank render one. 2. Workaround the Ctrl-Alt-Del reset of Windows 2.x so that it switches back to VGA text mode correctly when using the 0xA000 64K aperture (in vid_svga.c). SVGA core: Re-organized the way the different timers are organized so that the XGA and 8514/A pollers can coexist with the SVGA timer without conflicts. ATI Mach32: Reworked the true color renderer and made it a Mach32 exclusive due to its differences from the standard one. Fixes wrong rendered colors in NT using the 32bpp renderer in RGB mode.
2025-01-26 14:25:35 +01:00
svga->render8514 = ati_render_24bpp;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
case 32:
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
mach_log("GEConfig32bpp: %03x.\n", mach->accel.ext_ge_config & 0x600);
Video changes of the day (January 26th, 2025) XGA: 1. Added a proper poll so to have its timings independent of the SVGA core and changes its renderer accordingly, mainly a blank render one. 2. Workaround the Ctrl-Alt-Del reset of Windows 2.x so that it switches back to VGA text mode correctly when using the 0xA000 64K aperture (in vid_svga.c). SVGA core: Re-organized the way the different timers are organized so that the XGA and 8514/A pollers can coexist with the SVGA timer without conflicts. ATI Mach32: Reworked the true color renderer and made it a Mach32 exclusive due to its differences from the standard one. Fixes wrong rendered colors in NT using the 32bpp renderer in RGB mode.
2025-01-26 14:25:35 +01:00
svga->render8514 = ati_render_32bpp;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
break;
Fix more compile warnings
2023-08-14 18:59:02 -04:00
default:
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
} else {
Late night fixes for the Mach8 (May 5th, 2025) 1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows. 2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
mach->accel.src_pitch = dev->pitch;
mach->accel.dst_pitch = dev->pitch;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.src_ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16));
mach->accel.dst_ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16));
Late night fixes for the Mach8 (May 5th, 2025) 1. The Mach8 doesn't have separate graphics pitches a la Mach32 (68800-6 and up), fixes the rendering in some drivers for Windows. 2. Special case for the add-on Mach8 for the mode switching (resolution only).
2025-05-05 02:02:02 +02:00
mach->accel.src_ge_offset <<= 2;
mach->accel.dst_ge_offset <<= 2;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.src_ge_offset -= mach->accel.crt_offset;
mach->accel.dst_ge_offset -= mach->accel.crt_offset;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n",
dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset,
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 0x03, dev->interlace, svga->hdisp);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->vram_512k_8514) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (dev->h_disp == 640)
dev->pitch = 640;
else
dev->pitch = 1024;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
dev->accel_bpp = 8;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
svga->render8514 = ibm8514_render_8bpp;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->crt_resolution = 0;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if (!svga->scrblank && (svga->crtc[0x17] & 0x80) && svga->attr_palette_enable) {
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("GDCREG5=%02x, ATTR10=%02x, ATI B0 bit 5=%02x, ON=%d.\n",
svga->gdcreg[5] & 0x60, svga->attrregs[0x10] & 0x40, mach->regs[0xb0] & 0x20, dev->on);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if ((svga->gdcreg[6] & 0x01) || (svga->attrregs[0x10] & 0x01)) {
if ((svga->gdcreg[5] & 0x40) || (svga->attrregs[0x10] & 0x40) || (mach->regs[0xb0] & 0x20)) {
svga->clock = (cpuclock * (double) (1ULL << 32)) / svga->getclock(clock_sel, svga->clock_gen);
mach_log("VGA clock=%02x.\n", mach->regs[0xa7] & 0x80);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if (mach->regs[0xb8] & 0x40)
svga->clock *= 2;
} else {
switch (mach->regs[0xb8] & 0xc0) {
case 0x40:
svga->clock *= 2;
break;
case 0x80:
svga->clock *= 3;
break;
case 0xc0:
svga->clock *= 4;
break;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
default:
break;
}
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
svga->map8 = svga->pallook;
mach_log("Lowres=%x, seqreg[1]bit3=%x.\n", svga->lowres, svga->seqregs[1] & 8);
if (svga->lowres)
svga->render = svga_render_8bpp_lowres;
else {
svga->render = svga_render_8bpp_highres;
if (!svga->packed_4bpp) {
svga->ma_latch <<= 1;
svga->rowoffset <<= 1;
}
}
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
}
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
static void
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, uint16_t val, int len)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
int frgd_sel;
int bkgd_sel;
int mono_src;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (port & 0x8000) {
if ((port & 0x06) != 0x06) {
if ((port != 0xe2e8) && (port != 0xe2e9) && (port != 0xe6e8) && (port != 0xe6e9)) {
if (port & 0x4000)
port &= ~0x4000;
}
}
}
More ATI accel fixes and undocumented stuff. 1. Apparently some stuff uses read-only port 0x86ee and expects it to return 0 while port 0xf6ee is an alias to 0x82e8, this should fix hangs in Majong 8514 using ATI's DOS drivers. 2. 8514 data available bits are reset properly when new parameters for a new command are installed (port 0xCEEE), fixes remaining hangs with some stuff.
2023-12-28 02:01:45 +01:00
mach_log("[%04X:%08X]: Port FIFO OUT=%04x, val=%04x, len=%d.\n", CS, cpu_state.pc, port, val, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (port) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x2e8:
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (!(mach->shadow_cntl & 0x04))
dev->htotal = val;
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0xae8:
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (!(mach->shadow_cntl & 0x04)) {
WRITE8(port, dev->hsync_start, val);
}
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0xee8:
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (!(mach->shadow_cntl & 0x04)) {
WRITE8(port, dev->hsync_width, val);
}
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x6e8:
if (len == 2) {
mach_log("HDISP and HTOTAL=%04x, len=%d, set=%x, ATI mode bit=%x.\n", val, len, mach->shadow_set & 0x03, mach->accel.clock_sel & 0x01);
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x04))
dev->htotal = (val >> 8) & 0xff;
if (!(mach->shadow_cntl & 0x08)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if ((dev->htotal || (mach->accel.clock_sel & 0x01)) && (val & 0xff)) {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
WRITE8(port, dev->hdisped, val);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
}
} else {
mach_log("HDISP and HTOTAL=%02x, len=%d, set=%x, ATI mode bit=%x.\n", val, len, mach->shadow_set & 0x03, mach->accel.clock_sel & 0x01);
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x08)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if ((dev->htotal || (mach->accel.clock_sel & 0x01)) && (val & 0xff)) {
WRITE8(port, dev->hdisped, val);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
}
}
mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x, shadowcntl=%02x, shadowset=%02x.\n",
CS, cpu_state.pc, port, val, mach->shadow_cntl & 0x08, mach->shadow_set & 0x03);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x6e9:
if (len == 1) {
mach_log("HDISP and HTOTAL+1=%02x, len=%d, set=%x, ATI mode bit=%x.\n", val, len, mach->shadow_set & 0x03, mach->accel.clock_sel & 0x01);
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (!(mach->shadow_cntl & 0x04)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->htotal = val;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x12e8:
if (len == 2) {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (!(mach->shadow_cntl & 0x10) && val) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->v_total_reg = val;
dev->v_total_reg &= 0x1fff;
}
}
} else {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (!(mach->shadow_cntl & 0x10)) {
WRITE8(port, dev->v_total_reg, val);
dev->v_total_reg &= 0x1fff;
}
}
}
mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x12e9:
if (len == 1) {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (!(mach->shadow_cntl & 0x10)) { /*For 8514/A mode, take the shadow sets into account.*/
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, dev->v_total_reg, val >> 8);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->v_total_reg &= 0x1fff;
}
}
mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val);
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x16e8:
if (len == 2) {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (!(mach->shadow_cntl & 0x20) && val) {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
dev->v_disp = val;
dev->v_disp &= 0x1fff;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2);
mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val);
} else {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x20)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
WRITE8(port, dev->v_disp, val);
dev->v_disp &= 0x1fff;
}
}
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x16e9:
if (len == 1) {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x20)) {
Small ATI Mach8 changes (May 19th, 2025) 1. Report the ATI 28800 of the Graphics Ultra as 28800-6. 2. Access the upper word properly on vdisp. 3. Make sure there's enough vsyncstart/vtotal space for a full vertical display.
2025-05-19 22:22:03 +02:00
WRITE8(port, dev->v_disp, val >> 8);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->v_disp &= 0x1fff;
}
}
mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2);
mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val);
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x1ae8:
if (len == 2) {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (!(mach->shadow_cntl & 0x10) && val) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->v_sync_start = val;
dev->v_sync_start &= 0x1fff;
}
}
mach_log("ATI 8514/A: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart);
mach_log("ATI 8514/A: (0x%04x): vsyncstart=0x%02x.\n", port, val);
} else {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x10)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
WRITE8(port, dev->v_sync_start, val);
dev->v_sync_start &= 0x1fff;
}
}
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x1ae9:
if (len == 1) {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
if (!(mach->shadow_cntl & 0x10)) {
Small ATI Mach8 changes (May 19th, 2025) 1. Report the ATI 28800 of the Graphics Ultra as 28800-6. 2. Access the upper word properly on vdisp. 3. Make sure there's enough vsyncstart/vtotal space for a full vertical display.
2025-05-19 22:22:03 +02:00
WRITE8(port, dev->v_sync_start, val >> 8);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->v_sync_start &= 0x1fff;
}
}
mach_log("ATI 8514/A: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart);
mach_log("ATI 8514/A: (0x%04x): vsyncstart=0x%02x.\n", port, val);
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
svga_recalctimings(svga);
break;
case 0x1ee8:
case 0x1ee9:
svga_recalctimings(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x22e8:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if ((mach->shadow_cntl & 0x03) == 0x00)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->disp_cntl = val;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("ATI 8514/A: DISP_CNTL write %04x=%02x, written=%02x, interlace=%d.\n",
port, val & 0x70, dev->disp_cntl & 0x70, dev->interlace);
svga_recalctimings(svga);
break;
case 0x42e8:
case 0x42e9:
mach_log("VBLANK stat=%02x, val=%02x.\n", dev->subsys_stat, val);
if (len == 2)
dev->subsys_cntl = val;
else {
WRITE8(port, dev->subsys_cntl, val);
}
dev->subsys_stat &= ~val;
if ((dev->subsys_cntl & 0xc000) == 0x8000) {
mach->force_busy = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
}
break;
case 0x46e8:
case 0x46e9:
mach_log("0x%04x write: VGA subsystem enable add-on=%02x.\n", port, val);
break;
case 0x4ae8:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
case 0x4ae9:
mach->old_on1 = dev->accel.advfunc_cntl & 0x01;
WRITE8(port, dev->accel.advfunc_cntl, val);
if (len == 2) {
WRITE8(port + 1, dev->accel.advfunc_cntl, val >> 8);
}
dev->on = dev->accel.advfunc_cntl & 0x01;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->vendor_mode = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (dev->_8514crt) {
if (mach->regs[0xb0] & 0x20) {
dev->on = 1;
dev->vendor_mode = !!(ATI_MACH32);
}
}
mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, valxor=%x, shadow crt=%x, hdisp=%d, vdisp=%d, extmode=%02x, accelbpp=%d, crt=%d, crtres=%d.\n",
CS, cpu_state.pc, port, val & 0x01, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp, mach->regs[0xb0] & 0x20, dev->accel_bpp, dev->_8514crt, mach->crt_resolution);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_set_resolution(mach, svga);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
mach32_updatemapping(mach, svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else {
Fix pitch regression of the ATI Mach8/32 side (April 28th, 2025) This patch fixes the pitch that was originally 0 when specifying the 8514/A compatible side in the Mach8/32 cards, which should be 1024 for 8514/A compatible stuff.
2025-04-28 19:28:58 +02:00
dev->ext_pitch = 1024;
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
dev->ext_crt_pitch = 128;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_set_resolution(mach, svga);
}
mach_log("Vendor IBM mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480");
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0x82e8:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
ibm8514_accel_out_fifo(svga, port, val, len);
mach_log("DSTY=%04x, len=%d.\n", val & 0x07ff, len);
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0x86e8:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
ibm8514_accel_out_fifo(svga, port, val, len);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("DSTX=%04x, len=%d.\n", val & 0x07ff, len);
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0x8ae8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_accel_out_fifo(svga, port, val, len);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("SRCY=%04x, len=%d.\n", val & 0x07ff, len);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
mach->accel.src_y = val & 0x07ff;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.src_y_scan = ((int64_t)(val & 0x07ff));
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x8ee8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_accel_out_fifo(svga, port, val, len);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("SRCX=%04x, len=%d.\n", val & 0x07ff, len);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
mach->accel.src_x = val & 0x07ff;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.src_x_scan = ((int64_t)(val & 0x07ff));
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x92e8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_accel_out_fifo(svga, port, val, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x96e8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_accel_out_fifo(svga, port, val, len);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
mach->accel.test = val & 0x1fff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x9ae8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach->accel.cmd_type = -1;
ibm8514_accel_out_fifo(svga, port, val, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x9ee8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ibm8514_accel_out_fifo(svga, port, val, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0xa2e8:
case 0xe2e8:
if (port == 0xe2e8) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("%04X: Background Color=%04x, pix=%d, len=%d.\n", port, val, dev->accel.cmd_back, len);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (!dev->accel.cmd_back) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.cmd_type >= 0) {
if (mach_pixel_read(mach))
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach_log("ATI transfer.\n");
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_out_pixtrans(svga, mach, dev, val);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
if (ibm8514_cpu_dest(svga))
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach_log("IBM transfer.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
ibm8514_accel_out_pixtrans(svga, port, val, len);
}
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
} else {
dev->accel.bkgd_color = val;
mach_log("%04X: CMDBack BKGDCOLOR, sy=%d, height=%d, cmdtype=%d, val=%04x.\n", port, dev->accel.sy, mach->accel.height, mach->accel.cmd_type, val);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (!dev->accel.cmd_back) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (mach->accel.cmd_type >= 0) {
if (mach_pixel_read(mach))
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach->accel.pix_trans[1] = val;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
dev->accel.bkgd_color = val;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("%04X: Background Color=%04x.\n", port, val);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
case 0xa6e8:
case 0xe6e8:
if (port == 0xe6e8) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("%04X: Foreground Color=%04x, pix=%d, len=%d.\n", port, val, dev->accel.cmd_back, len);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (!dev->accel.cmd_back) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.cmd_type >= 0) {
if (mach_pixel_read(mach))
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach_log("ATI transfer.\n");
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_out_pixtrans(svga, mach, dev, val);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
if (ibm8514_cpu_dest(svga))
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach_log("IBM transfer.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
ibm8514_accel_out_pixtrans(svga, port, val, len);
}
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
} else
dev->accel.frgd_color = val;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (!dev->accel.cmd_back) {
if (mach->accel.cmd_type >= 0) {
if (mach_pixel_read(mach))
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach->accel.pix_trans[1] = val;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->accel.frgd_color = val;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach_log("%04X: Foreground Color=%04x.\n", port, val);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
case 0xe2e9:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0xe6e9:
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
mach_log("Write PORT=%04x, 8514/A=%x, val0=%02x, sy=%d, len=%d, dx=%d, dy=%d.\n", port, dev->accel.cmd_back, val, dev->accel.sy, len, dev->accel.dx, dev->accel.dy);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 1) {
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if (!dev->accel.cmd_back) {
if (mach->accel.cmd_type >= 0) {
if (mach_pixel_read(mach))
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach->accel.pix_trans[0] = val;
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
mono_src = (mach->accel.dp_config >> 5) & 3;
More sonarlint work
2023-06-09 23:46:54 -04:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
switch (mach->accel.dp_config & 0x200) {
case 0x000: /*8-bit size*/
if (mono_src == 2) {
if ((frgd_sel != 2) && (bkgd_sel != 2)) {
mach_accel_start(mach->accel.cmd_type, 1, 8, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, svga, mach, dev);
} else
mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), svga, mach, dev);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), svga, mach, dev);
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
break;
case 0x200: /*16-bit size*/
if (mono_src == 2) {
if ((frgd_sel != 2) && (bkgd_sel != 2)) {
if (mach->accel.dp_config & 0x1000)
mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[1] | (mach->accel.pix_trans[0] << 8), 0, svga, mach, dev);
else
mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, svga, mach, dev);
} else
mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), svga, mach, dev);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), svga, mach, dev);
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
break;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
default:
break;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_log("Write Port=%04x, Busy=%02x.\n", port, dev->force_busy2);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0xaae8:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (len == 2)
mach->accel.dst_clr_cmp_mask = val;
fallthrough;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0xaee8:
case 0xb2e8:
case 0xb6e8:
case 0xbae8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
ibm8514_accel_out_fifo(svga, port, val, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0xbee8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ibm8514_accel_out_fifo(svga, port, val, len);
if (len == 2) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if ((dev->accel.multifunc_cntl >> 12) == 5) {
Fix pitch regression of the ATI Mach8/32 side (April 28th, 2025) This patch fixes the pitch that was originally 0 when specifying the 8514/A compatible side in the Mach8/32 cards, which should be 1024 for 8514/A compatible stuff.
2025-04-28 19:28:58 +02:00
if (!ATI_MACH32) {
dev->ext_pitch = 1024;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->ext_crt_pitch = 128;
Fix pitch regression of the ATI Mach8/32 side (April 28th, 2025) This patch fixes the pitch that was originally 0 when specifying the 8514/A compatible side in the Mach8/32 cards, which should be 1024 for 8514/A compatible stuff.
2025-04-28 19:28:58 +02:00
svga_recalctimings(svga);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
break;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
/*ATI Mach8/32 specific registers*/
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x2ee:
case 0x2ef:
if (len == 2) {
mach->overscan_col_8 = val & 0xff;
mach->overscan_b_col_24 = (val >> 8) & 0xff;
} else {
if (port & 1)
mach->overscan_b_col_24 = val;
else
mach->overscan_col_8 = val;
}
svga_recalctimings(svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x6ee:
case 0x6ef:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->overscan_g_col_24 = val & 0xff;
mach->overscan_r_col_24 = (val >> 8) & 0xff;
} else {
if (port & 1)
mach->overscan_r_col_24 = val;
else
mach->overscan_g_col_24 = val;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
svga_recalctimings(svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xaee:
case 0xaef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, mach->cursor_offset_lo_reg, val);
if (len == 2) {
WRITE8(port + 1, mach->cursor_offset_lo_reg, val >> 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->cursor_offset_lo = mach->cursor_offset_lo_reg;
dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
dev->hwcursor.addr <<= 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xeee:
case 0xeef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, mach->cursor_offset_hi_reg, val);
if (len == 2) {
WRITE8(port + 1, mach->cursor_offset_hi_reg, val >> 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->hwcursor.ena = !!(mach->cursor_offset_hi_reg & 0x8000);
mach->cursor_offset_hi = mach->cursor_offset_hi_reg & 0x0f;
dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
dev->hwcursor.addr <<= 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x12ee:
case 0x12ef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, mach->cursor_x, val);
if (len == 2) {
WRITE8(port + 1, mach->cursor_x, val >> 8);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
dev->hwcursor.x = mach->cursor_x & 0x7ff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x16ee:
case 0x16ef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, mach->cursor_y, val);
if (len == 2) {
WRITE8(port + 1, mach->cursor_y, val >> 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->hwcursor.y = mach->cursor_y & 0xfff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x1aee:
case 0x1aef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, mach->cursor_col_b, val);
if (len == 2) {
WRITE8(port + 1, mach->cursor_col_b, val >> 8);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
mach->cursor_col_0 = mach->cursor_col_b & 0xff;
mach->cursor_col_1 = (mach->cursor_col_b >> 8) & 0xff;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) Cursor Color B, val=0x%02x, len=%d, extended 8514/A mode bpp=%d.\n", port, val, len, dev->accel_bpp);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x1eee:
case 0x1eef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, mach->cursor_vh_offset, val);
if (len == 2) {
WRITE8(port + 1, mach->cursor_vh_offset, val >> 8);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->hwcursor.xoff = mach->cursor_vh_offset & 0x3f;
dev->hwcursor.yoff = (mach->cursor_vh_offset >> 8) & 0x3f;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x22ee:
if (mach->pci_bus) {
mach->pci_cntl_reg = val;
mach_log("PCI Control Reg=%02x.\n", val);
mach32_updatemapping(mach, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x26ee:
case 0x26ef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, mach->accel.crt_pitch, val);
if (len == 2) {
WRITE8(port + 1, mach->accel.crt_pitch, val >> 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->ext_crt_pitch = mach->accel.crt_pitch & 0xff;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (dev->accel_bpp > 8) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (dev->accel_bpp == 24) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->ext_crt_pitch *= 3;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
} else if (dev->accel_bpp == 32)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->ext_crt_pitch <<= 2;
else
dev->ext_crt_pitch <<= 1;
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (len == 2) {
dev->_8514crt = 0;
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
if (!(dev->accel.advfunc_cntl & 0x01) && ATI_MACH32) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->on = 1;
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
dev->vendor_mode = 1;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
}
} else
dev->_8514crt = 1;
mach_set_resolution(mach, svga);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_GRAPHICS_ULTRA || ATI_MACH32)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach32_updatemapping(mach, svga);
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
mach_log("ATI 8514/A: (0x%04x) CRT Pitch, val=0x%02x, crtpitch=%x, len=%d, extended 8514/A mode bpp=%d, enable_on=%d.\n", port, val, dev->ext_crt_pitch, len, dev->accel_bpp, dev->on);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x2aee:
case 0x2aef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (len == 2)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->accel.crt_offset_lo = val;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
else {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
WRITE8(port, mach->accel.crt_offset_lo, val);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) CRT Offset Low val=0x%02x, len=%d.\n", port, val, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x2eee:
case 0x2eef:
mach->accel.crt_offset_hi = val & 0x0f;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) CRT Offset High val=0x%02x, len=%d.\n", port, val, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x32ee:
case 0x32ef:
if (len == 2)
mach->local_cntl = val;
else {
WRITE8(port, mach->local_cntl, val);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_GRAPHICS_ULTRA || ATI_MACH32)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach32_updatemapping(mach, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x36ee:
case 0x36ef:
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (len == 2) {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->misc = val;
} else {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
WRITE8(port, mach->misc, val);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->misc &= 0xfff0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x3aee:
case 0x3aef:
if (len == 2)
mach->cursor_col_0_rg = val;
else {
WRITE8(port, mach->cursor_col_0_rg, val);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->ext_cur_col_0_g = mach->cursor_col_0_rg & 0xff;
mach->ext_cur_col_0_r = (mach->cursor_col_0_rg >> 8) & 0xff;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) Cursor Color 0 RG, val=0x%02x, len=%d, extended 8514/A mode bpp=%d.\n", port, val, len, dev->accel_bpp);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x3eee:
case 0x3eef:
if (len == 2)
mach->cursor_col_1_rg = val;
else {
WRITE8(port, mach->cursor_col_1_rg, val);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->ext_cur_col_1_g = mach->cursor_col_1_rg & 0xff;
mach->ext_cur_col_1_r = (mach->cursor_col_1_rg >> 8) & 0xff;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) Cursor Color 1 RG, val=0x%02x, len=%d, extended 8514/A mode bpp=%d.\n", port, val, len, dev->accel_bpp);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x42ee:
case 0x42ef:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->accel.test2 = val;
else {
WRITE8(port, mach->accel.test2, val);
}
mach_log("ATI 8514/A: (0x%04x) MEM_BNDRY val=%04x, memory part=%06x, gdcreg6=%02x.\n", port, val, (mach->accel.test2 & 0x0f) << 18, svga->gdcreg[6] & 0x0c);
mach32_updatemapping(mach, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x46ee:
case 0x46ef:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->shadow_cntl = val;
else {
WRITE8(port, mach->shadow_cntl, val);
}
mach_log("ATI 8514/A: (0x%04x) val=%02x.\n", port, val);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x4aee:
case 0x4aef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->old_on2 = mach->accel.clock_sel & 0x01;
WRITE8(port, mach->accel.clock_sel, val);
if (len == 2) {
WRITE8(port + 1, mach->accel.clock_sel, val >> 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->on = mach->accel.clock_sel & 0x01;
dev->vendor_mode = 1;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, val=%04x, xor=%d, hdisp=%d, vdisp=%d, accelbpp=%d.\n",
CS, cpu_state.pc, port, mach->accel.clock_sel & 0x01, val, dev->on, dev->hdisp, dev->vdisp, dev->accel_bpp);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Vendor ATI mode set %s resolution.\n",
(dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480");
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_set_resolution(mach, svga);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_GRAPHICS_ULTRA || ATI_MACH32)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach32_updatemapping(mach, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x52ee:
case 0x52ef:
mach_log("ATI 8514/A: (0x%04x) ScratchPad0 val=%04x.\n", port, val);
if (len == 2)
mach->accel.scratch0 = val;
else {
WRITE8(port, mach->accel.scratch0, val);
}
More sonarlint work
2023-06-09 23:46:54 -04:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x56ee:
case 0x56ef:
mach_log("ATI 8514/A: (0x%04x) ScratchPad1 val=%04x.\n", port, val);
if (len == 2)
mach->accel.scratch1 = val;
else {
WRITE8(port, mach->accel.scratch1, val);
}
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x5aee:
case 0x5aef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, mach->shadow_set, val);
if (len == 2) {
WRITE8(port + 1, mach->shadow_set, val >> 8);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) val=0x%02x, len=%d.\n", port, val, len);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if ((mach->shadow_set & 0x03) == 0x00)
mach_log("Primary CRT register set.\n");
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
else if ((mach->shadow_set & 0x03) == 0x01)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("CRT Shadow Set 1: 640x480.\n");
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
else if ((mach->shadow_set & 0x03) == 0x02)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("CRT Shadow Set 2: 1024x768.\n");
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x5eee:
case 0x5eef:
if (len == 2)
mach->memory_aperture = val;
else {
WRITE8(port, mach->memory_aperture, val);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Memory Aperture = %04x.\n", mach->memory_aperture);
if (!mach->pci_bus)
mach->linear_base = (mach->memory_aperture & 0xff00) << 12;
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_GRAPHICS_ULTRA || ATI_MACH32)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach32_updatemapping(mach, svga);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x6aee:
case 0x6aef:
if (len == 2)
mach->accel.max_waitstates = val;
else {
WRITE8(port, mach->accel.max_waitstates, val);
Slight cleanup of the 8514/A compatible chips. Hopefully fix various modes altogether in all three chips (640x480, 800x600, 1024x768 and 1280x1024).
2024-01-26 19:03:43 +01:00
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x6eee:
case 0x6eef:
if (len == 2)
mach->accel.ge_offset_lo = val;
else {
WRITE8(port, mach->accel.ge_offset_lo, val);
ATI Mach8/32 fixes regarding 1992 ATI Ultra drivers for Windows 3.1x: 1. For some reason, background colors were always black under those drivers in 8bpp mode, added a tweak to fix it (as well as Clock colors). 2. Likewise for the red scrolling in pbrush or write, added a tweak to its bitblt read mask. 3. Don't call svga_recalctimings in the hdisp/vdisp ports directly, fixes screen size on said drivers without affecting other stuff.
2023-12-22 19:43:51 +01:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) GE Offset Low val=0x%02x, geoffset=%04x, len=%d.\n", port, val, dev->accel.ge_offset, len);
Further fixes to the code related to the Mach8/32 mode changes. And 0x6e9 is an alias to 0x2e8 per the Mach32 manual (H_TOTAL).
2024-04-26 19:28:03 +02:00
svga_recalctimings(svga);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x72ee:
case 0x72ef:
if (len == 2)
mach->accel.ge_offset_hi = val;
else {
WRITE8(port, mach->accel.ge_offset_hi, val);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) GE Offset High val=0x%02x, geoffset=%04x, len=%d.\n", port, val, dev->accel.ge_offset, len);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
svga_recalctimings(svga);
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x76ee:
case 0x76ef:
if (len == 2)
mach->accel.ge_pitch = val;
else {
WRITE8(port, mach->accel.ge_pitch, val);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
Fix pitch regression of the ATI Mach8/32 side (April 28th, 2025) This patch fixes the pitch that was originally 0 when specifying the 8514/A compatible side in the Mach8/32 cards, which should be 1024 for 8514/A compatible stuff.
2025-04-28 19:28:58 +02:00
dev->ext_pitch = ((mach->accel.ge_pitch & 0xff) << 3);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) GE Pitch val=0x%02x.\n", port, val);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
svga_recalctimings(svga);
break;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x7aee:
case 0x7aef:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
WRITE8(port, mach->accel.ext_ge_config, val);
if (len == 2) {
WRITE8(port + 1, mach->accel.ext_ge_config, val >> 8);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (mach->accel.crt_pitch & 0xff)
dev->ext_crt_pitch = mach->accel.crt_pitch & 0xff;
8514/A compatible changes of the day (March 6th, 2025) 1. Follow the Mach32 manual more closely regarding vblank support. 2. The subsystem status now takes account of the other bits more accurately. 3. The Mach32 PCI, when used with the ATI 68860 ramdac, has its own bpp's when in accelerator mode, separate from the VGA compatible side, so fix this accordingly. 4. Reset the vram when a mapping change occurs, should clear the messups in the ATI Mach8/32 accel video mode tests.
2025-03-06 16:03:11 +01:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
switch (mach->accel.ext_ge_config & 0x30) {
case 0x00:
case 0x10:
dev->bpp = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel_bpp = 8;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x20:
dev->bpp = 1;
dev->ext_crt_pitch <<= 1;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
switch (mach->accel.ext_ge_config & 0xc0) {
case 0x00:
dev->accel_bpp = 15;
break;
case 0x40:
dev->accel_bpp = 16;
break;
default: /*TODO: 655RGB and 664RGB*/
break;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
case 0x30:
dev->bpp = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (mach->accel.ext_ge_config & 0x200) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->ext_crt_pitch <<= 2;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel_bpp = 32;
} else {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->ext_crt_pitch *= 3;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel_bpp = 24;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
default:
break;
}
svga_set_ramdac_type(svga, !!(mach->accel.ext_ge_config & 0x4000));
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ATI 8514/A: (0x%04x) Extended Configuration=%04x, val=%04x.\n", port, mach->accel.ext_ge_config, val);
mach_set_resolution(mach, svga);
mach32_updatemapping(mach, svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else
ati_eeprom_write(&mach->eeprom, !!(mach->accel.ext_ge_config & 0x04), !!(mach->accel.ext_ge_config & 0x02), !!(mach->accel.ext_ge_config & 0x01));
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x7eee:
case 0x7eef:
if (len == 2)
mach->accel.eeprom_control = val;
else {
WRITE8(port, mach->accel.eeprom_control, val);
}
mach_log("%04X write val=%04x, actual=%04x, len=%d.\n", port, mach->accel.eeprom_control, val, len);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x82ee:
mach->accel.patt_data_idx_reg = val & 0x1f;
mach->accel.patt_data_idx = mach->accel.patt_data_idx_reg;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Write Port 82ee: Pattern Data Index=%d, idx for color=%d.\n", val & 0x1f, mach->accel.color_pattern_idx);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (mach->accel.patt_data_idx_reg < 0x10)
mach->accel.color_pattern_idx = mach->accel.patt_idx;
else
mach->accel.color_pattern_idx = 0;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x8eee:
if (len == 2) {
if (mach->accel.patt_data_idx_reg < 0x10) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (dev->bpp) {
mach->accel.color_pattern_hicol[mach->accel.patt_data_idx] = val;
mach_log("Write Port 8eee: Color Pattern Word Data[%d]=%04x.\n", mach->accel.patt_data_idx, val);
mach->accel.patt_data_idx++;
} else {
mach->accel.color_pattern[mach->accel.patt_data_idx] = val & 0xff;
mach->accel.color_pattern[mach->accel.patt_data_idx + 1] = (val >> 8) & 0xff;
mach_log("Write Port 8eee: Color Pattern Word Data[%d]=%04x.\n", mach->accel.patt_data_idx, val);
mach->accel.patt_data_idx += 2;
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else {
mach->accel.mono_pattern_normal[mach->accel.patt_data_idx - 0x10] = val & 0xff;
mach->accel.mono_pattern_normal[(mach->accel.patt_data_idx + 1) - 0x10] = (val >> 8) & 0xff;
mach_log("Write Port 8eee: Mono Pattern Word Data[%d]=%04x.\n", mach->accel.patt_data_idx - 0x10, val);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->accel.patt_data_idx += 2;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x92ee:
mach_log("Write port 92ee, malatch=%08x.\n", svga->ma_latch);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x96ee:
if (len == 2) {
mach->accel.bres_count = val & 0x7ff;
mach_log("BresenhamDraw=%04x.\n", mach->accel.dp_config);
dev->data_available = 0;
dev->data_available2 = 0;
mach->accel.cmd_type = 1;
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
mono_src = (mach->accel.dp_config >> 5) & 3;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel.cmd_back = 1;
if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach))
dev->accel.cmd_back = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, svga, mach, dev);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x9aee:
mach->accel.line_idx = val & 0x07;
break;
case 0xa2ee:
mach_log("Line OPT=%04x.\n", val);
if (len == 2) {
mach->accel.linedraw_opt = val;
mach->accel.bbottom = dev->accel.clip_bottom;
mach->accel.btop = dev->accel.clip_top;
mach->accel.bleft = dev->accel.clip_left;
mach->accel.bright = dev->accel.clip_right;
if (mach->accel.linedraw_opt & 0x100) {
mach->accel.bbottom = 2047;
mach->accel.btop = 0;
mach->accel.bleft = 0;
mach->accel.bright = 2047;
}
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
1st set of changes (video-related) of the day (January 16th, 2025) ATI Mach8-based (add-on only): Do not override the clone VGA banked mapping with the standard VGA when needed. Fixes issues with banked mapping with ATI 8514/A enabled on cards with clone mappings such as Cirrus, Video7, Paradise/WD, etc.
2025-01-16 22:37:52 +01:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xa6ee:
if (len == 2)
mach->accel.dest_x_start = val & 0x7ff;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xaaee:
if (len == 2)
mach->accel.dest_x_end = val & 0x7ff;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xaeee:
if (len == 2) {
mach->accel.dest_y_end = val & 0x7ff;
if ((val + 1) == 0x10000) {
mach_log("Dest_Y_end overflow val=%04x, DPCONFIG=%04x\n", val, mach->accel.dp_config);
mach->accel.dest_y_end = 0;
}
dev->data_available = 0;
dev->data_available2 = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("BitBLT=%04x, pattidx=%d.\n", mach->accel.dp_config, mach->accel.patt_idx);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log(".\n");
mach->accel.cmd_type = 2; /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
mono_src = (mach->accel.dp_config >> 5) & 3;
dev->accel.cmd_back = 1;
if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach))
dev->accel.cmd_back = 0;
mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, svga, mach, dev);
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xb2ee:
if (len == 2)
mach->accel.src_x_start = val & 0x7ff;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xb6ee:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.bkgd_mix = val & 0x1f;
dev->accel.bkgd_sel = (mach->accel.dp_config >> 7) & 3;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xbaee:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->accel.frgd_mix = val & 0x1f;
dev->accel.frgd_sel = (mach->accel.dp_config >> 13) & 3;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xbeee:
if (len == 2)
mach->accel.src_x_end = val & 0x7ff;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xc2ee:
mach->accel.src_y_dir = val & 1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xc6ee:
if (len == 2) {
mach->accel.cmd_type = 0;
mach_log("TODO: Short Stroke.\n");
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
mono_src = (mach->accel.dp_config >> 5) & 3;
dev->accel.cmd_back = 1;
if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach))
dev->accel.cmd_back = 0;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xcaee:
if (len == 2) {
mach->accel.scan_to_x = (val & 0x7ff);
if ((val + 1) == 0x10000) {
mach_log("Scan_to_X overflow val = %04x\n", val);
mach->accel.scan_to_x = 0;
}
dev->data_available = 0;
dev->data_available2 = 0;
mach->accel.cmd_type = 5; /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ScanToX len=%d.\n", val);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log(".\n");
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
mono_src = (mach->accel.dp_config >> 5) & 3;
dev->accel.cmd_back = 1;
if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach))
dev->accel.cmd_back = 0;
mach_log("ScanToX=%04x, mono_src=%d, bkgd_sel=%d, frgd_sel=%d, pixread=%x.\n", mach->accel.dp_config, mono_src, bkgd_sel, frgd_sel, mach_pixel_read(mach));
mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, svga, mach, dev);
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xceee:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Data Path Configuration (%04x) write val=%04x, len=%d.\n", port, val, len);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2) {
dev->data_available = 0;
dev->data_available2 = 0;
mach->accel.dp_config = val;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xd2ee:
mach->accel.patt_len = val & 0x1f;
mach_log("Write Port d2ee: Pattern Length=%d, val=%04x.\n", val & 0x1f, val);
mach->accel.mono_pattern_enable = !!(val & 0x80);
if (len == 2) {
mach->accel.block_write_mono_pattern_enable = !!(val & 0x8000);
mach->accel.patt_len_reg = val;
}
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xd6ee:
mach->accel.patt_idx = val & 0x1f;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
frgd_sel = (mach->accel.dp_config >> 13) & 7;
if ((frgd_sel == 5) && (dev->accel_bpp >= 24) && (mach->accel.patt_len == 0x17))
mach->accel.color_pattern_idx = 0;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Write Port d6ee: Pattern Index=%d.\n", val & 0x1f);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xdaee:
if (len == 2) {
dev->accel.multifunc[2] = val & 0x7ff;
dev->accel.clip_left = dev->accel.multifunc[2];
if (val & 0x800)
dev->accel.clip_left |= ~0x7ff;
}
mach_log("DAEE (extclipl) write val=%d, left=%d.\n", val, dev->accel.clip_left);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xdeee:
if (len == 2) {
dev->accel.multifunc[1] = val & 0x7ff;
dev->accel.clip_top = dev->accel.multifunc[1];
if (val & 0x800) {
dev->accel.clip_top |= ~0x7ff;
}
}
mach_log("DEEE (extclipt) write val = %d\n", val);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xe2ee:
if (len == 2) {
dev->accel.multifunc[4] = val & 0x7ff;
dev->accel.clip_right = dev->accel.multifunc[4];
if (val & 0x800)
dev->accel.clip_right |= ~0x7ff;
}
mach_log("E2EE (extclipr) write val = %d\n", val);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xe6ee:
if (len == 2) {
dev->accel.multifunc[3] = val & 0x7ff;
dev->accel.clip_bottom = dev->accel.multifunc[3];
if (val & 0x800)
dev->accel.clip_bottom |= ~0x7ff;
}
mach_log("E6EE (extclipb) write val = %d\n", val);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xeeee:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("EEEE val=%04x, len=%d.\n", val, len);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
mach->accel.dest_cmp_fn = val;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xf2ee:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("F2EE val=%04x, len=%d.\n", val, len);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
mach->accel.dst_clr_cmp_mask = val;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0xfeee:
if (len == 2) {
mach->accel.line_array[mach->accel.line_idx] = val;
mach_log("mach->accel.line_array[%02X] = %04X\n", mach->accel.line_idx, val);
dev->accel.cur_x = mach->accel.line_array[(mach->accel.line_idx == 4) ? 4 : 0];
dev->accel.cur_y = mach->accel.line_array[(mach->accel.line_idx == 5) ? 5 : 1];
mach->accel.cx_end_line = mach->accel.line_array[2];
mach->accel.cy_end_line = mach->accel.line_array[3];
if ((mach->accel.line_idx == 3) || (mach->accel.line_idx == 5)) {
mach->accel.cmd_type = (mach->accel.line_idx == 5) ? 4 : 3;
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
mono_src = (mach->accel.dp_config >> 5) & 3;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel.cmd_back = 1;
if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach))
dev->accel.cmd_back = 0;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
if ((mach->accel.cmd_type == 3) && !dev->accel.cmd_back && (mach->accel.dp_config == 0x0000)) /*Avoid a hang with a dummy command.*/
dev->accel.cmd_back = 1;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("LineDraw type=%x, dpconfig=%04x.\n", mach->accel.cmd_type, mach->accel.dp_config);
mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, svga, mach, dev);
mach->accel.line_idx = (mach->accel.line_idx == 5) ? 4 : 2;
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->accel.line_idx++;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
default:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Unknown or reserved write to %04x, val=%04x, len=%d, latch=%08x.\n", port, val, len, svga->ma_latch);
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
static uint16_t
mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, int len)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
const uint16_t *vram_w = (uint16_t *) dev->vram;
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
uint16_t temp = 0x0000;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
int cmd;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
int frgd_sel;
int bkgd_sel;
int mono_src;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (port) {
case 0x82e8:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if ((mach->accel.cmd_type == 3) || (mach->accel.cmd_type == 4))
temp = mach->accel.cy_end_line;
else
temp = ibm8514_accel_in_fifo(svga, port, len);
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0x86e8:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if ((mach->accel.cmd_type == 3) || (mach->accel.cmd_type == 4))
temp = mach->accel.cx_end_line;
else
temp = ibm8514_accel_in_fifo(svga, port, len);
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
case 0x92e8:
case 0x96e8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
case 0xc2e8:
case 0xc6e8:
temp = ibm8514_accel_in_fifo(svga, port, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x9ae8:
case 0xdae8:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (dev->fifo_idx <= 8) {
for (int i = 1; i <= dev->fifo_idx; i++)
temp |= (1 << (7 - (i - 1)));
} else
temp = 0x00ff;
if (dev->fifo_idx > 0)
dev->fifo_idx--;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (dev->force_busy) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
temp |= 0x0200; /*Hardware busy*/
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (mach->accel.cmd_type >= 0) {
Another stall fix for the mach8/32. See above, covering the foreground and background select bits as well.
2025-05-04 02:04:41 +02:00
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
Stall fix for the mach8/32 (April 30th, 2025) See above.
2025-04-30 23:15:58 +02:00
mono_src = (mach->accel.dp_config >> 5) & 3;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
switch (mach->accel.cmd_type) {
case 2:
if (dev->accel.sy >= mach->accel.height)
dev->force_busy = 0;
Another stall fix for the mach8/32. See above, covering the foreground and background select bits as well.
2025-05-04 02:04:41 +02:00
else if ((mono_src == 2) || (frgd_sel == 2) || (bkgd_sel == 2))
Stall fix for the mach8/32 (April 30th, 2025) See above.
2025-04-30 23:15:58 +02:00
dev->force_busy = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
break;
case 5:
if (dev->accel.sx >= mach->accel.width)
dev->force_busy = 0;
break;
default:
if (dev->accel.sy < 0)
dev->force_busy = 0;
break;
}
} else {
switch (dev->accel.cmd >> 13) {
case 2:
case 3:
case 4:
case 6:
if (dev->accel.sy < 0)
dev->force_busy = 0;
break;
default:
if (!dev->accel.sy)
dev->force_busy = 0;
break;
}
}
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (dev->data_available) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
temp |= 0x0100; /*Read Data available*/
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.cmd_type >= 0) {
switch (mach->accel.cmd_type) {
case 2:
if (dev->accel.sy >= mach->accel.height)
dev->data_available = 0;
break;
case 5:
if (dev->accel.sx >= mach->accel.width)
dev->data_available = 0;
break;
default:
if (dev->accel.sy < 0)
dev->data_available = 0;
break;
}
} else {
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
switch (dev->accel.cmd >> 13) {
case 2:
case 3:
case 4:
case 6:
if (dev->accel.sy < 0)
dev->data_available = 0;
break;
default:
if (!dev->accel.sy)
dev->data_available = 0;
break;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
}
mach_log("[%04X:%08X]: 9AE8: Temp = %04x, len = %d\n\n", CS, cpu_state.pc, temp, len);
break;
case 0x9ae9:
case 0xdae9:
if (len == 1) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->fifo_idx = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (dev->force_busy2)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
temp |= 0x02; /*Hardware busy*/
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->force_busy2 = 0;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (dev->data_available2) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
temp |= 0x01; /*Read Data available*/
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->accel.cmd_type >= 0) {
switch (mach->accel.cmd_type) {
case 2:
if (dev->accel.sy >= mach->accel.height)
dev->data_available2 = 0;
break;
case 5:
if (dev->accel.sx >= mach->accel.width)
dev->data_available2 = 0;
break;
default:
if (dev->accel.sy < 0)
dev->data_available2 = 0;
break;
}
} else {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
switch (dev->accel.cmd >> 13) {
case 2:
case 3:
case 4:
case 6:
if (dev->accel.sy < 0)
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
dev->data_available2 = 0;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
default:
if (!dev->accel.sy)
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
dev->data_available2 = 0;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
break;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
}
mach_log("[%04X:%08X]: 9AE9: Temp = %04x, len = %d\n\n", CS, cpu_state.pc, temp, len);
break;
case 0xe2e8:
case 0xe6e8:
if (mach->accel.cmd_type >= 0) {
if (mach_pixel_read(mach)) {
cmd = -1;
if (len == 1) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
READ_PIXTRANS_BYTE_IO(dev->accel.dx, 1)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
temp = mach->accel.pix_trans[1];
} else {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if ((mach->accel.cmd_type == 3) || (mach->accel.cmd_type == 4)) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
READ_PIXTRANS_WORD(dev->accel.cx, 0)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
READ_PIXTRANS_WORD(dev->accel.dx, 0)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_out_pixtrans(svga, mach, dev, temp);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
} else {
if (ibm8514_cpu_dest(svga)) {
cmd = (dev->accel.cmd >> 13);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
READ_PIXTRANS_WORD(dev->accel.cx, 0)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (dev->subsys_stat & INT_VSY) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->force_busy = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
dev->data_available = 1;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->accel.input) {
ibm8514_accel_out_pixtrans(svga, port, temp & 0xff, len);
if (dev->accel.odd_in) { /*WORDs on odd destination scan lengths.*/
dev->accel.odd_in = 0;
temp &= ~0xff00;
READ_HIGH(dev->accel.dest + dev->accel.cx, temp);
}
ibm8514_accel_out_pixtrans(svga, port, (temp >> 8) & 0xff, len);
} else
ibm8514_accel_out_pixtrans(svga, port, temp, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
}
break;
case 0xe2e9:
case 0xe6e9:
if (mach->accel.cmd_type >= 0) {
mach_log("%04x pixtrans read, len=%d.\n", port, len);
if (mach_pixel_read(mach)) {
if (len == 1) {
cmd = -1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
READ_PIXTRANS_BYTE_IO(dev->accel.dx, 0)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = mach->accel.pix_trans[0];
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
frgd_sel = (mach->accel.dp_config >> 13) & 7;
bkgd_sel = (mach->accel.dp_config >> 7) & 3;
mono_src = (mach->accel.dp_config >> 5) & 3;
switch (mach->accel.dp_config & 0x200) {
case 0x000: /*8-bit size*/
if (mono_src == 2) {
if ((frgd_sel != 2) && (bkgd_sel != 2)) {
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 8, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x200: /*16-bit size*/
if (mono_src == 2) {
if ((frgd_sel != 2) && (bkgd_sel != 2)) {
if (mach->accel.dp_config & 0x1000)
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[1] | (mach->accel.pix_trans[0] << 8), 0, svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), svga, mach, dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), svga, mach, dev);
More sonarlint work
2023-06-09 23:46:54 -04:00
break;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
}
}
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x82ee:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2)
temp = mach->accel.patt_data_idx;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
More ATI accel fixes and undocumented stuff. 1. Apparently some stuff uses read-only port 0x86ee and expects it to return 0 while port 0xf6ee is an alias to 0x82e8, this should fix hangs in Majong 8514 using ATI's DOS drivers. 2. 8514 data available bits are reset properly when new parameters for a new command are installed (port 0xCEEE), fixes remaining hangs with some stuff.
2023-12-28 02:01:45 +01:00
case 0x86ee:
case 0x86ef:
temp = 0x0000;
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x8eee:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = mach->accel.ext_ge_config;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else
temp = mach->accel.ext_ge_config & 0xff;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach_log("ExtGE Read = %04x, len=%d.\n", temp, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x8eef:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (len == 1)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = mach->accel.ext_ge_config >> 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x92ee:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = mach->accel.eeprom_control;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else
temp = mach->accel.eeprom_control & 0xff;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach_log("EEPROM cntl read=%04x, len=%d.\n", temp, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x92ef:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (len == 1)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = mach->accel.eeprom_control >> 8;
mach_log("EEPROM cntl read+1=%02x, len=%d.\n", temp, len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x96ee:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
temp = mach->accel.test;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else
temp = mach->accel.test & 0xff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x96ef:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (len == 1)
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
temp = mach->accel.test >> 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
case 0x9aee:
if (len == 2) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (dev->fifo_idx <= 16) {
for (int i = 1; i <= dev->fifo_idx; i++)
temp |= (1 << (15 - (i - 1)));
} else
temp = 0xffff;
if (dev->fifo_idx > 0)
dev->fifo_idx--;
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
}
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xa2ee:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = mach->accel.linedraw_opt;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else
temp = mach->accel.linedraw_opt & 0xff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xa2ef:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (len == 1)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = mach->accel.linedraw_opt >> 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xb2ee:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2) {
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
temp = dev->hdisped & 0xff;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp |= (dev->htotal << 8);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else {
temp = dev->hdisped;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
ATI/IBM mode changes in the Mach8/32. Reworked the way the mode changes work in said chips (and way less hacky than before).
2024-04-20 23:43:27 +02:00
mach_log("B2EE read=%02x.\n", temp & 0xff);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xb2ef:
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if (len == 1)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = dev->htotal;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
break;
case 0xb6ee:
temp = dev->hsync_start;
break;
case 0xbaee:
temp = dev->hsync_width;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xc2ee:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
ATI/IBM mode changes in the Mach8/32. Reworked the way the mode changes work in said chips (and way less hacky than before).
2024-04-20 23:43:27 +02:00
temp = dev->v_total_reg;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else
temp = dev->v_total_reg & 0xff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xc2ef:
if (len == 1)
ATI/IBM mode changes in the Mach8/32. Reworked the way the mode changes work in said chips (and way less hacky than before).
2024-04-20 23:43:27 +02:00
temp = dev->v_total_reg >> 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xc6ee:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
temp = dev->v_disp;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else
temp = dev->v_disp & 0xff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xc6ef:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (len == 1)
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
temp = dev->v_disp >> 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xcaee:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
Slight cleanup of the 8514/A compatible chips. Hopefully fix various modes altogether in all three chips (640x480, 800x600, 1024x768 and 1280x1024).
2024-01-26 19:03:43 +01:00
temp = dev->v_sync_start;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else
temp = dev->v_sync_start & 0xff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xcaef:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (len == 1)
Slight cleanup of the 8514/A compatible chips. Hopefully fix various modes altogether in all three chips (640x480, 800x600, 1024x768 and 1280x1024).
2024-01-26 19:03:43 +01:00
temp = dev->v_sync_start >> 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xceee:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_log("CEEE read=%d.\n", len);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (len == 2)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = dev->vc & 0x7ff;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else
temp = dev->vc & 0xff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xceef:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_log("CEEF read=%d.\n", len);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (len == 1)
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
temp = (dev->vc >> 8) & 0x07;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xdaee:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
temp = mach->accel.src_x;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
} else {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32)
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
temp = mach->accel.src_x & 0xff;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
case 0xdaef:
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (len == 1) {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32)
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
temp = mach->accel.src_x >> 8;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xdeee:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32)
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
temp = mach->accel.src_y;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
temp = mach->accel.src_y & 0xff;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
break;
case 0xdeef:
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if (len == 1) {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32)
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
temp = mach->accel.src_y >> 8;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xfaee:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (len == 2) {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
if (mach->pci_bus)
temp = 0x0017;
else
temp = 0x22f7;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
} else {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
if (mach->pci_bus)
temp = 0x17;
else
temp = 0xf7;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0xfaef:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (len == 1) {
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
if (mach->pci_bus)
temp = 0x00;
else
temp = 0x22;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
default:
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
mach_log("[%04X:%08X]: Port FIFO IN=%04x, temp=%04x, len=%d.\n", CS, cpu_state.pc, port, temp, len);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
return temp;
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
static uint8_t
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
{
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
uint8_t temp = 0;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
uint8_t fifo_test_tag[16] = { 0x7c, 0x64, 0x60, 0x5c, 0x58, 0x54, 0x50, 0x68, 0x38, 0x24, 0x10, 0x0c, 0x08, 0x04, 0x00, 0x4c};
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
int16_t clip_t = dev->accel.clip_top;
int16_t clip_l = dev->accel.clip_left;
int16_t clip_b = dev->accel.clip_bottom;
int16_t clip_r = dev->accel.clip_right;
uint16_t clip_b_ibm = dev->accel.clip_bottom;
uint16_t clip_r_ibm = dev->accel.clip_right;
int cmd = dev->accel.cmd >> 13;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
switch (port) {
case 0x2e8:
8514/A compatible changes of the day (March 6th, 2025) 1. Follow the Mach32 manual more closely regarding vblank support. 2. The subsystem status now takes account of the other bits more accurately. 3. The Mach32 PCI, when used with the ATI 68860 ramdac, has its own bpp's when in accelerator mode, separate from the VGA compatible side, so fix this accordingly. 4. Reset the vram when a mapping change occurs, should clear the messups in the ATI Mach8/32 accel video mode tests.
2025-03-06 16:03:11 +01:00
case 0x2e9:
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x6e8:
case 0x22e8:
case 0x26e8:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
case 0x26e9:
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x2ee8:
case 0x2ee9:
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
temp = ibm8514_accel_in(port, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x42e8:
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
case 0x42e9:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (!(port & 1)) {
if ((dev->subsys_cntl & INT_VSY) && !(dev->subsys_stat & INT_VSY) && (dev->vc == dev->dispend))
temp |= INT_VSY;
if (mach->accel.cmd_type == -1) {
if (cmd == 6) {
if ((dev->subsys_cntl & INT_GE_BSY) &&
!(dev->subsys_stat & INT_GE_BSY) &&
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
(dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r_ibm) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b_ibm))
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
temp |= INT_GE_BSY;
} else {
if ((dev->subsys_cntl & INT_GE_BSY) &&
!(dev->subsys_stat & INT_GE_BSY) &&
8514/A compatible changes of the day (March 6th, 2025) 1. Follow the Mach32 manual more closely regarding vblank support. 2. The subsystem status now takes account of the other bits more accurately. 3. The Mach32 PCI, when used with the ATI 68860 ramdac, has its own bpp's when in accelerator mode, separate from the VGA compatible side, so fix this accordingly. 4. Reset the vram when a mapping change occurs, should clear the messups in the ATI Mach8/32 accel video mode tests.
2025-03-06 16:03:11 +01:00
(dev->accel.cx >= clip_l) &&
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
(dev->accel.cx <= clip_r_ibm) &&
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
(dev->accel.cy >= clip_t) &&
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
(dev->accel.cy <= clip_b_ibm))
temp |= INT_GE_BSY;
}
} else {
switch (mach->accel.cmd_type) {
case 1:
case 2:
case 5:
if ((dev->subsys_cntl & INT_GE_BSY) &&
!(dev->subsys_stat & INT_GE_BSY) &&
(dev->accel.dx >= clip_l) &&
(dev->accel.dx <= clip_r) &&
(dev->accel.dy >= clip_t) &&
(dev->accel.dy <= clip_b))
temp |= INT_GE_BSY;
break;
case 3:
case 4:
if ((dev->subsys_cntl & INT_GE_BSY) &&
!(dev->subsys_stat & INT_GE_BSY) &&
(dev->accel.cx >= clip_l) &&
(dev->accel.cx <= clip_r) &&
(dev->accel.cy >= clip_t) &&
(dev->accel.cy <= clip_b))
temp |= INT_GE_BSY;
break;
default:
break;
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
if (!dev->fifo_idx && !dev->on) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->force_busy = 0;
dev->force_busy2 = 0;
mach->force_busy = 0;
dev->data_available = 0;
dev->data_available2 = 0;
temp |= INT_FIFO_EMP;
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
mach_log("Fifo Empty.\n");
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
}
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if (mach->accel.ext_ge_config & 0x08)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp |= ((mach->accel.ext_ge_config & 0x07) << 4);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
else
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp |= 0x20;
Some more changes to the Mach8/32/8514/A side (April 29th, 2025) 1. Do not stall the guest when the passthrough mode is on, fixes hang ups in Windows 3.1 using the 2.3 drivers. 2. In the pitch register, make sure the passthrough goes on when needed only on the ATI Mach32, not 8, fixes mode on/off in text mode when needed. 3. Cosmetic changes and logs.
2025-04-29 00:57:03 +02:00
mach_log("0x%04x read: Subsystem Status=%02x, monitoralias=%02x.\n", port, temp, mach->accel.ext_ge_config & 0x07);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
/*ATI Mach8/32 specific registers*/
case 0x12ee:
case 0x12ef:
READ8(port, mach->config1);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x16ee:
case 0x16ef:
READ8(port, mach->config2);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
case 0x1aee:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (dev->fifo_idx > 0)
dev->fifo_idx--;
if (mach->fifo_test_idx > 0)
mach->fifo_test_idx--;
fallthrough;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
case 0x1aef:
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("FIFO Test IDX=%d, Data=%04x.\n", mach->fifo_test_idx, mach->fifo_test_data[mach->fifo_test_idx]);
READ8(port, mach->fifo_test_data[mach->fifo_test_idx]);
if (!mach->fifo_test_idx && ((mach->accel.dp_config == 0xaaaa) || (mach->accel.dp_config == 0x5555)))
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
mach->accel.dp_config = 0x2011;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x22ee:
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if (mach->pci_bus)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = mach->pci_cntl_reg;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x32ee:
case 0x32ef:
READ8(port, mach->local_cntl);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x36ee:
case 0x36ef:
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
READ8(port, mach->misc);
if (!(port & 1)) {
temp &= ~0x0c;
switch (dev->vram_amount) {
case 1024:
temp |= 0x04;
break;
case 2048:
temp |= 0x08;
break;
case 4096:
temp |= 0x0c;
break;
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
default:
break;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0x3aee:
case 0x3aef:
if (port & 1)
temp = 0x01;
else
temp = fifo_test_tag[dev->fifo_idx];
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x42ee:
case 0x42ef:
More ATI accel fixes and undocumented stuff. 1. Apparently some stuff uses read-only port 0x86ee and expects it to return 0 while port 0xf6ee is an alias to 0x82e8, this should fix hangs in Majong 8514 using ATI's DOS drivers. 2. 8514 data available bits are reset properly when new parameters for a new command are installed (port 0xCEEE), fixes remaining hangs with some stuff.
2023-12-28 02:01:45 +01:00
READ8(port, mach->accel.test2);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x46ee:
case 0x46ef:
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
READ8(port, mach->shadow_cntl);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x4aee:
case 0x4aef:
READ8(port, mach->accel.clock_sel);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x52ee:
case 0x52ef:
READ8(port, mach->accel.scratch0);
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
if (mach->mca_bus) {
if (svga->ext8514 != NULL) {
temp = (((dev->bios_rom.mapping.base >> 7) - 0x1000) >> 4);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
if (port & 1)
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
temp |= 0x01;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else {
if (mach->accel.scratch0 == 0x1234)
temp = 0x0000;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
} else {
Major changes on the 8514/A side again (March 30th, 2025) 1. The DX/DY coordinates for BitBLT are now signed again, fixes 8514/A cursor issues. 2. Made the busy/data available processor statuses more like the ATI one for more stability and no stalls, fixes Windows 3.x and IBM OS/2 1.x (possibly later ones too) that use the built-in 8514/A driver. 3. Made the mode switching clearer (through a note) regarding the shadow sets, this should make every program happy, I hope. 4. In the Mach32 series only, a first load of the CRT sets also initializes the GE offsets if the corresponding bit is set, fixes Mach8/32 mode tests in their eeprom and demoai with hdiload from ATI/IBM.
2025-03-30 22:06:16 +02:00
mach_log("ScratchPad0=%x.\n", mach->accel.scratch0);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (mach->accel.scratch0 == 0x1234)
temp = 0x0000;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x56ee:
case 0x56ef:
READ8(port, mach->accel.scratch1);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("ScratchPad1=%x.\n", mach->accel.scratch1);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x5eee:
case 0x5eef:
if (mach->pci_bus)
mach->memory_aperture = (mach->memory_aperture & ~0xfff0) | ((mach->linear_base >> 20) << 4);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
READ8(port, mach->memory_aperture);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x62ee:
temp = mach->accel.clip_overrun;
mach_log("ClipOverrun = %02x.\n", temp);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x62ef:
if (mach->force_busy)
temp |= 0x20;
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach->force_busy = 0;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (ati_eeprom_read(&mach->eeprom))
temp |= 0x40;
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach_log("Mach busy temp=%02x.\n", temp);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x6aee:
case 0x6aef:
READ8(port, mach->accel.max_waitstates);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x72ee:
case 0x72ef:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
READ8(port, (mach->accel.bleft));
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x76ee:
case 0x76ef:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
READ8(port, (mach->accel.btop));
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x7aee:
case 0x7aef:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
READ8(port, (mach->accel.bright));
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
case 0x7eee:
case 0x7eef:
Huge fixes to 8514/A compatibles: 1. Properly implemented polygon filling in the BitBLT side of the ATI 8514/A compatibles (Mach8/32), this allows games like Mj8514 and demos like HDIDEMO from IBM to run under ATI's hdiload 1.1 properly. 2. Finally figured out the polygon filling command in the IBM one about read and write masks (Command 5 and Command 2 with polygon filling bits on, currently only for the read mask one), this allows the above samples to render properly with IBM's original hdiload 1.0 from 1987.
2024-01-05 21:22:01 +01:00
READ8(port, (mach->accel.bbottom));
More sonarlint work
2023-06-09 23:46:54 -04:00
break;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("[%04X:%08X]: Port NORMAL IN=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return temp;
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
static void
ati8514_accel_outb(uint16_t port, uint8_t val, void *priv)
{
svga_t *svga = (svga_t *)priv;
mach_t *mach = (mach_t *)svga->ext8514;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
if (port & 0x8000) { /*Command FIFO*/
if (dev->accel.cmd_back) {
mach->fifo_test_data[dev->fifo_idx] = val;
dev->fifo_idx++;
if (dev->fifo_idx > 16)
dev->fifo_idx = 16;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->fifo_test_idx = dev->fifo_idx;
}
}
dev->accel_out_fifo(svga, port, val, 1);
mach_log("%04X:%08X: OUTB port=%04x, val=%02x, fifo idx=%d.\n", CS, cpu_state.pc, port, val, dev->fifo_idx);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
static void
ati8514_accel_outw(uint16_t port, uint16_t val, void *priv)
{
svga_t *svga = (svga_t *)priv;
mach_t *mach = (mach_t *)svga->ext8514;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (port == 0xf6ee)
port = 0x82e8;
if (port & 0x8000) { /*Command FIFO*/
if (dev->accel.cmd_back) {
mach->fifo_test_data[dev->fifo_idx] = val;
dev->fifo_idx++;
if (dev->fifo_idx > 16)
dev->fifo_idx = 16;
mach->fifo_test_idx = dev->fifo_idx;
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel_out_fifo(svga, port, val, 2);
mach_log("%04X:%08X: OUTW port=%04x, val=%04x, fifo idx=%d.\n", CS, cpu_state.pc, port, val, dev->fifo_idx);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
static void
ati8514_accel_outl(uint16_t port, uint32_t val, void *priv)
{
svga_t *svga = (svga_t *)priv;
mach_t *mach = (mach_t *)svga->ext8514;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (port == 0xf6ee)
port = 0x82e8;
if (port & 0x8000) { /*Command FIFO*/
if (dev->accel.cmd_back) {
mach->fifo_test_data[dev->fifo_idx] = val;
dev->fifo_idx++;
if (dev->fifo_idx > 16)
dev->fifo_idx = 16;
mach->fifo_test_idx = dev->fifo_idx;
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel_out_fifo(svga, port, val, 2);
mach_log("OUTL port=%04x, val=%08x, fifo idx=%d.\n", port, val, dev->fifo_idx);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_accel_outb(uint16_t port, uint8_t val, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_t *mach = (mach_t *) priv;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
svga_t *svga = &mach->svga;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (port & 0x8000) { /*Command FIFO*/
if (dev->accel.cmd_back) {
mach->fifo_test_data[dev->fifo_idx] = val;
dev->fifo_idx++;
if (dev->fifo_idx > 16)
dev->fifo_idx = 16;
mach->fifo_test_idx = dev->fifo_idx;
}
}
dev->accel_out_fifo(mach, port, val, 1);
mach_log("%04X:%08X: OUTB port=%04x, val=%02x, fifo idx=%d.\n", CS, cpu_state.pc, port, val, dev->fifo_idx);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_accel_outw(uint16_t port, uint16_t val, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_t *mach = (mach_t *) priv;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
svga_t *svga = &mach->svga;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (port == 0xf6ee)
port = 0x82e8;
if (port & 0x8000) { /*Command FIFO*/
if (dev->accel.cmd_back) {
mach->fifo_test_data[dev->fifo_idx] = val;
dev->fifo_idx++;
if (dev->fifo_idx > 16)
dev->fifo_idx = 16;
mach->fifo_test_idx = dev->fifo_idx;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel_out_fifo(mach, port, val, 2);
mach_log("%04X:%08X: OUTW port=%04x, val=%04x, fifo idx=%d.\n", CS, cpu_state.pc, port, val, dev->fifo_idx);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
static void
mach_accel_outl(uint16_t port, uint32_t val, void *priv)
{
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (port == 0xf6ee)
port = 0x82e8;
if (port & 0x8000) { /*Command FIFO*/
if (dev->accel.cmd_back) {
mach->fifo_test_data[dev->fifo_idx] = val;
dev->fifo_idx++;
if (dev->fifo_idx > 16)
dev->fifo_idx = 16;
mach->fifo_test_idx = dev->fifo_idx;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel_out_fifo(mach, port, val, 2);
mach_log("OUTL port=%04x, val=%08x, fifo idx=%d.\n", port, val, dev->fifo_idx);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
static uint8_t
ati8514_accel_in(uint16_t port, svga_t *svga)
{
return mach_accel_in_call(port, (mach_t *) svga->ext8514, svga, (ibm8514_t *) svga->dev8514);
}
static uint8_t
ati8514_accel_inb(uint16_t port, void *priv)
{
svga_t *svga = (svga_t *)priv;
mach_t *mach = (mach_t *)svga->ext8514;
uint8_t temp;
if (port & 0x8000)
temp = mach_accel_in_fifo(mach, svga, (ibm8514_t *) svga->dev8514, port, 1);
else
temp = ati8514_accel_in(port, svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("%04X:%08X: INB port=%04x, temp=%02x.\n", CS, cpu_state.pc, port, temp);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
return temp;
}
static uint16_t
ati8514_accel_inw(uint16_t port, void *priv)
{
svga_t *svga = (svga_t *)priv;
mach_t *mach = (mach_t *)svga->ext8514;
uint16_t temp;
if (port & 0x8000)
temp = mach_accel_in_fifo(mach, svga, (ibm8514_t *) svga->dev8514, port, 2);
else {
temp = ati8514_accel_in(port, svga);
temp |= (ati8514_accel_in(port + 1, svga) << 8);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("%04X:%08X: INW port=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
return temp;
}
static uint32_t
ati8514_accel_inl(uint16_t port, void *priv)
{
svga_t *svga = (svga_t *)priv;
mach_t *mach = (mach_t *)svga->ext8514;
uint32_t temp;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (port & 0x8000)
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
temp = mach_accel_in_fifo(mach, svga, (ibm8514_t *) svga->dev8514, port, 2);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else {
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
temp = ati8514_accel_in(port, svga);
temp |= (ati8514_accel_in(port + 1, svga) << 8);
}
return temp;
}
static uint8_t
mach_accel_in(uint16_t port, mach_t *mach)
{
svga_t *svga = &mach->svga;
return mach_accel_in_call(port, mach, svga, (ibm8514_t *) svga->dev8514);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static uint8_t
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_accel_inb(uint16_t port, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_t *mach = (mach_t *) priv;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
svga_t *svga = &mach->svga;
uint8_t temp;
if (port & 0x8000)
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
temp = mach_accel_in_fifo(mach, svga, (ibm8514_t *) svga->dev8514, port, 1);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else
temp = mach_accel_in(port, mach);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("%04X:%08X: INB port=%04x, temp=%02x.\n", CS, cpu_state.pc, port, temp);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
return temp;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
static uint16_t
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_accel_inw(uint16_t port, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_t *mach = (mach_t *) priv;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
svga_t *svga = &mach->svga;
uint16_t temp;
if (port & 0x8000)
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
temp = mach_accel_in_fifo(mach, svga, (ibm8514_t *) svga->dev8514, port, 2);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else {
temp = mach_accel_in(port, mach);
temp |= (mach_accel_in(port + 1, mach) << 8);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("%04X:%08X: INW port=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
return temp;
}
static uint32_t
mach_accel_inl(uint16_t port, void *priv)
{
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
uint32_t temp;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (port & 0x8000)
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
temp = mach_accel_in_fifo(mach, svga, (ibm8514_t *) svga->dev8514, port, 2);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
else {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
temp = mach_accel_in(port, mach);
temp |= (mach_accel_in(port + 1, mach) << 8);
}
return temp;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
static __inline void
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t *svga)
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
int writemask2 = svga->writemask;
int reset_wm = 0;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
latch8514_t vall;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
uint8_t wm = svga->writemask;
uint8_t i;
cycles -= svga->monitor->mon_video_timing_write_b;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
if (linear) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
switch (addr & 0x06) {
case 0x00:
case 0x06:
dev->vram[addr] = val & 0x0f;
dev->vram[addr + 1] = (val >> 4) & 0x0f;
break;
case 0x02:
dev->vram[addr + 2] = val & 0x0f;
dev->vram[addr + 3] = (val >> 4) & 0x0f;
break;
case 0x04:
dev->vram[addr - 2] = val & 0x0f;
dev->vram[addr - 1] = (val >> 4) & 0x0f;
break;
default:
break;
}
} else
dev->vram[addr] = val;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
return;
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
if (!(svga->gdcreg[6] & 1))
svga->fullchange = 2;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (svga->chain4) {
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
writemask2 = 1 << (addr & 3);
addr &= ~3;
} else if (svga->chain2_write) {
writemask2 &= ~0xa;
if (addr & 1)
writemask2 <<= 1;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
addr &= ~1;
addr &= dev->vram_mask;
} else {
writemask2 = 1 << (addr & 3);
addr &= ~3;
addr &= dev->vram_mask;
}
addr &= svga->decode_mask;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (addr >= dev->vram_size) {
mach_log("WriteOver! %x.\n", addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
switch (svga->writemode) {
case 0:
val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7))));
if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
for (i = 0; i < 4; i++) {
if (writemask2 & (1 << i))
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
dev->vram[addr | i] = val;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
return;
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
for (i = 0; i < 4; i++) {
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (svga->gdcreg[1] & (1 << i))
vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff;
else
vall.b[i] = val;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
break;
case 1:
for (i = 0; i < 4; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = dev->latch.b[i];
}
return;
case 2:
for (i = 0; i < 4; i++)
vall.b[i] = !!(val & (1 << i)) * 0xff;
if (!(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
for (i = 0; i < 4; i++) {
if (writemask2 & (1 << i))
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (dev->latch.b[i] & ~svga->gdcreg[8]);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
}
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
return;
}
break;
case 3:
val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7))));
wm = svga->gdcreg[8];
svga->gdcreg[8] &= val;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
for (i = 0; i < 4; i++)
vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff;
reset_wm = 1;
break;
default:
break;
}
switch (svga->gdcreg[3] & 0x18) {
case 0x00: /* Set */
for (i = 0; i < 4; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (dev->latch.b[i] & ~svga->gdcreg[8]);
}
break;
case 0x08: /* AND */
for (i = 0; i < 4; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & dev->latch.b[i];
}
break;
case 0x10: /* OR */
for (i = 0; i < 4; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | dev->latch.b[i];
}
break;
case 0x18: /* XOR */
for (i = 0; i < 4; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ dev->latch.b[i];
}
break;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
default:
break;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (reset_wm)
svga->gdcreg[8] = wm;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
static void
mach32_write(uint32_t addr, uint8_t val, void *priv)
{
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
mach_t *mach = (mach_t *) priv;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
xga_write_test(addr, val, svga);
addr = (addr & svga->banked_mask) + svga->write_bank;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (mach->accel.test2 & 0x10) {
if (addr < ((mach->accel.test2 & 0x0f) << 18))
return;
}
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
addr <<= 1;
switch (addr & 0x06) {
case 0x00:
case 0x06:
mach32_write_common(addr, val & 0x0f, 0, mach, svga);
mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga);
break;
case 0x02:
mach32_write_common(addr + 2, val & 0x0f, 0, mach, svga);
mach32_write_common(addr + 3, (val >> 4) & 0x0f, 0, mach, svga);
break;
case 0x04:
mach32_write_common(addr - 2, val & 0x0f, 0, mach, svga);
mach32_write_common(addr - 1, (val >> 4) & 0x0f, 0, mach, svga);
break;
default:
break;
}
} else
mach32_write_common(addr, val, 0, mach, svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Writeb banked=%08x.\n", addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
static void
mach32_writew(uint32_t addr, uint16_t val, void *priv)
{
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
mach_t *mach = (mach_t *) priv;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
xga_write_test(addr, val, svga);
addr = (addr & svga->banked_mask) + svga->write_bank;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (mach->accel.test2 & 0x10) {
if (addr < ((mach->accel.test2 & 0x0f) << 18))
return;
}
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
addr <<= 1;
if (addr & 0x04) {
mach32_write_common(addr - 2, val & 0x0f, 0, mach, svga);
mach32_write_common(addr - 1, (val >> 4) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 2, (val >> 8) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 3, (val >> 12) & 0x0f, 0, mach, svga);
} else {
mach32_write_common(addr, val & 0x0f, 0, mach, svga);
mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 4, (val >> 8) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 5, (val >> 12) & 0x0f, 0, mach, svga);
}
} else {
mach32_write_common(addr, val & 0xff, 0, mach, svga);
mach32_write_common(addr + 1, val >> 8, 0, mach, svga);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Writew banked=%08x.\n", addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
static void
mach32_writel(uint32_t addr, uint32_t val, void *priv)
{
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
mach_t *mach = (mach_t *) priv;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
xga_write_test(addr, val, svga);
addr = (addr & svga->banked_mask) + svga->write_bank;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (mach->accel.test2 & 0x10) {
if (addr < ((mach->accel.test2 & 0x0f) << 18))
return;
}
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
addr <<= 1;
mach32_write_common(addr, val & 0x0f, 0, mach, svga);
mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 4, (val >> 8) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 5, (val >> 12) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 2, (val >> 16) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 3, (val >> 20) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 6, (val >> 24) & 0x0f, 0, mach, svga);
mach32_write_common(addr + 7, (val >> 28) & 0x0f, 0, mach, svga);
} else {
mach32_write_common(addr, val & 0xff, 0, mach, svga);
mach32_write_common(addr + 1, val >> 8, 0, mach, svga);
mach32_write_common(addr + 2, val >> 16, 0, mach, svga);
mach32_write_common(addr + 3, val >> 24, 0, mach, svga);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Writel banked=%08x.\n", addr);
}
static __inline void
mach32_svga_write(uint32_t addr, uint8_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
mach_t *mach = (mach_t *) svga->priv;
int writemask2 = svga->writemask;
int reset_wm = 0;
latch_t vall;
uint8_t wm = svga->writemask;
uint8_t count;
uint8_t i;
cycles -= svga->monitor->mon_video_timing_write_b;
xga_write_test(addr, val, svga);
addr = svga_decode_addr(svga, addr, 1);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (addr == 0xffffffff) {
mach_log("WriteCommon Over.\n");
return;
}
if (mach->accel.test2 & 0x10) {
if (addr >= ((mach->accel.test2 & 0x0f) << 18))
return;
}
if (!(svga->gdcreg[6] & 1))
svga->fullchange = 2;
if (((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only) && (svga->writemode < 4)) {
writemask2 = 1 << (addr & 3);
addr &= ~3;
} else if (svga->chain4 && (svga->writemode < 4)) {
writemask2 = 1 << (addr & 3);
addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff);
} else if (svga->chain2_write) {
writemask2 &= ~0xa;
if (addr & 1)
writemask2 <<= 1;
addr &= ~1;
addr <<= 2;
} else
addr <<= 2;
addr &= svga->decode_mask;
if (addr >= svga->vram_max) {
mach_log("WriteBankedOver=%08x, val=%02x.\n", addr & svga->vram_mask, val);
return;
}
addr &= svga->vram_mask;
svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
count = 4;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
switch (svga->writemode) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
case 0:
val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7))));
if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) {
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = val;
}
return;
} else {
for (i = 0; i < count; i++) {
if (svga->gdcreg[1] & (1 << i))
vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff;
else
vall.b[i] = val;
}
}
break;
case 1:
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = svga->latch.b[i];
}
return;
case 2:
for (i = 0; i < count; i++)
vall.b[i] = !!(val & (1 << i)) * 0xff;
if (!(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) {
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
}
return;
}
break;
case 3:
val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7))));
wm = svga->gdcreg[8];
svga->gdcreg[8] &= val;
for (i = 0; i < count; i++)
vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff;
reset_wm = 1;
break;
default:
return;
}
switch (svga->gdcreg[3] & 0x18) {
case 0x00: /* Set */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
}
break;
case 0x08: /* AND */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i];
}
break;
case 0x10: /* OR */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i];
}
break;
case 0x18: /* XOR */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i];
}
break;
default:
break;
}
if (reset_wm)
svga->gdcreg[8] = wm;
}
static __inline void
mach32_svga_writew(uint32_t addr, uint16_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
mach_t *mach = (mach_t *) svga->priv;
if (!svga->fast) {
mach32_svga_write(addr, val, priv);
mach32_svga_write(addr + 1, val >> 8, priv);
return;
}
cycles -= svga->monitor->mon_video_timing_write_w;
xga_write_test(addr, val & 0xff, svga);
xga_write_test(addr + 1, val >> 8, svga);
addr = svga_decode_addr(svga, addr, 1);
if (addr == 0xffffffff)
return;
if (mach->accel.test2 & 0x10) {
if (addr >= ((mach->accel.test2 & 0x0f) << 18))
return;
}
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr &= svga->vram_mask;
svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
*(uint16_t *) &svga->vram[addr] = val;
}
static __inline void
mach32_svga_writel(uint32_t addr, uint32_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
mach_t *mach = (mach_t *) svga->priv;
if (!svga->fast) {
mach32_svga_write(addr, val, priv);
mach32_svga_write(addr + 1, val >> 8, priv);
mach32_svga_write(addr + 2, val >> 16, priv);
mach32_svga_write(addr + 3, val >> 24, priv);
return;
}
cycles -= svga->monitor->mon_video_timing_write_l;
xga_write_test(addr, val & 0xff, svga);
xga_write_test(addr + 1, (val >> 8) & 0xff, svga);
xga_write_test(addr + 2, (val >> 16) & 0xff, svga);
xga_write_test(addr + 3, (val >> 24) & 0xff, svga);
addr = svga_decode_addr(svga, addr, 1);
if (addr == 0xffffffff)
return;
if (mach->accel.test2 & 0x10) {
if (addr >= ((mach->accel.test2 & 0x0f) << 18))
return;
}
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr &= svga->vram_mask;
svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
*(uint32_t *) &svga->vram[addr] = val;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
static __inline void
mach32_writew_linear(uint32_t addr, uint16_t val, mach_t *mach)
{
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
cycles -= svga->monitor->mon_video_timing_write_w;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (addr & 0x04) {
dev->vram[addr - 2] = val & 0x0f;
dev->vram[addr - 1] = (val >> 4) & 0x0f;
dev->vram[addr + 2] = (val >> 8) & 0x0f;
dev->vram[addr + 3] = (val >> 12) & 0x0f;
} else {
dev->vram[addr] = val & 0x0f;
dev->vram[addr + 1] = (val >> 4) & 0x0f;
dev->vram[addr + 4] = (val >> 8) & 0x0f;
dev->vram[addr + 5] = (val >> 12) & 0x0f;
}
} else
*(uint16_t *) &dev->vram[addr] = val;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
}
static __inline void
mach32_writel_linear(uint32_t addr, uint32_t val, mach_t *mach)
{
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
cycles -= svga->monitor->mon_video_timing_write_l;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
dev->vram[addr] = val & 0x0f;
dev->vram[addr + 1] = (val >> 4) & 0x0f;
dev->vram[addr + 4] = (val >> 8) & 0x0f;
dev->vram[addr + 5] = (val >> 12) & 0x0f;
dev->vram[addr + 2] = (val >> 16) & 0x0f;
dev->vram[addr + 3] = (val >> 20) & 0x0f;
dev->vram[addr + 6] = (val >> 24) & 0x0f;
dev->vram[addr + 7] = (val >> 28) & 0x0f;
} else
*(uint32_t *) &dev->vram[addr] = val;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
}
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
static __inline uint8_t
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga)
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
{
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Fix more compile warnings
2023-08-14 18:59:02 -04:00
uint32_t latch_addr = 0;
int readplane = svga->readplane;
uint8_t count;
uint8_t temp;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
uint8_t ret = 0x00;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
cycles -= svga->monitor->mon_video_timing_read_b;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
if (linear) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
addr &= dev->vram_mask;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
switch ((addr & 0x06) >> 1) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
case 0x00:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
case 0x03:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ret = dev->vram[addr] & 0x0f;
ret |= (dev->vram[addr + 1] << 4);
break;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
case 0x01:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ret = dev->vram[addr + 2] & 0x0f;
ret |= (dev->vram[addr + 3] << 4);
break;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
case 0x02:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ret = dev->vram[addr - 2] & 0x0f;
ret |= (dev->vram[addr - 1] << 4);
break;
default:
break;
}
} else
ret = dev->vram[addr];
return ret;
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
count = 2;
latch_addr = (addr << count) & svga->decode_mask;
count = (1 << count);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (svga->chain4) {
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
addr &= svga->decode_mask;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (addr >= dev->vram_size) {
mach_log("ReadOver! (chain4) %x.\n", addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return 0xff;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
latch_addr = (addr & dev->vram_mask) & ~3;
for (uint8_t i = 0; i < count; i++)
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
dev->latch.b[i] = dev->vram[latch_addr | i];
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return dev->vram[addr & dev->vram_mask];
} else if (svga->chain2_read) {
readplane = (readplane & 2) | (addr & 1);
addr &= ~1;
addr &= dev->vram_mask;
} else {
addr &= svga->decode_mask;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (addr >= dev->vram_size) {
mach_log("ReadOver! (normal) %x.\n", addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return 0xff;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
latch_addr = (addr & dev->vram_mask) & ~3;
for (uint8_t i = 0; i < count; i++)
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
dev->latch.b[i] = dev->vram[latch_addr | i];
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_log("Read (normal) addr=%06x, ret=%02x.\n", addr, dev->vram[addr & dev->vram_mask]);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return dev->vram[addr & dev->vram_mask];
}
addr &= svga->decode_mask;
/* standard VGA latched access */
if (latch_addr >= dev->vram_size) {
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
mach_log("Over VRAM Latch addr=%x.\n", latch_addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
for (uint8_t i = 0; i < count; i++)
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
dev->latch.b[i] = 0xff;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
} else {
latch_addr &= dev->vram_mask;
for (uint8_t i = 0; i < count; i++)
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
dev->latch.b[i] = dev->vram[latch_addr | i];
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (addr >= dev->vram_size) {
mach_log("ReadOver! (chain2) %x.\n", addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return 0xff;
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
addr &= dev->vram_mask;
if (svga->readmode) {
temp = 0xff;
for (uint8_t pixel = 0; pixel < 8; pixel++) {
for (uint8_t plane = 0; plane < count; plane++) {
if (svga->colournocare & (1 << plane)) {
/* If we care about a plane, and the pixel has a mismatch on it, clear its bit. */
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
if (((dev->latch.b[plane] >> pixel) & 1) != ((svga->colourcompare >> plane) & 1))
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
temp &= ~(1 << pixel);
}
}
}
ret = temp;
} else
ret = dev->vram[addr | readplane];
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_log("ReadMode=%02x, addr=%06x, ret=%02x.\n", svga->readmode, addr, ret);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return ret;
}
static uint8_t
mach32_read(uint32_t addr, void *priv)
{
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
mach_t *mach = (mach_t *) priv;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Fix warnings and build.
2025-04-22 21:24:31 +02:00
uint8_t ret = 0x00;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
(void) xga_read_test(addr, svga);
addr = (addr & svga->banked_mask) + svga->read_bank;
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
addr <<= 1;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
switch ((addr & 0x06) >> 1) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
case 0x00:
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
case 0x03:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ret = mach32_read_common(addr, 0, mach, svga) & 0x0f;
ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4);
break;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
case 0x01:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ret = mach32_read_common(addr + 2, 0, mach, svga) & 0x0f;
ret |= (mach32_read_common(addr + 3, 0, mach, svga) << 4);
break;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
case 0x02:
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
ret = mach32_read_common(addr - 2, 0, mach, svga) & 0x0f;
ret |= (mach32_read_common(addr - 1, 0, mach, svga) << 4);
break;
default:
break;
}
} else
ret = mach32_read_common(addr, 0, mach, svga);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Readb banked=%08x.\n", addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return ret;
}
static uint16_t
mach32_readw(uint32_t addr, void *priv)
{
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
mach_t *mach = (mach_t *) priv;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint16_t ret;
(void) xga_read_test(addr, svga);
addr = (addr & svga->banked_mask) + svga->read_bank;
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
addr <<= 1;
if (addr & 0x04) {
ret = mach32_read_common(addr - 2, 0, mach, svga) & 0x0f;
ret |= (mach32_read_common(addr - 1, 0, mach, svga) << 4);
ret |= (mach32_read_common(addr + 2, 0, mach, svga) << 8);
ret |= (mach32_read_common(addr + 3, 0, mach, svga) << 12);
} else {
ret = mach32_read_common(addr, 0, mach, svga) & 0x0f;
ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4);
ret |= (mach32_read_common(addr + 4, 0, mach, svga) << 8);
ret |= (mach32_read_common(addr + 5, 0, mach, svga) << 12);
}
} else {
ret = mach32_read_common(addr, 0, mach, svga);
ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 8);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Readw banked=%08x.\n", addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return ret;
}
static uint32_t
mach32_readl(uint32_t addr, void *priv)
{
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
mach_t *mach = (mach_t *) priv;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint32_t ret;
(void) xga_read_test(addr, svga);
addr = (addr & svga->banked_mask) + svga->read_bank;
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
addr <<= 1;
ret = mach32_read_common(addr, 0, mach, svga) & 0x0f;
ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4);
ret |= (mach32_read_common(addr + 4, 0, mach, svga) << 8);
ret |= (mach32_read_common(addr + 5, 0, mach, svga) << 12);
ret |= (mach32_read_common(addr + 2, 0, mach, svga) << 16);
ret |= (mach32_read_common(addr + 3, 0, mach, svga) << 20);
ret |= (mach32_read_common(addr + 6, 0, mach, svga) << 24);
ret |= (mach32_read_common(addr + 7, 0, mach, svga) << 28);
} else {
ret = mach32_read_common(addr, 0, mach, svga);
ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 8);
ret |= (mach32_read_common(addr + 2, 0, mach, svga) << 16);
ret |= (mach32_read_common(addr + 3, 0, mach, svga) << 24);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Readl banked=%08x.\n", addr);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
return ret;
}
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
static __inline uint16_t
mach32_readw_linear(uint32_t addr, mach_t *mach)
{
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
uint16_t ret;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
cycles -= svga->monitor->mon_video_timing_read_w;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
addr &= dev->vram_mask;
if (addr & 0x04) {
ret = dev->vram[addr - 2] & 0x0f;
ret |= (dev->vram[addr - 1] << 4);
ret |= (dev->vram[addr + 2] << 8);
ret |= (dev->vram[addr + 3] << 12);
} else {
ret = dev->vram[addr] & 0x0f;
ret |= (dev->vram[addr + 1] << 4);
ret |= (dev->vram[addr + 4] << 8);
ret |= (dev->vram[addr + 5] << 12);
}
} else
ret = *(uint16_t *) &dev->vram[addr & dev->vram_mask];
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
return ret;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
}
static __inline uint32_t
mach32_readl_linear(uint32_t addr, mach_t *mach)
{
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
uint32_t ret;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
cycles -= svga->monitor->mon_video_timing_read_l;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
addr &= dev->vram_mask;
ret = dev->vram[addr] & 0x0f;
ret |= (dev->vram[addr + 1] << 4);
ret |= (dev->vram[addr + 4] << 8);
ret |= (dev->vram[addr + 5] << 12);
ret |= (dev->vram[addr + 2] << 16);
ret |= (dev->vram[addr + 3] << 20);
ret |= (dev->vram[addr + 6] << 24);
ret |= (dev->vram[addr + 7] << 28);
} else
ret = *(uint32_t *) &dev->vram[addr & dev->vram_mask];
return ret;
ATI Mach32/64 changes for the better: 1. On both Mach'es: direct linear video memory access is now the default for LFB mapping: fixes Mach64 drivers on NeXTSTEP/OPENSTEP and keeps everything else intact. 2. Mach8/32: minor cleanup to mode change code.
2024-05-16 22:33:50 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach32_ap_writeb(uint32_t addr, uint8_t val, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
uint8_t port_dword = addr & 0xfc;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
uint16_t actual_port = 0x02e8 + (addr & 1) + (port_dword << 8);
uint16_t actual_port_ext = 0x02ee + (addr & 1) + (port_dword << 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20))) &&
(svga->mapping.base == 0xa0000)) {
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
if (addr & 0x100) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Port WORDB Write=%04x.\n", actual_port_ext);
mach_accel_outb(actual_port_ext, val, mach);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Port WORDB Write=%04x.\n", actual_port);
mach_accel_outb(actual_port, val, mach);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Linear WORDB Write=%08x, val=%02x, ON=%x, dpconfig=%04x, apsize=%08x, addr=%08x.\n",
addr - mach->linear_base, val, dev->on, mach->accel.dp_config, mach->ap_size << 20, addr);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (dev->on)
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
mach32_write_common(addr, val, 1, mach, svga);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
else
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
svga_write_linear(addr, val, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach32_ap_writew(uint32_t addr, uint16_t val, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
uint8_t port_dword = addr & 0xfc;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
uint16_t actual_port = 0x02e8 + (port_dword << 8);
uint16_t actual_port_ext = 0x02ee + (port_dword << 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20))) &&
(svga->mapping.base == 0xa0000)) {
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
if (addr & 0x100) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Port WORDW Write=%04x, localcntl=%02x, pcicntl=%02x, actual addr=%08x, val=%04x.\n", actual_port_ext, mach->local_cntl & 0x20, mach->pci_cntl_reg & 0x80, addr, val);
mach_accel_outw(actual_port_ext, val, mach);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Port WORDW Write=%04x, localcntl=%02x, pcicntl=%02x, actual addr=%08x, val=%04x.\n", actual_port, mach->local_cntl & 0x20, mach->pci_cntl_reg & 0x80, addr, val);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_accel_outw(actual_port, val, mach);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Linear WORDW Write=%08x, val=%04x, ON=%x, dpconfig=%04x, apsize=%08x, addr=%08x.\n",
addr - mach->linear_base, val, dev->on, mach->accel.dp_config, mach->ap_size << 20, addr);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (dev->on)
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
mach32_writew_linear(addr, val, mach);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
else
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
svga_writew_linear(addr, val, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach32_ap_writel(uint32_t addr, uint32_t val, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
uint8_t port_dword = addr & 0xfc;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
uint16_t actual_port = 0x02e8 + (port_dword << 8);
uint16_t actual_port_ext = 0x02ee + (port_dword << 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20))) &&
(svga->mapping.base == 0xa0000)) {
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
if (addr & 0x100) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Port WORDL Write=%04x, localcntl=%02x, pcicntl=%02x.\n", actual_port_ext, mach->local_cntl & 0x20, mach->pci_cntl_reg & 0x80);
mach_accel_outl(actual_port_ext, val, mach);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Port WORDL Write=%04x, localcntl=%02x, pcicntl=%02x.\n", actual_port, mach->local_cntl & 0x20, mach->pci_cntl_reg & 0x80);
mach_accel_outl(actual_port, val, mach);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("Linear WORDL Write=%08x, val=%08x, ON=%x, dpconfig=%04x, apsize=%08x, addr=%08x.\n",
addr - mach->linear_base, val, dev->on, mach->accel.dp_config, mach->ap_size << 20, addr);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (dev->on)
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
mach32_writel_linear(addr, val, mach);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
else
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
svga_writel_linear(addr, val, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
static uint8_t
More sonarlint work
2023-06-09 23:46:54 -04:00
mach32_ap_readb(uint32_t addr, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
uint8_t temp;
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
uint8_t port_dword = addr & 0xfc;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
uint16_t actual_port = 0x02e8 + (addr & 1) + (port_dword << 8);
uint16_t actual_port_ext = 0x02ee + (addr & 1) + (port_dword << 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20))) &&
(svga->mapping.base == 0xa0000)) {
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
if (addr & 0x100)
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
temp = mach_accel_inb(actual_port_ext, mach);
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
else
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
temp = mach_accel_inb(actual_port, mach);
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
} else {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->on)
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
temp = mach32_read_common(addr, 1, mach, svga);
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
else
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
temp = svga_read_linear(addr, svga);
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
mach_log("Linear WORDB Read=%08x, ret=%02x, fast=%d.\n", addr, temp, svga->fast);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return temp;
}
static uint16_t
More sonarlint work
2023-06-09 23:46:54 -04:00
mach32_ap_readw(uint32_t addr, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
uint16_t temp;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
uint8_t port_dword = addr & 0xfc;
uint16_t actual_port = 0x02e8 + (port_dword << 8);
uint16_t actual_port_ext = 0x02ee + (port_dword << 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20))) &&
(svga->mapping.base == 0xa0000)) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
if (addr & 0x100) {
temp = mach_accel_inw(actual_port_ext, mach);
mach_log("Port WORDW Read=%04x.\n", actual_port_ext);
} else {
temp = mach_accel_inw(actual_port, mach);
mach_log("Port WORDW Read=%04x.\n", actual_port);
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
} else {
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (dev->on)
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
temp = mach32_readw_linear(addr, mach);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
else
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
temp = svga_readw_linear(addr, svga);
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
mach_log("Linear WORDW Read=%08x, ret=%04x.\n", addr, temp);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return temp;
}
static uint32_t
More sonarlint work
2023-06-09 23:46:54 -04:00
mach32_ap_readl(uint32_t addr, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
uint32_t temp;
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
uint8_t port_dword = addr & 0xfc;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
uint16_t actual_port = 0x02e8 + (port_dword << 8);
uint16_t actual_port_ext = 0x02ee + (port_dword << 8);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (((mach->local_cntl & 0x20) || (mach->pci_cntl_reg & 0x80)) &&
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
(((addr - mach->linear_base) >= ((mach->ap_size << 20) - 0x200)) && ((addr - mach->linear_base) < (mach->ap_size << 20))) &&
(svga->mapping.base == 0xa0000)) {
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
if (addr & 0x100) {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
temp = mach_accel_inl(actual_port_ext, mach);
mach_log("Port WORDL Read=%04x.\n", actual_port_ext);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
temp = mach_accel_inl(actual_port, mach);
mach_log("Port WORDL Read=%04x.\n", actual_port);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
} else {
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
if (dev->on)
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
temp = mach32_readl_linear(addr, mach);
Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
2024-10-27 23:36:11 +01:00
else
Mach32 LFB changes of the day (March 8th, 2025) Do not subtract from the linear base when it's not in the range, should fix NT 3.x graphics bugs using the LFB.
2025-03-08 14:45:41 +01:00
temp = svga_readl_linear(addr, svga);
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach_log("Linear WORDL Read=%08x, ret=%08x, ON%d.\n", addr, temp, dev->on);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
return temp;
}
static void
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach32_updatemapping(mach_t *mach, svga_t *svga)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
More sonarlint work
2023-06-09 23:46:54 -04:00
if (mach->pci_bus && (!(mach->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM))) {
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_log("No Mapping.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mem_mapping_disable(&svga->mapping);
mem_mapping_disable(&mach->mmio_linear_mapping);
return;
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (mach->regs[0xbd] & 0x04) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
svga->banked_mask = 0xffff;
} else {
switch (svga->gdcreg[6] & 0x0c) {
case 0x0: /*128k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
svga->banked_mask = 0xffff;
break;
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
svga->banked_mask = 0x7fff;
break;
case 0xC: /*32k at B8000*/
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_log("Linear base=%08x, aperture=%04x, localcntl=%02x, svgagdc=%x.\n",
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach->linear_base, mach->memory_aperture, mach->local_cntl, svga->gdcreg[6] & 0x0c);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->linear_base) {
if (((mach->memory_aperture & 3) == 1) && !mach->pci_bus) {
/*1 MB aperture*/
mach->ap_size = 1;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach_log("Linear Enabled APSIZE=1.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mem_mapping_set_addr(&mach->mmio_linear_mapping, mach->linear_base, mach->ap_size << 20);
} else {
/*4 MB aperture*/
mach->ap_size = 4;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach_log("Linear Enabled APSIZE=4.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mem_mapping_set_addr(&mach->mmio_linear_mapping, mach->linear_base, mach->ap_size << 20);
}
} else {
mach->ap_size = 4;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach_log("Linear Disabled APSIZE=4.\n");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mem_mapping_disable(&mach->mmio_linear_mapping);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
8514/A compatible changes on Mach32 of the day (November 3rd, 2024) Mark the ATI extended 8514/A mode accordingly (that is, if bit 5 of ATI reg 0xb0 and using ATI extended ports at the same time). Fixes wrong colors in some instances using standard IBM 8514/A drivers on Mach32.
2024-11-03 23:21:18 +01:00
if (dev->on && dev->vendor_mode) {
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach_log("Mach32 banked mapping.\n");
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mem_mapping_set_handler(&svga->mapping, mach32_read, mach32_readw, mach32_readl, mach32_write, mach32_writew, mach32_writel);
mem_mapping_set_p(&svga->mapping, mach);
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
} else {
mach_log("IBM compatible banked mapping.\n");
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, mach32_svga_write, mach32_svga_writew, mach32_svga_writel);
mem_mapping_set_p(&svga->mapping, svga);
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
}
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
} else {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel);
mem_mapping_set_p(&svga->mapping, svga);
Video, Storage and MCA changes/fixes. 1. Cirrus Logic GD54xx, Paradise/WD VGA now reset the interlace once a text mode is issued if not done automatically. 2. Paradise/WD's 15/16bpp modes using the 800x600 resolution now have the correct ma_latch, should fix most operating systems drivers using this combo. 3. More fixes (hopefully) to the accelerated pitch and rowoffset of the Trident TGUI cards (9440AGi and 96x0XGi), should fix issues with delayed displays mode changes under various operating systems (e.g.: Win3.1x). 4. Preliminary implementation of the Area Fill command of XGA, which is issued while using various painting and/or calc utilities on Win3.1x (IBM XGA updated drivers, e.g.: 2.12). 5. Preliminary (and incomplete) 4bpp XGA mode. 6. The XGA memory test for the 0xa5 using writes (used by various operating systems) no longer conflicts with DOS' XGAKIT's memory detection. 7. Small ROP fixes to both XGA and 8514/A. 8. Re-organized the mapping of the Mach32 chipset, especially when to enable the ATI mode or switching back to IBM mode, should fix LFB conflicts with various operating systems. 9. According to The OS/2 Museum, the Adaptec AHA-154xB series of SCSI cards fail the ASPI4DOS.SYS 3.36 signature check, so now make the changes accordingly. 10. Remove useless and crashy bios-less option of the Trantor T128. 11. The Image Manager 1024 card can also be used on a XT (although only if it has a V20/V30). 12. Re-organized the IBM PS/2 model 60 initialization as well as its right POS machine ID (though an update to sc.exe is still required for the POST memory amount to work normally).
2023-09-30 22:08:08 +02:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
static void
mach32_hwcursor_draw(svga_t *svga, int displine)
{
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
const mach_t *mach = (mach_t *) svga->priv;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
uint16_t dat;
int comb;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
int offset;
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
uint32_t color0;
uint32_t color1;
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
uint32_t *p;
int x_pos;
int y_pos;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
int shift = 0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
offset = dev->hwcursor_latch.x - dev->hwcursor_latch.xoff;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
shift = 1;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
Mach32 and clock changes of the day (September 22nd, 2024) 1. Going from screenshots of the Mach32 chips, they all have the ati18811-1 clock regardless of the bus type, whilst the Mach8 has an ati18812, which is actually a ati18811-0 2. Unbreak the NS3.1 Mach32 driver, ergo, don't block the LFB processing.
2024-09-22 21:05:10 +02:00
mach_log("BPP=%d, displine=%d.\n", dev->accel_bpp, displine);
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
switch (dev->accel_bpp) {
Actually initialize the cursor color regs of the ATI Mach32 card.
2023-12-14 21:56:17 +01:00
default:
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
case 8:
color0 = dev->pallook[mach->cursor_col_0];
color1 = dev->pallook[mach->cursor_col_1];
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
mach_log("4/8BPP: Color0=%08x, Color1=%08x.\n", color0, color1);
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
break;
case 15:
color0 = video_15to32[((mach->ext_cur_col_0_r << 16) | (mach->ext_cur_col_0_g << 8) | mach->cursor_col_0) & 0xffff];
color1 = video_15to32[((mach->ext_cur_col_1_r << 16) | (mach->ext_cur_col_1_g << 8) | mach->cursor_col_1) & 0xffff];
break;
case 16:
color0 = video_16to32[((mach->ext_cur_col_0_r << 16) | (mach->ext_cur_col_0_g << 8) | mach->cursor_col_0) & 0xffff];
color1 = video_16to32[((mach->ext_cur_col_1_r << 16) | (mach->ext_cur_col_1_g << 8) | mach->cursor_col_1) & 0xffff];
break;
case 24:
case 32:
color0 = ((mach->ext_cur_col_0_r << 16) | (mach->ext_cur_col_0_g << 8) | mach->cursor_col_0);
color1 = ((mach->ext_cur_col_1_r << 16) | (mach->ext_cur_col_1_g << 8) | mach->cursor_col_1);
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
mach_log("24/32BPP: Color0=%08x, Color1=%08x.\n", color0, color1);
Cirrus, ATI Mach8/32 and XGA fixes. 1. Update svga->fast to account for packed chain mode toggles, fixes issues on Descent II for DOS using the Cirrus cards. 2. Re-organized ATI Mach8/32 LFB access as well as 8514/A/ATI mode toggles, should end the video mode issues once and for all. 3. Fixed a small but major pattern issue with IBM OS/2 1.30.1's XGA driver (not .2, which is fine as is).
2023-12-06 15:00:31 +01:00
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->interlace && dev->hwcursor_oddeven)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->hwcursor_latch.addr += (16 >> shift);
for (int x = 0; x < 64; x += (8 >> shift)) {
if (shift) {
dat = dev->vram[(dev->hwcursor_latch.addr) & dev->vram_mask] & 0x0f;
dat |= (dev->vram[(dev->hwcursor_latch.addr + 1) & dev->vram_mask] << 4);
dat |= (dev->vram[(dev->hwcursor_latch.addr + 2) & dev->vram_mask] << 8);
dat |= (dev->vram[(dev->hwcursor_latch.addr + 3) & dev->vram_mask] << 12);
mach_log("4bpp Data=%04x.\n", dat);
} else {
dat = dev->vram[dev->hwcursor_latch.addr & dev->vram_mask];
dat |= (dev->vram[(dev->hwcursor_latch.addr + 1) & dev->vram_mask] << 8);
mach_log("8bppplus Data=%04x.\n", dat);
}
for (int xx = 0; xx < (8 >> shift); xx++) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
comb = (dat >> (xx << 1)) & 0x03;
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
y_pos = displine;
x_pos = offset + svga->x_add;
p = buffer32->line[y_pos];
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (offset >= dev->hwcursor_latch.x) {
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
mach_log("COMB=%d.\n", comb);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (comb) {
case 0:
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
p[x_pos] = color0;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 1:
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
p[x_pos] = color1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 3:
Mach8/32 fixes (again): 1. Fixed wrong setting of highres and lowres mode of 8bpp, makes Transport Tycoon run properly on these ATI cards again. 2. 32-bit (RGBA) True Color is actually supported on the Mach32, but barely used, and the original code was wrong. This fix makes 32-bit True Color render the right colors.
2023-12-14 21:47:10 +01:00
p[x_pos] ^= 0xffffff;
More sonarlint work
2023-06-09 23:46:54 -04:00
break;
default:
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
}
}
offset++;
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->hwcursor_latch.addr += 2;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (dev->interlace && !dev->hwcursor_oddeven)
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->hwcursor_latch.addr += (16 >> shift);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
static void
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
ati8514_io_set(svga_t *svga)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
io_sethandler(0x2e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
io_sethandler(0x6e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x12e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x16e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x1ae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x1ee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x22e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x26e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x2ee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x42e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x4ae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x52e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x56e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x5ae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x5ee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x82e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x86e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x8ae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x8ee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x92e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x96e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x9ae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x9ee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xa2e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xa6e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xaae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xaee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xb2e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xb6e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xbae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xbee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xe2e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xc2e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xc6e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xcae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xcee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xd2e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xd6e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xdae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xdee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xe6e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xeae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xeee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xf2e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xf6e8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xfae8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xfee8, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x02ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x06ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x0aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x0eee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x12ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x16ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x1aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x1eee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x22ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x26ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x2aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x2eee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x32ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x36ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x3aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x3eee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x42ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x46ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x4aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x52ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x56ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x5aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x5eee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x62ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x66ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x6aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x6eee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x72ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x76ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x7aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x7eee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x82ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x86ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
io_sethandler(0x8aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
io_sethandler(0x8eee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x92ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x96ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0x9aee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xa2ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xa6ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xaaee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xaeee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xb2ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xb6ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xbaee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xbeee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xc2ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xc6ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xcaee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xceee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xd2ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xd6ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xdaee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xdeee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xe2ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xe6ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
io_sethandler(0xeaee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
io_sethandler(0xeeee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xf2ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xf6ee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
io_sethandler(0xfeee, 0x0002, ati8514_accel_inb, ati8514_accel_inw, ati8514_accel_inl, ati8514_accel_outb, ati8514_accel_outw, ati8514_accel_outl, svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Fixing regressions of the mach32 (November 5th, 2024) 1. ATI Extended 8514/A mode may not use bit 5 of ATI reg 0xb0 sometimes but at the same time it won't use the standard VGA way of setting up 256+ colors, therefore, in the VGA DAC writes, use standard VGA way to revert to VGA mode in the writes instead of relying on bit 5 of ATI reg 0xb0 being enabled/disabled there. Fixes mode switches in VLB/PCI configurations using Windows 9x and possibly other stuff, ISA is unaffected and still works fine. 2. Added more logs and and remove/set I/O handlers correctly for the PCI side.
2024-11-05 01:08:13 +01:00
static void
mach_io_remove(mach_t *mach)
{
io_removehandler(0x2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x12e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x16e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x1ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x1ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x22e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x26e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x2ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x42e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x4ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x52e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x56e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x5ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x5ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x82e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x86e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x8ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x8ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x92e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x96e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x9ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x9ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xa2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xa6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xaae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xaee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xb2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xb6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xbae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xbee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xe2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xc2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xc6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xcae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xcee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xd2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xd6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xdae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xdee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xe6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xeae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xeee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xf2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xf6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xfae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xfee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x02ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x06ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x0aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x0eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x12ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x16ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x1aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x1eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x22ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x26ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x2aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x2eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x32ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x36ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x3aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x3eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x42ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x46ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x4aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x52ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x56ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x5aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x5eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x62ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x66ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x6aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x6eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x72ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x76ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x7aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x7eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x82ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x86ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
io_removehandler(0x8aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
Fixing regressions of the mach32 (November 5th, 2024) 1. ATI Extended 8514/A mode may not use bit 5 of ATI reg 0xb0 sometimes but at the same time it won't use the standard VGA way of setting up 256+ colors, therefore, in the VGA DAC writes, use standard VGA way to revert to VGA mode in the writes instead of relying on bit 5 of ATI reg 0xb0 being enabled/disabled there. Fixes mode switches in VLB/PCI configurations using Windows 9x and possibly other stuff, ISA is unaffected and still works fine. 2. Added more logs and and remove/set I/O handlers correctly for the PCI side.
2024-11-05 01:08:13 +01:00
io_removehandler(0x8eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x92ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x96ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0x9aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xa2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xa6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xaaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xaeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xb2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xb6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xbaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xbeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xc2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xc6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xcaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xceee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xd2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xd6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xdaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xdeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xe2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xe6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
io_removehandler(0xeaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
Fixing regressions of the mach32 (November 5th, 2024) 1. ATI Extended 8514/A mode may not use bit 5 of ATI reg 0xb0 sometimes but at the same time it won't use the standard VGA way of setting up 256+ colors, therefore, in the VGA DAC writes, use standard VGA way to revert to VGA mode in the writes instead of relying on bit 5 of ATI reg 0xb0 being enabled/disabled there. Fixes mode switches in VLB/PCI configurations using Windows 9x and possibly other stuff, ISA is unaffected and still works fine. 2. Added more logs and and remove/set I/O handlers correctly for the PCI side.
2024-11-05 01:08:13 +01:00
io_removehandler(0xeeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xf2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xf6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xfaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_removehandler(0xfeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static void
mach_io_set(mach_t *mach)
{
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
io_sethandler(0x2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x12e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x16e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x1ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x1ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x22e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x26e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x2ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x42e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x4ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x52e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x56e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x5ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x5ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x82e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x86e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x8ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x8ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x92e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x96e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x9ae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x9ee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xa2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xa6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xaae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xaee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xb2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xb6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xbae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xbee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xe2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xc2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xc6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xcae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xcee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xd2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xd6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xdae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xdee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xe6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xeae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xeee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xf2e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xf6e8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xfae8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xfee8, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x02ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x06ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x0aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x0eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x12ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x16ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x1aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x1eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x22ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x26ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x2aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x2eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x32ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x36ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x3aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x3eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x42ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x46ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x4aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x52ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x56ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x5aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x5eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x62ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x66ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x6aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x6eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x72ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x76ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x7aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x7eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x82ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
More ATI accel fixes and undocumented stuff. 1. Apparently some stuff uses read-only port 0x86ee and expects it to return 0 while port 0xf6ee is an alias to 0x82e8, this should fix hangs in Majong 8514 using ATI's DOS drivers. 2. 8514 data available bits are reset properly when new parameters for a new command are installed (port 0xCEEE), fixes remaining hangs with some stuff.
2023-12-28 02:01:45 +01:00
io_sethandler(0x86ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
io_sethandler(0x8aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
io_sethandler(0x8eee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x92ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x96ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0x9aee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xa2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xa6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xaaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xaeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xb2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xb6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xbaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xbeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xc2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xc6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xcaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xceee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xd2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xd6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xdaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xdeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xe2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xe6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
io_sethandler(0xeaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
io_sethandler(0xeeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
io_sethandler(0xf2ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
More ATI accel fixes and undocumented stuff. 1. Apparently some stuff uses read-only port 0x86ee and expects it to return 0 while port 0xf6ee is an alias to 0x82e8, this should fix hangs in Majong 8514 using ATI's DOS drivers. 2. 8514 data available bits are reset properly when new parameters for a new command are installed (port 0xCEEE), fixes remaining hangs with some stuff.
2023-12-28 02:01:45 +01:00
io_sethandler(0xf6ee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
io_sethandler(0xfaee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
io_sethandler(0xfeee, 0x0002, mach_accel_inb, mach_accel_inw, mach_accel_inl, mach_accel_outb, mach_accel_outw, mach_accel_outl, mach);
}
static uint8_t
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
mach_mca_read(int port, void *priv)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
{
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
const mach_t *mach = (mach_t *) priv;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach_log("[%04X]: MCA read port = %x, val = %02x.\n", CS, port & 7, mach->pos_regs[port & 7]);
return mach->pos_regs[port & 7];
}
static void
mach_mca_write(int port, uint8_t val, void *priv)
{
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
mach_t *mach = (mach_t *) priv;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (port < 0x102)
return;
mach->pos_regs[port & 7] = val;
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("[%04X]: MCA write port = %x, val = %02x, biosaddr = %05x.\n",
CS, port & 7, mach->pos_regs[port & 7], (((mach->pos_regs[3] & 0x3e) << 0x0c) >> 1) + 0xc0000);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mem_mapping_disable(&mach->bios_rom.mapping);
mem_mapping_disable(&mach->bios_rom2.mapping);
if (mach->pos_regs[2] & 0x01) {
mem_mapping_enable(&mach->bios_rom.mapping);
mem_mapping_enable(&mach->bios_rom2.mapping);
}
}
static uint8_t
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
mach_mca_feedb(void *priv)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
{
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
const mach_t *mach = (mach_t *) priv;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach_log("FeedB = %x.\n", mach->pos_regs[2] & 0x01);
return mach->pos_regs[2] & 0x01;
}
static void
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
mach_mca_reset(void *priv)
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
{
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
mach_t *mach = (mach_t *) priv;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
svga_t *svga = &mach->svga;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach_log("MCA reset.\n");
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->on = 0;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach_mca_write(0x102, 0, mach);
Video changes of the day (January 26th, 2025) XGA: 1. Added a proper poll so to have its timings independent of the SVGA core and changes its renderer accordingly, mainly a blank render one. 2. Workaround the Ctrl-Alt-Del reset of Windows 2.x so that it switches back to VGA text mode correctly when using the 0xA000 64K aperture (in vid_svga.c). SVGA core: Re-organized the way the different timers are organized so that the XGA and 8514/A pollers can coexist with the SVGA timer without conflicts. ATI Mach32: Reworked the true color renderer and made it a Mach32 exclusive due to its differences from the standard one. Fixes wrong rendered colors in NT using the 32bpp renderer in RGB mode.
2025-01-26 14:25:35 +01:00
svga_set_poll(svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
uint8_t
ati8514_mca_read(int port, void *priv)
{
const svga_t *svga = (svga_t *) priv;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
return (dev->pos_regs[port & 7]);
}
void
ati8514_mca_write(int port, uint8_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
if (port < 0x102)
return;
dev->pos_regs[port & 7] = val;
Macro Cleaning
2025-02-01 03:29:03 -05:00
mach_log("[%04X]: MCA write port = %x, val = %02x, biosaddr = %05x.\n",
CS, port & 7, dev->pos_regs[port & 7], (((dev->pos_regs[3] & 0x3e) << 0x0c) >> 1) + 0xc0000);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mem_mapping_disable(&dev->bios_rom.mapping);
if (dev->pos_regs[2] & 0x01)
mem_mapping_enable(&dev->bios_rom.mapping);
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
void
ati8514_pos_write(uint16_t port, uint8_t val, void *priv)
{
ati8514_mca_write(port, val, priv);
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static uint8_t
More sonarlint work
2023-06-09 23:46:54 -04:00
mach32_pci_read(UNUSED(int func), int addr, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
const mach_t *mach = (mach_t *) priv;
uint8_t ret = 0x00;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if ((addr >= 0x30) && (addr <= 0x33) && !mach->has_bios)
return ret;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (addr) {
case 0x00:
ret = 0x02; /*ATI*/
break;
case 0x01:
ret = 0x10;
break;
case 0x02:
ret = 0x58;
break;
case 0x03:
ret = 0x41;
break;
case PCI_REG_COMMAND:
ret = mach->pci_regs[PCI_REG_COMMAND] | 0x80; /*Respond to IO and memory accesses*/
break;
case 0x07:
ret = 0x01; /*Medium DEVSEL timing*/
break;
case 0x0a:
ret = 0x00; /*Supports VGA interface*/
break;
case 0x0b:
ret = 0x03;
break;
case 0x10:
ret = 0x00; /*Linear frame buffer address*/
break;
case 0x11:
ret = 0x00;
break;
case 0x12:
ret = mach->linear_base >> 16;
break;
case 0x13:
ret = mach->linear_base >> 24;
break;
case 0x30:
ret = (mach->pci_regs[0x30] & 0x01); /*BIOS ROM address*/
break;
case 0x31:
ret = 0x00;
break;
case 0x32:
ret = mach->pci_regs[0x32];
break;
case 0x33:
ret = mach->pci_regs[0x33];
break;
case 0x3c:
ret = mach->int_line;
break;
case 0x3d:
ret = PCI_INTA;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
return ret;
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach32_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_t *mach = (mach_t *) priv;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if ((addr >= 0x30) && (addr <= 0x33) && !mach->has_bios)
return;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
switch (addr) {
case PCI_REG_COMMAND:
mach->pci_regs[PCI_REG_COMMAND] = val & 0x27;
if (val & PCI_COMMAND_IO) {
Fixing regressions of the mach32 (November 5th, 2024) 1. ATI Extended 8514/A mode may not use bit 5 of ATI reg 0xb0 sometimes but at the same time it won't use the standard VGA way of setting up 256+ colors, therefore, in the VGA DAC writes, use standard VGA way to revert to VGA mode in the writes instead of relying on bit 5 of ATI reg 0xb0 being enabled/disabled there. Fixes mode switches in VLB/PCI configurations using Windows 9x and possibly other stuff, ISA is unaffected and still works fine. 2. Added more logs and and remove/set I/O handlers correctly for the PCI side.
2024-11-05 01:08:13 +01:00
mach_log("Remove and set handlers.\n");
io_removehandler(0x01ce, 2, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
More video fixes: ATI Mach64 is temporarily unthreaded because of blitter desyncing. ATI Mach32 now returns to ATI mode from IBM mode and vice versa more correctly. Make the IBM 8514/A compatible poll not run if a 3D add-on card (Voodoo1/2) takes precedence (seen on a Mach32 PCI and Voodoo2 3D combo). Finally ended the mess ups of the TGUI9440/96x0 pitch, it actually was the CRTC offset reg (SVGA CRTC 0x13) that defined it with some shifting based on the BPP.
2023-10-11 18:46:15 +02:00
io_removehandler(0x02ea, 4, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
io_removehandler(0x03c0, 32, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
Fixing regressions of the mach32 (November 5th, 2024) 1. ATI Extended 8514/A mode may not use bit 5 of ATI reg 0xb0 sometimes but at the same time it won't use the standard VGA way of setting up 256+ colors, therefore, in the VGA DAC writes, use standard VGA way to revert to VGA mode in the writes instead of relying on bit 5 of ATI reg 0xb0 being enabled/disabled there. Fixes mode switches in VLB/PCI configurations using Windows 9x and possibly other stuff, ISA is unaffected and still works fine. 2. Added more logs and and remove/set I/O handlers correctly for the PCI side.
2024-11-05 01:08:13 +01:00
mach_io_remove(mach);
io_sethandler(0x01ce, 2, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
More video fixes: ATI Mach64 is temporarily unthreaded because of blitter desyncing. ATI Mach32 now returns to ATI mode from IBM mode and vice versa more correctly. Make the IBM 8514/A compatible poll not run if a 3D add-on card (Voodoo1/2) takes precedence (seen on a Mach32 PCI and Voodoo2 3D combo). Finally ended the mess ups of the TGUI9440/96x0 pitch, it actually was the CRTC offset reg (SVGA CRTC 0x13) that defined it with some shifting based on the BPP.
2023-10-11 18:46:15 +02:00
io_sethandler(0x02ea, 4, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
io_sethandler(0x03c0, 32, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
Fixing regressions of the mach32 (November 5th, 2024) 1. ATI Extended 8514/A mode may not use bit 5 of ATI reg 0xb0 sometimes but at the same time it won't use the standard VGA way of setting up 256+ colors, therefore, in the VGA DAC writes, use standard VGA way to revert to VGA mode in the writes instead of relying on bit 5 of ATI reg 0xb0 being enabled/disabled there. Fixes mode switches in VLB/PCI configurations using Windows 9x and possibly other stuff, ISA is unaffected and still works fine. 2. Added more logs and and remove/set I/O handlers correctly for the PCI side.
2024-11-05 01:08:13 +01:00
mach_io_set(mach);
More video fixes: ATI Mach64 is temporarily unthreaded because of blitter desyncing. ATI Mach32 now returns to ATI mode from IBM mode and vice versa more correctly. Make the IBM 8514/A compatible poll not run if a 3D add-on card (Voodoo1/2) takes precedence (seen on a Mach32 PCI and Voodoo2 3D combo). Finally ended the mess ups of the TGUI9440/96x0 pitch, it actually was the CRTC offset reg (SVGA CRTC 0x13) that defined it with some shifting based on the BPP.
2023-10-11 18:46:15 +02:00
} else {
Fixing regressions of the mach32 (November 5th, 2024) 1. ATI Extended 8514/A mode may not use bit 5 of ATI reg 0xb0 sometimes but at the same time it won't use the standard VGA way of setting up 256+ colors, therefore, in the VGA DAC writes, use standard VGA way to revert to VGA mode in the writes instead of relying on bit 5 of ATI reg 0xb0 being enabled/disabled there. Fixes mode switches in VLB/PCI configurations using Windows 9x and possibly other stuff, ISA is unaffected and still works fine. 2. Added more logs and and remove/set I/O handlers correctly for the PCI side.
2024-11-05 01:08:13 +01:00
mach_log("Remove handlers.\n");
io_removehandler(0x01ce, 2, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
More video fixes: ATI Mach64 is temporarily unthreaded because of blitter desyncing. ATI Mach32 now returns to ATI mode from IBM mode and vice versa more correctly. Make the IBM 8514/A compatible poll not run if a 3D add-on card (Voodoo1/2) takes precedence (seen on a Mach32 PCI and Voodoo2 3D combo). Finally ended the mess ups of the TGUI9440/96x0 pitch, it actually was the CRTC offset reg (SVGA CRTC 0x13) that defined it with some shifting based on the BPP.
2023-10-11 18:46:15 +02:00
io_removehandler(0x02ea, 4, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
io_removehandler(0x03c0, 32, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
Fixing regressions of the mach32 (November 5th, 2024) 1. ATI Extended 8514/A mode may not use bit 5 of ATI reg 0xb0 sometimes but at the same time it won't use the standard VGA way of setting up 256+ colors, therefore, in the VGA DAC writes, use standard VGA way to revert to VGA mode in the writes instead of relying on bit 5 of ATI reg 0xb0 being enabled/disabled there. Fixes mode switches in VLB/PCI configurations using Windows 9x and possibly other stuff, ISA is unaffected and still works fine. 2. Added more logs and and remove/set I/O handlers correctly for the PCI side.
2024-11-05 01:08:13 +01:00
mach_io_remove(mach);
More video fixes: ATI Mach64 is temporarily unthreaded because of blitter desyncing. ATI Mach32 now returns to ATI mode from IBM mode and vice versa more correctly. Make the IBM 8514/A compatible poll not run if a 3D add-on card (Voodoo1/2) takes precedence (seen on a Mach32 PCI and Voodoo2 3D combo). Finally ended the mess ups of the TGUI9440/96x0 pitch, it actually was the CRTC offset reg (SVGA CRTC 0x13) that defined it with some shifting based on the BPP.
2023-10-11 18:46:15 +02:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach32_updatemapping(mach, &mach->svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x12:
mach->linear_base = (mach->linear_base & 0xff000000) | ((val & 0xc0) << 16);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach32_updatemapping(mach, &mach->svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x13:
mach->linear_base = (mach->linear_base & 0xc00000) | (val << 24);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach32_updatemapping(mach, &mach->svga);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
break;
case 0x30:
case 0x32:
case 0x33:
mach->pci_regs[addr] = val;
if (mach->pci_regs[0x30] & 0x01) {
uint32_t bios_addr = (mach->pci_regs[0x32] << 16) | (mach->pci_regs[0x33] << 24);
mach_log("Mach32 bios_rom enabled at %08x\n", bios_addr);
mem_mapping_set_addr(&mach->bios_rom.mapping, bios_addr, 0x8000);
} else {
mach_log("Mach32 bios_rom disabled\n");
mem_mapping_disable(&mach->bios_rom.mapping);
}
return;
case 0x3c:
mach->int_line = val;
break;
More sonarlint work
2023-06-09 23:46:54 -04:00
default:
break;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
static void
mach_vblank_start(mach_t *mach, svga_t *svga)
{
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
dev->subsys_stat |= INT_VSY;
}
static void
mach_combo_vblank_start(void *priv)
{
svga_t *svga = (svga_t *) priv;
mach_t *mach = (mach_t *) svga->priv;
mach_vblank_start(mach, svga);
}
static void
ati8514_vblank_start(void *priv)
{
svga_t *svga = (svga_t *) priv;
mach_t *mach = (mach_t *) svga->ext8514;
mach_vblank_start(mach, svga);
}
static void
mach_combo_accel_out_fifo(void *priv, uint16_t port, uint16_t val, int len)
{
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
mach_log("Accel OUT Combo=%04x, val=%04x, len=%d.\n", port, val, len);
mach_accel_out_fifo(mach, svga, dev, port, val, len);
}
static void
ati8514_accel_out_fifo(void *priv, uint16_t port, uint16_t val, int len)
{
svga_t *svga = (svga_t *) priv;
mach_t *mach = (mach_t *) svga->ext8514;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
mach_accel_out_fifo(mach, svga, dev, port, val, len);
}
static void
mach_disable_handlers(mach_t *mach)
{
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
if (mach->pci_bus) {
io_removehandler(0x01ce, 2, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
io_removehandler(0x02ea, 4, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
io_removehandler(0x03c0, 32, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
mach_io_remove(mach);
}
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mem_mapping_disable(&mach->mmio_linear_mapping);
mem_mapping_disable(&mach->svga.mapping);
if (mach->pci_bus && mach->has_bios)
mem_mapping_disable(&mach->bios_rom.mapping);
/* Save all the mappings and the timers because they are part of linked lists. */
reset_state->mmio_linear_mapping = mach->mmio_linear_mapping;
reset_state->svga.mapping = mach->svga.mapping;
reset_state->bios_rom.mapping = mach->bios_rom.mapping;
reset_state->svga.timer = mach->svga.timer;
}
static void
mach_reset(void *priv)
{
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
if (reset_state != NULL) {
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->on = 0;
dev->vendor_mode = 0;
dev->_8514on = 0;
dev->_8514crt = 0;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach_disable_handlers(mach);
mach->force_busy = 0;
dev->force_busy = 0;
dev->force_busy2 = 0;
if (mach->pci_bus)
reset_state->pci_slot = mach->pci_slot;
*mach = *reset_state;
}
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static void *
mach8_init(const device_t *info)
{
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
mach_t *mach;
svga_t *svga;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
ibm8514_t *dev;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
mach = calloc(1, sizeof(mach_t));
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
reset_state = calloc(1, sizeof(mach_t));
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
svga = &mach->svga;
dev = (ibm8514_t *) calloc(1, sizeof(ibm8514_t));
svga->dev8514 = dev;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->pci_bus = !!(info->flags & DEVICE_PCI);
mach->vlb_bus = !!(info->flags & DEVICE_VLB);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach->mca_bus = !!(info->flags & DEVICE_MCA);
dev->type = info->flags;
dev->local = info->local & 0xff;
mach->has_bios = !(info->local & 0xff00);
mach->ramdac_type = mach->pci_bus ? device_get_config_int("ramdac") : 1;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->vram_amount = device_get_config_int("memory");
dev->vram_512k_8514 = dev->vram_amount == 512;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (mach->pci_bus) {
if (mach->has_bios) {
rom_init(&mach->bios_rom,
BIOS_MACH32_PCI_ROM_PATH,
0xc0000, 0x8000, 0x7fff,
0, MEM_MAPPING_EXTERNAL);
}
}
else if (mach->vlb_bus)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
rom_init(&mach->bios_rom,
BIOS_MACH32_VLB_ROM_PATH,
0xc0000, 0x8000, 0x7fff,
0, MEM_MAPPING_EXTERNAL);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else if (mach->mca_bus) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
rom_init(&mach->bios_rom,
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
BIOS_MACH32_MCA_ROM_PATH,
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
0xc0000, 0x8000, 0x7fff,
0, MEM_MAPPING_EXTERNAL);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
rom_init(&mach->bios_rom2,
BIOS_MACH32_MCA_ROM_PATH,
0xc8000, 0x1000, 0x0fff,
0x8000, MEM_MAPPING_EXTERNAL);
} else {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
rom_init(&mach->bios_rom,
BIOS_MACH32_ISA_ROM_PATH,
0xc0000, 0x8000, 0x7fff,
0, MEM_MAPPING_EXTERNAL);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
} else
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
rom_init(&mach->bios_rom,
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
BIOS_MACH8_VGA_ROM_PATH,
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
0xc0000, 0x8000, 0x7fff,
0, MEM_MAPPING_EXTERNAL);
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
svga_init(info, svga, mach, dev->vram_amount << 10, /*default: 2MB for Mach32*/
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach_recalctimings,
mach_in, mach_out,
mach32_hwcursor_draw,
NULL);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->vram_size = dev->vram_amount << 10;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
dev->vram = calloc(dev->vram_size, 1);
Video changes of the day (July 8th, 2024) IBM 8514/A set: Fixed a one off video bug that was causing the VGA video to not be restored after quitting a 8514/A GUI session (namely on Win2.x' 8514/A's driver). ATI Mach32: Fixed another vertical display issue when activated (in 1280x1024 mode, when 1024 was 1022). All involved: Apply RG's changedvram fix to 8514/A, Mach8/32 and XGA's changedvram pointers.
2024-07-08 21:21:06 +02:00
dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1);
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
dev->vram_mask = dev->vram_size - 1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->hwcursor.cur_ysize = 64;
mach->config1 = 0x20;
if (mach->pci_bus && !mach->ramdac_type)
svga->ramdac = device_add(&ati68860_ramdac_device);
else
svga->ramdac = device_add(&ati68875_ramdac_device);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
if (mach->vlb_bus) {
video_inform(VIDEO_FLAG_TYPE_8514, &timing_mach32_vlb);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (!is486)
mach->config1 |= 0x0a;
else
mach->config1 |= 0x0c;
mach->config1 |= 0x0400;
Mach32 and clock changes of the day (September 22nd, 2024) 1. Going from screenshots of the Mach32 chips, they all have the ati18811-1 clock regardless of the bus type, whilst the Mach8 has an ati18812, which is actually a ati18811-0 2. Unbreak the NS3.1 Mach32 driver, ergo, don't block the LFB processing.
2024-09-22 21:05:10 +02:00
svga->clock_gen = device_add(&ati18811_1_device);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
} else if (mach->mca_bus) {
video_inform(VIDEO_FLAG_TYPE_8514, &timing_mach32_mca);
if (is286 && !is386)
mach->config1 |= 0x04;
else
mach->config1 |= 0x06;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->config1 |= 0x0400;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
svga->clock_gen = device_add(&ati18811_1_device);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else if (mach->pci_bus) {
video_inform(VIDEO_FLAG_TYPE_8514, &timing_mach32_pci);
mach->config1 |= 0x0e;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
if (mach->ramdac_type)
mach->config1 |= 0x0400;
else
mach->config1 |= 0x0a00;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->config2 |= 0x2000;
Mach32 and clock changes of the day (September 22nd, 2024) 1. Going from screenshots of the Mach32 chips, they all have the ati18811-1 clock regardless of the bus type, whilst the Mach8 has an ati18812, which is actually a ati18811-0 2. Unbreak the NS3.1 Mach32 driver, ergo, don't block the LFB processing.
2024-09-22 21:05:10 +02:00
svga->clock_gen = device_add(&ati18811_1_device);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
video_inform(VIDEO_FLAG_TYPE_8514, &timing_gfxultra_isa);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach->config1 |= 0x0400;
Mach32 and clock changes of the day (September 22nd, 2024) 1. Going from screenshots of the Mach32 chips, they all have the ati18811-1 clock regardless of the bus type, whilst the Mach8 has an ati18812, which is actually a ati18811-0 2. Unbreak the NS3.1 Mach32 driver, ergo, don't block the LFB processing.
2024-09-22 21:05:10 +02:00
svga->clock_gen = device_add(&ati18811_1_device);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
mem_mapping_add(&mach->mmio_linear_mapping, 0, 0, mach32_ap_readb, mach32_ap_readw, mach32_ap_readl, mach32_ap_writeb, mach32_ap_writew, mach32_ap_writel, NULL, MEM_MAPPING_EXTERNAL, mach);
mem_mapping_disable(&mach->mmio_linear_mapping);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, mach32_svga_write, mach32_svga_writew, mach32_svga_writel);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
} else {
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
svga_init(info, svga, mach, (512 << 10), /*default: 512kB VGA for 28800-6 + 1MB for Mach8*/
mach_recalctimings,
mach_in, mach_out,
NULL,
NULL);
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->vram_size = (dev->vram_amount << 10);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->vram = calloc(dev->vram_size, 1);
Video changes of the day (July 8th, 2024) IBM 8514/A set: Fixed a one off video bug that was causing the VGA video to not be restored after quitting a 8514/A GUI session (namely on Win2.x' 8514/A's driver). ATI Mach32: Fixed another vertical display issue when activated (in 1280x1024 mode, when 1024 was 1022). All involved: Apply RG's changedvram fix to 8514/A, Mach8/32 and XGA's changedvram pointers.
2024-07-08 21:21:06 +02:00
dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->vram_mask = dev->vram_size - 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
video_inform(VIDEO_FLAG_TYPE_8514, &timing_gfxultra_isa);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->config1 = 0x01 | 0x08 | 0x80;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->vram_amount >= 1024)
mach->config1 |= 0x20;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mach->config2 = 0x02;
Mach32 and clock changes of the day (September 22nd, 2024) 1. Going from screenshots of the Mach32 chips, they all have the ati18811-1 clock regardless of the bus type, whilst the Mach8 has an ati18812, which is actually a ati18811-0 2. Unbreak the NS3.1 Mach32 driver, ergo, don't block the LFB processing.
2024-09-22 21:05:10 +02:00
svga->clock_gen = device_add(&ati18811_0_device);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
dev->bpp = 0;
svga->getclock = ics2494_getclock;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->on = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->pitch = 1024;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
dev->ext_crt_pitch = 0x80;
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
dev->accel_bpp = 8;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga->force_old_addr = 1;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
svga->miscout = 1;
svga->bpp = 8;
svga->packed_chain4 = 1;
dev->rowoffset = 0x80;
io_sethandler(0x01ce, 2, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
io_sethandler(0x03c0, 32, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
io_sethandler(0x02ea, 4, mach_in, NULL, NULL, mach_out, NULL, NULL, mach);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach_io_set(mach);
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
mach->accel.cmd_type = -2;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
if (ATI_MACH32) {
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
svga->decode_mask = (4 << 20) - 1;
mach->cursor_col_1 = 0xff;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->ext_cur_col_1_r = 0xff;
mach->ext_cur_col_1_g = 0xff;
if (mach->vlb_bus)
ati_eeprom_load(&mach->eeprom, "mach32_vlb.nvr", 1);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
else if (mach->mca_bus) {
ati_eeprom_load(&mach->eeprom, "mach32_mca.nvr", 1);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mem_mapping_disable(&mach->bios_rom.mapping);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
mem_mapping_disable(&mach->bios_rom2.mapping);
mach->pos_regs[0] = 0x89;
mach->pos_regs[1] = 0x80;
mca_add(mach_mca_read, mach_mca_write, mach_mca_feedb, mach_mca_reset, mach);
} else if (mach->pci_bus) {
ati_eeprom_load(&mach->eeprom, "mach32_pci.nvr", 1);
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
if (mach->has_bios) {
mem_mapping_disable(&mach->bios_rom.mapping);
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
pci_add_card(PCI_ADD_NORMAL, mach32_pci_read, mach32_pci_write, mach, &mach->pci_slot);
Dribs and drabs which have escaped
2023-08-11 20:32:56 -04:00
} else
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
pci_add_card(PCI_ADD_VIDEO, mach32_pci_read, mach32_pci_write, mach, &mach->pci_slot);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
mach->pci_regs[PCI_REG_COMMAND] = 0x87;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
mach->pci_regs[0x30] = 0x00;
mach->pci_regs[0x32] = 0x0c;
mach->pci_regs[0x33] = 0x00;
} else
ati_eeprom_load(&mach->eeprom, "mach32.nvr", 1);
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
} else
Video changes of the day (November 13th, 2024) 1. Finally add the ATI 8514/A Ultra add-on BIOS in both ISA and MCA variants (despite the ROM page failure on POST). 2. Fixed a mode switch bug in the Mach8 (both add-on and vga combo) when exiting the Win3.x GUI using the native drivers. 3. Corrected (best possible) the eeprom load of the Mach8 products. 4. Partial implementation of the FIFO on the 8514/A compatible products including Mach8/32 and plain IBM 8514/A.
2024-11-13 22:55:16 +01:00
ati_eeprom_load_mach8_vga(&mach->eeprom, "mach8.nvr");
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel_out_fifo = mach_combo_accel_out_fifo;
dev->vblank_start = mach_combo_vblank_start;
*reset_state = *mach;
More sonarlint work
2023-06-09 23:46:54 -04:00
return mach;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
void
ati8514_init(svga_t *svga, void *ext8514, void *dev8514)
{
Video changes part 1 for 4.2 1. Corrected the ATI 1881x clocks for use with the ATI Mach8/32 and VGA Wonder chips. The CPU slowdowns should now be gone. 2. Merged I/O ports common to both the ATI and IBM 8514/A compatible chips where they have identical code (extended behavior is still separate). Code duplication is now less than before. 3. Fixed a general polygon pattern issue in the Mach8/32 affecting calc.exe in Win3.x and other stuff. 4. Mode changes are, once again, changed (ATI and IBM), as close as possible to the real thing without destroying existing resolutions. 5. The 8514/A Vertical Counter has been extended to 0xfff so that it can take 1280x1024 resolutions well offered by the Mach32 as well as a better way to change the IBM/ATI modes through a callback swap where approprietate. 6. in 8514/A mode, reads from the 0x3c6-0x3c9 ramdac range is redirected to the 8514/A RAMDAC (0x2ea-0x2ed). 7. LFB access in the Mach32 now no longer takes account of the SVGA derived rops. Fixes Mach32 display on NeXTSTEP/OPENSTEP 3.x/4.x 8. Reworked the Display Sense Status and Subsystem Status ports so that they're not copycats from MAME and instead follow the datasheet.
2024-05-29 20:47:22 +02:00
mach_t *mach = (mach_t *) ext8514;
ibm8514_t *dev = (ibm8514_t *) dev8514;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
/*Init as 1024x768 87hz interlaced first, per 8514/A.*/
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
dev->on = 0;
Vast fixes to the Mach8/32/8514/A compatible side (April 22nd 2025) 1. As tiring as it seems, XOR properly the passthrough bits for mode changes. Fixes everything tested as of now (Mach8/32). 2. Implemented separate destination and source GE pitch and offsets. Fixes Windows 3.1 mach8/32 drivers using devicebitmap enabled (or dmp=1). 3. Properly fixed high and true color patterns so that the aforementioned patterns are drawn correctly in various stuff. 4. Implemented in the best possible way the CRT offset (currently in on conjunction with the GE offset). 5. On ScanToX with bpp set to 24 and dpconfig 0x6211, optmize the SRC/CUR X-Y coordinates at the end of the blit. 6. For mode changes, don't call the mode change recalctimings function if we aren't in the appropriate bits of the respective ports. 7. Separate 8514/A compatible and Extended foreground/background selection implemented, fixes Windows 3.x ATI Ultra drivers from 1992 without hacks. 8. Clear the busy flags when needed without stalling the entire guests (but not the emulator itself) (Mach8/32). 9. The MMIO regs should be enabled only when the VGA aperture has reached a graphics mode (0xA000). This fixes NT 3.x mach drivers in true color mode and making Win3.1 drivers working without a hitch at the same time. 10. Actually implement the hardware 4bpp cursor properly on Mach32. 11. Cosmetic cleanups.
2025-04-22 21:15:05 +02:00
dev->pitch = 1024;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
dev->ext_crt_pitch = 0x80;
dev->accel_bpp = 8;
dev->rowoffset = 0x80;
More fixes to the 8514/A compatible side. 1. Use proper identification to what chips use what. 2. Apply some mode switch fixes to the ATI 8514/A Ultra and make 1024x768 87Hz interlaced the default mode if htotal is 0 and on ati8514_init. 3. Add the undocumented ports to the ATI 8514/A Ultra add-on as well.
2025-03-29 20:27:20 +01:00
dev->hdisped = 0x7f;
dev->v_disp = 0x05ff;
dev->htotal = 0x9d;
dev->v_total_reg = 0x0668;
dev->v_sync_start = 0x0600;
dev->disp_cntl = 0x33;
mach->accel.clock_sel = 0x1c;
8514/A compatible changes of the day (April 2nd, 2025) 1. Aliases are aliases, period. 2. Actually make the ports using bit 15 of their range use the command FIFO. 3. Improved the special ATI command 0xc2b5 in the IBM bitblt side, fixes cursor issues in 24bpp mode using OS/2. 4. When the FIFO is empty, clear the busy and available flags. 5. Also reapply a workaround for 24bpp foreground color patterns in ATI command Scan To X command, fixes patterns in OS/2 and possibly elsewhere. 6. Accelerated HiColor mode, in the IBM passthrough mode, should always be enabled, for now, as well as the Extended ATI Mach32 8bpp mode when prompted, fixes OS/2 booting into the GUI in HiColor mode. 7. Dummy data path configuration values on direct linedraw should not trigger a pixtrans read when it's not needed, fixes possible hang ups in IBM/ATI mode when the busy flag remains enabled.
2025-04-02 21:33:26 +02:00
dev->accel.cmd_back = 1;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
io_sethandler(0x02ea, 4, ati8514_in, NULL, NULL, ati8514_out, NULL, NULL, svga);
ati8514_io_set(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->accel.cmd_type = -2;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach->mca_bus = !!(dev->type & DEVICE_MCA);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
mach->config1 = 0x08 | 0x80;
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
if (mach->mca_bus)
Changes to 8514/A compatible stuff (November 2nd, 2024) 1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled). 2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command. 3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
2024-11-02 20:50:06 +01:00
mach->config1 |= 0x04;
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
if (dev->vram_amount >= 1024)
mach->config1 |= 0x20;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
Minor ATI 8514/A Ultra add-on change of the night (February 1st, 2025) Actually make it work on NT by setting bit 0 of the read only config2 reg.
2025-02-01 22:19:55 +01:00
mach->config2 = 0x01 | 0x02;
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
dev->accel_out_fifo = ati8514_accel_out_fifo;
dev->vblank_start = ati8514_vblank_start;
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static int
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
mach8_vga_available(void)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
return rom_present(BIOS_MACH8_VGA_ROM_PATH);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
static int
mach32_isa_available(void)
{
return rom_present(BIOS_MACH32_ISA_ROM_PATH);
}
static int
mach32_vlb_available(void)
{
return rom_present(BIOS_MACH32_VLB_ROM_PATH);
}
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
static int
mach32_mca_available(void)
{
return rom_present(BIOS_MACH32_MCA_ROM_PATH);
}
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static int
mach32_pci_available(void)
{
return rom_present(BIOS_MACH32_PCI_ROM_PATH);
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_close(void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
sonarlint vid_ati_mach8.c
2023-07-30 18:33:29 -04:00
mach_t *mach = (mach_t *) priv;
svga_t *svga = &mach->svga;
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
New batch of ATI Mach8/32 changes: 1. Hopefully fixed the passthrough stuff for good and fixed typo's in the IBM 8514/A poll function about the cursor. 2. Eliminated the ibm8514_on global variable in favor of a struct variable to be consistent with XGA.
2023-08-15 00:11:56 +02:00
if (dev) {
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
free(dev->vram);
free(dev->changedvram);
Sanitized some video code to avoid #include's inside headers, and added guards to include/86box/thread.h.
2023-10-09 20:14:03 +02:00
free(dev);
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
svga_close(svga);
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
free(reset_state);
reset_state = NULL;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
free(mach);
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_speed_changed(void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_t *mach = (mach_t *) priv;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_t *svga = &mach->svga;
svga_recalctimings(svga);
}
static void
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_force_redraw(void *priv)
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
{
More sonarlint work
2023-06-09 23:46:54 -04:00
mach_t *mach = (mach_t *) priv;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
svga_t *svga = &mach->svga;
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
svga->fullchange = svga->monitor->mon_changeframecount;
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
}
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
// clang-format off
static const device_config_t mach8_config[] = {
{
More cleanups to device structs
2025-02-03 20:00:58 -05:00
.name = "memory",
.description = "Memory size",
.type = CONFIG_SELECTION,
.default_string = NULL,
.default_int = 1024,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "512 KB", .value = 512 },
{ .description = "1 MB", .value = 1024 },
{ .description = "" }
},
.bios = { { 0 } }
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
},
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
{ .name = "", .description = "", .type = CONFIG_END }
Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use.
2024-10-26 21:32:47 +02:00
};
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
static const device_config_t mach32_config[] = {
{
More cleanups to device structs
2025-02-03 20:00:58 -05:00
.name = "memory",
.description = "Memory size",
.type = CONFIG_SELECTION,
.default_string = NULL,
.default_int = 2048,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "512 KB", .value = 512 },
{ .description = "1 MB", .value = 1024 },
{ .description = "2 MB", .value = 2048 },
{ .description = "4 MB", .value = 4096 },
{ .description = "" }
},
.bios = { { 0 } }
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
},
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
{ .name = "", .description = "", .type = CONFIG_END }
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
};
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
static const device_config_t mach32_pci_config[] = {
{
More cleanups to device structs
2025-02-03 20:00:58 -05:00
.name = "ramdac",
.description = "RAMDAC type",
.type = CONFIG_SELECTION,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "ATI 68860", .value = 0 },
{ .description = "ATI 68875", .value = 1 },
{ .description = "" }
},
.bios = { { 0 } }
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
},
{
More cleanups to device structs
2025-02-03 20:00:58 -05:00
.name = "memory",
.description = "Memory size",
.type = CONFIG_SELECTION,
.default_string = NULL,
.default_int = 2048,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "512 KB", .value = 512 },
{ .description = "1 MB", .value = 1024 },
{ .description = "2 MB", .value = 2048 },
{ .description = "4 MB", .value = 4096 },
{ .description = "" }
},
.bios = { { 0 } }
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
},
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
{ .name = "", .description = "", .type = CONFIG_END }
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
};
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
// clang-format on
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
const device_t mach8_vga_isa_device = {
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.name = "ATI Mach8 (ATI Graphics Ultra) (ISA)",
ATI Mach8/32 mode changes and cleanup: 1. Cleanups and moving the mach8/32 struct to a dedicated header so that would allow for future 8514/A add-on clones (in paper). 2. Mach8/32's port 0x4ae8/9 and shadow set ports (0x5aee and 0x46ee) now account to the mode changes seriously, should fix most of the horizontal/vertical coordinates while entering GUI modes of various stuff. 3. Horizontal/Vertical window coordinates can only be modified if the display enable bit of port 0x22e8 is set as well as bit 0 of port 0x4aee, fixes most problems noted above. 4. Implemented horizontal blanking stuff a la VGA but actually for 8514/A and clones (like ATI). 5. Added some comments regarding the current situation. 6. The Mach8 was actually a 8514/A clone co-processor, not a single solution card of its own. The ATI Graphics Ultra was a single solution card that is actually a Mach8 + ATI 28800-6 in one, so renaming it accordingly. 7. Fixed garbled/distorted acceleration when device bitmap acceleration is enabled in the ATI Mach8 3.0 Win3.1 drivers.
2024-01-15 21:43:33 +01:00
.internal_name = "mach8_vga_isa",
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.flags = DEVICE_ISA,
.local = 1,
.init = mach8_init,
.close = mach_close,
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
.reset = mach_reset,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.available = mach8_vga_available,
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
.speed_changed = mach_speed_changed,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.force_redraw = mach_force_redraw,
.config = mach8_config
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
};
const device_t mach32_isa_device = {
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.name = "ATI Mach32 (ISA)",
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
.internal_name = "mach32_isa",
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.flags = DEVICE_ISA,
.local = 2,
.init = mach8_init,
.close = mach_close,
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
.reset = mach_reset,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.available = mach32_isa_available,
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
.speed_changed = mach_speed_changed,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.force_redraw = mach_force_redraw,
.config = mach32_config
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
};
const device_t mach32_vlb_device = {
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.name = "ATI Mach32 (VLB)",
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
.internal_name = "mach32_vlb",
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.flags = DEVICE_VLB,
.local = 2,
.init = mach8_init,
.close = mach_close,
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
.reset = mach_reset,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.available = mach32_vlb_available,
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
.speed_changed = mach_speed_changed,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.force_redraw = mach_force_redraw,
.config = mach32_config
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
};
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
const device_t mach32_mca_device = {
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.name = "ATI Mach32 (MCA)",
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
.internal_name = "mach32_mca",
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.flags = DEVICE_MCA,
.local = 2,
.init = mach8_init,
.close = mach_close,
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
.reset = mach_reset,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.available = mach32_mca_available,
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
.speed_changed = mach_speed_changed,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.force_redraw = mach_force_redraw,
.config = mach32_config
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
};
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
const device_t mach32_pci_device = {
Clean up .available & .poll
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.name = "ATI Mach32 (PCI)",
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
.internal_name = "mach32_pci",
Clean up .available & .poll
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.flags = DEVICE_PCI,
.local = 2,
.init = mach8_init,
.close = mach_close,
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
.reset = mach_reset,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.available = mach32_pci_available,
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
.speed_changed = mach_speed_changed,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.force_redraw = mach_force_redraw,
.config = mach32_pci_config
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
};
const device_t mach32_onboard_pci_device = {
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.name = "ATI Mach32 (PCI) On-Board",
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
.internal_name = "mach32_pci_onboard",
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.flags = DEVICE_PCI,
.local = 2 | 0x100,
.init = mach8_init,
.close = mach_close,
Vast overhaul for the Mach8/32/8514/A (March 29th, 2025) 1. Implemented the FIFO test data to pass some tests of the Mach8 POST ROM and tests (not complete yet). 2. Overhauled the mode switches again, but this time with way less hacks and more on manual instructions. 3. Use a function pointer to determine if the Mach8 type used is a VGA combo or add-on. 4. Mach32 mode tests are no longer incorrectly green (was caused by improper pixtrans parts). 5. Implemented overscan color to the Mach32 as well as the CRT offset. 6. And fixed a PCI LFB GPF issue with the Mach32 2.3 drivers on Win3.1x. 7. Implemented memory boundary for both the Mach32 SVGA and its accelerator. 8. Added undocumented ports used by the FIFO (such as ports 0x8AEE and 0xEAEE). 9. Plus resetting the device right a la s3. 10. Temporarily switched the bus type of the Mach8 to 8-bit in both MCA and ISA variants.
2025-03-29 14:42:25 +01:00
.reset = mach_reset,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.available = NULL,
Video changes: 1. The passthrough from VGA to 8514/A and/or 8514/A to VGA no longer relies on hackish places where to switch from/to, instead, relying on port 0x3c3 of VGA doing so (though the Mach8/32 still needs some places where to manually switch from/to, mainly the MCA one when configuring the EEPROM). 2. Implemented the MCA behalf of the Mach32 and its corresponding reset function. 3. Properly implemented (more or less) true color, including 24-bit BGR rendering 4. Other fixes such as color patterns and mono patterns being more correct than before in various operating systems and in 24-bit true color. 5. Implemented the onboard Mach32 video of the IBM PS/ValuePoint P60 machine. 6. Made the onboard internal video detect when it's 8514/A compatible or not (CGA/EGA/MDA/VGA/etc.). If the former is selected, then the video monitor flag is used instead (for QT). 7. The TGUI9400 and 9440, if on VLB, now detect the right amount of memory if on 2MB. 8. Initial implementation of the ATI 68875 ramdac used by the Mach32 and made the ATI 68860 8514/A aware when selected with the Mach32AX PCI. 9. Separated the 8514/A ramdac ports from the VGA ramdac ports, allowing seamless transition from/to 8514/A/VGA. 10. Fixed a hdisp problem in the ET4000/W32 cards, where it was doubling the horizontal display in 15bpp+ graphics mode. 11. Removed the 0x3da/0x3ba port hack that was on the Mach8/32 code, relying on the (S)VGA core instead. 12. Reworked and simplified the TGUI9440 pitch register based on logging due to no documentation at all.
2023-08-12 00:00:46 +02:00
.speed_changed = mach_speed_changed,
Clean up .available & .poll
2025-01-07 01:12:42 -05:00
.force_redraw = mach_force_redraw,
.config = mach32_pci_config
Video features and fixes: Added the Mach8 and Mach32 ISA/VLB/PCI cards (initial implementation and MCA coming soon for the Mach32) and their corresponding EEPROM's. Added INMOS XGA ISA card and updated the SVGA core to reflect its mapping as well as the Mach8/32 mapping when in 8514 monitor mode. Mark the XGA button as already checked and locked when a standalone XGA BIOS card is present like the INMOS one. (QT only) Same concept as above, but applies to the Mach8 and 32 for the 8514 option as well. (QT only)
2023-07-14 23:38:04 +02:00
};
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