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Merge branch '86Box:master' into nec-v20

Browse Source
This commit is contained in:
Jasmine Iwanek
2022-03-13 05:30:23 -04:00
committed by GitHub
parent 524a02c4bd f39f239c05
commit 02c804a2a3
38 changed files with 582 additions and 334 deletions
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6
src/chipset/ali1543.c
View File

@@ -1465,7 +1465,7 @@ ali1533_sio_write(uint16_t addr, uint8_t val, void *priv)
ali1543_t *dev = (ali1543_t *)priv;
switch (addr) {
case 0x3f0:
case FDC_PRIMARY_ADDR:
dev->sio_index = val;
if (dev->sio_index == 0x51)
dev->in_configuration_mode = 1;
@@ -1501,7 +1501,7 @@ ali1533_sio_write(uint16_t addr, uint8_t val, void *priv)
break;
}
if ((!dev->in_configuration_mode) && (dev->sio_regs[0x07] <= 7) && (addr == 0x03f0))
if ((!dev->in_configuration_mode) && (dev->sio_regs[0x07] <= 7) && (addr == FDC_PRIMARY_ADDR))
ali1533_sio_ldn(dev->sio_regs[0x07], dev);
}
@@ -1686,7 +1686,7 @@ ali1543_init(const device_t *info)
dev->usb_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, ali5237_read, ali5237_write, dev);
/* Ports 3F0-1h: M1543 Super I/O */
io_sethandler(0x03f0, 0x0002, ali1533_sio_read, NULL, NULL, ali1533_sio_write, NULL, NULL, dev);
io_sethandler(FDC_PRIMARY_ADDR, 0x0002, ali1533_sio_read, NULL, NULL, ali1533_sio_write, NULL, NULL, dev);
/* ACPI */
dev->acpi = device_add(&acpi_ali_device);

2
src/chipset/wd76c10.c
View File

@@ -172,7 +172,7 @@ static void wd76c10_disk_chip_select(wd76c10_t *dev)
fdc_remove(dev->fdc_controller);
if (!(dev->disk_chip_select & 2))
fdc_set_base(dev->fdc_controller, !(dev->disk_chip_select & 0x0010) ? 0x3f0 : 0x370);
fdc_set_base(dev->fdc_controller, !(dev->disk_chip_select & 0x0010) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR);
}
static void wd76c10_shadow_recalc(wd76c10_t *dev)

11
src/config.c
View File

@@ -2106,13 +2106,16 @@ config_load(void)
video_fullscreen_first = 1;
time_sync = TIME_SYNC_ENABLED;
hdc_current = hdc_get_from_internal_name("none");
serial_enabled[0] = 1;
serial_enabled[1] = 1;
serial_enabled[2] = 0;
serial_enabled[3] = 0;
for (i = 2 ; i < SERIAL_MAX; i++)
serial_enabled[i] = 0;
lpt_ports[0].enabled = 1;
lpt_ports[1].enabled = 0;
lpt_ports[2].enabled = 0;
for (i = 1 ; i < PARALLEL_MAX; i++)
lpt_ports[i].enabled = 0;
for (i = 0; i < FDD_NUM; i++) {
if (i < 2)
fdd_set_type(i, 2);

10
src/device/serial.c
View File

@@ -685,13 +685,13 @@ serial_init(const device_t *info)
dev->sd->serial = dev;
serial_reset_port(dev);
if (next_inst == 3)
serial_setup(dev, SERIAL4_ADDR, SERIAL4_IRQ);
serial_setup(dev, COM4_ADDR, COM4_IRQ);
else if (next_inst == 2)
serial_setup(dev, SERIAL3_ADDR, SERIAL3_IRQ);
serial_setup(dev, COM3_ADDR, COM3_IRQ);
else if ((next_inst == 1) || (info->flags & DEVICE_PCJR))
serial_setup(dev, SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(dev, COM2_ADDR, COM2_IRQ);
else if (next_inst == 0)
serial_setup(dev, SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(dev, COM1_ADDR, COM1_IRQ);
/* Default to 1200,N,7. */
dev->dlab = 96;
@@ -717,7 +717,7 @@ serial_set_next_inst(int ni)
void
serial_standalone_init(void) {
for ( ; next_inst < 4; )
for ( ; next_inst < SERIAL_MAX; )
device_add_inst(&ns8250_device, next_inst + 1);
};

311
src/game/gameport.c
View File

@@ -80,7 +80,7 @@ static const joystick_if_t joystick_none = {
static const struct {
const joystick_if_t *joystick;
} joysticks[] = {
{ &joystick_none },
{ &joystick_none },
{ &joystick_2axis_2button },
{ &joystick_2axis_4button },
{ &joystick_2axis_6button },
@@ -89,9 +89,9 @@ static const struct {
{ &joystick_3axis_4button },
{ &joystick_4axis_4button },
{ &joystick_ch_flightstick_pro },
{ &joystick_sw_pad },
{ &joystick_tm_fcs },
{ NULL }
{ &joystick_sw_pad },
{ &joystick_tm_fcs },
{ NULL }
};
static joystick_instance_t *joystick_instance = NULL;
@@ -418,6 +418,47 @@ gameport_init(const device_t *info)
return dev;
}
static void *
tmacm_init(const device_t *info)
{
uint16_t port = 0x0000;
port = device_get_config_hex16("port1_addr");
switch(port) {
case 0x201:
gameport_add(&gameport_201_device);
break;
case 0x203:
gameport_add(&gameport_203_device);
break;
case 0x205:
gameport_add(&gameport_205_device);
break;
case 0x207:
gameport_add(&gameport_207_device);
break;
default:
break;
}
port = device_get_config_hex16("port2_addr");
switch(port) {
case 0x201:
gameport_add(&gameport_209_device);
break;
case 0x203:
gameport_add(&gameport_20b_device);
break;
case 0x205:
gameport_add(&gameport_20d_device);
break;
case 0x207:
gameport_add(&gameport_20f_device);
break;
default:
break;
}
}
static void
gameport_close(void *priv)
@@ -439,71 +480,235 @@ gameport_close(void *priv)
}
const device_t gameport_device = {
"Game port",
"gameport",
0, 0x080200,
gameport_init,
gameport_close,
NULL, { NULL }, NULL,
NULL
.name = "Game port",
.internal_name = "gameport",
.flags = 0,
.local = 0x080200,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_201_device = {
"Game port (Port 201h only)",
"gameport_201",
0, 0x010201,
gameport_init,
gameport_close,
NULL, { NULL }, NULL,
NULL
.name = "Game port (Port 201h only)",
.internal_name = "gameport_201",
.flags = 0,
.local = 0x010201,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_203_device = {
.name = "Game port (Port 203h only)",
.internal_name = "gameport_203",
.flags = 0,
.local = 0x010203,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_205_device = {
.name = "Game port (Port 205h only)",
.internal_name = "gameport_205",
.flags = 0,
.local = 0x010205,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_207_device = {
.name = "Game port (Port 207h only)",
.internal_name = "gameport_207",
.flags = 0,
.local = 0x010207,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_208_device = {
"Game port (Port 208h-20fh)",
"gameport_208",
0, 0x080208,
gameport_init,
gameport_close,
NULL, { NULL }, NULL,
NULL
.name = "Game port (Port 208h-20fh)",
.internal_name = "gameport_208",
.flags = 0,
.local = 0x080208,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_209_device = {
"Game port (Port 209h only)",
"gameport_209",
0, 0x010209,
gameport_init,
gameport_close,
NULL, { NULL }, NULL,
NULL
.name = "Game port (Port 209h only)",
.internal_name = "gameport_209",
.flags = 0,
.local = 0x010209,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_20b_device = {
.name = "Game port (Port 20Bh only)",
.internal_name = "gameport_20b",
.flags = 0,
.local = 0x01020B,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_20d_device = {
.name = "Game port (Port 20Dh only)",
.internal_name = "gameport_20d",
.flags = 0,
.local = 0x01020D,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_20f_device = {
.name = "Game port (Port 20Fh only)",
.internal_name = "gameport_20f",
.flags = 0,
.local = 0x01020F,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
static const device_config_t tmacm_config[] = {
{
.name = "port1_addr",
.description = "Port 1 Address",
.type = CONFIG_HEX16,
.default_string = "",
.default_int = 0x0201,
.file_filter = "",
.spinner = { 0 },
.selection = {
{ .description = "201h", .value = 0x0201 },
{ .description = "203h", .value = 0x0203 },
{ .description = "205h", .value = 0x0205 },
{ .description = "207h", .value = 0x0207 },
{ .description = "Disabled", .value = 0x0000 },
{ "" }
}
},
{
.name = "port2_addr",
.description = "Port 2 Address",
.type = CONFIG_HEX16,
.default_string = "",
.default_int = 0x0209,
.file_filter = "",
.spinner = { 0 },
.selection = {
{ .description = "209h", .value = 0x0209 },
{ .description = "20Bh", .value = 0x020B },
{ .description = "20Dh", .value = 0x020D },
{ .description = "20Fh", .value = 0x020F },
{ .description = "Disabled", .value = 0x0000 },
{ "" }
}
},
{ "", "", -1 }
};
const device_t gameport_tm_acm_device = {
.name = "Game port (ThrustMaster ACM)",
.internal_name = "gameport_tmacm",
.flags = DEVICE_ISA,
.local = 0,
.init = tmacm_init,
.close = NULL,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = tmacm_config
};
const device_t gameport_pnp_device = {
"Game port (Plug and Play only)",
"gameport_pnp",
0, 0x080000,
gameport_init,
gameport_close,
NULL, { NULL }, NULL,
NULL
.name = "Game port (Plug and Play only)",
.internal_name = "gameport_pnp",
.flags = 0,
.local = 0x080000,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_pnp_6io_device = {
"Game port (Plug and Play only, 6 I/O ports)",
"gameport_pnp_6io",
0, 0x060000,
gameport_init,
gameport_close,
NULL, { NULL }, NULL,
NULL
.name = "Game port (Plug and Play only, 6 I/O ports)",
.internal_name = "gameport_pnp_6io",
.flags = 0,
.local = 0x060000,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_sio_device = {
"Game port (Super I/O)",
"gameport_sio",
0, 0x1080000,
gameport_init,
gameport_close,
NULL, { NULL }, NULL,
NULL
.name = "Game port (Super I/O)",
.internal_name = "gameport_sio",
.flags = 0,
.local = 0x1080000,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

8
src/include/86box/config.h
View File

@@ -108,12 +108,12 @@ typedef struct {
char network_host[520]; /* PCap device */
/* Ports category */
char parallel_devices[3][32]; /* LPT device names */
char parallel_devices[PARALLEL_MAX][32]; /* LPT device names */
#ifdef USE_SERIAL_DEVICES
char serial_devices[4][32]; /* Serial device names */
char serial_devices[SERIAL_MAX][32]; /* Serial device names */
#endif
int serial_enabled[4], /* Serial ports 1 and 2 enabled */
parallel_enabled[3]; /* LPT1, LPT2, LPT3 enabled */
int serial_enabled[SERIAL_MAX], /* Serial ports 1, 2, 3, 4 enabled */
parallel_enabled[PARALLEL_MAX]; /* LPT1, LPT2, LPT3, LPT4 enabled */
/* Other peripherals category */
int fdc_type, /* Floppy disk controller type */

7
src/include/86box/gameport.h
View File

@@ -109,8 +109,15 @@ extern "C" {
#ifdef EMU_DEVICE_H
extern const device_t gameport_device;
extern const device_t gameport_201_device;
extern const device_t gameport_203_device;
extern const device_t gameport_205_device;
extern const device_t gameport_207_device;
extern const device_t gameport_208_device;
extern const device_t gameport_209_device;
extern const device_t gameport_20b_device;
extern const device_t gameport_20d_device;
extern const device_t gameport_20f_device;
extern const device_t gameport_tm_acm_device;
extern const device_t gameport_pnp_device;
extern const device_t gameport_pnp_6io_device;
extern const device_t gameport_sio_device;

12
src/include/86box/hdc_ide.h
View File

@@ -19,6 +19,18 @@
#ifndef EMU_IDE_H
# define EMU_IDE_H
#define HDC_PRIMARY_BASE 0x01F0
#define HDC_PRIMARY_SIDE 0x03F6
#define HDC_PRIMARY_IRQ 14
#define HDC_SECONDARY_BASE 0x0170
#define HDC_SECONDARY_SIDE 0x0376
#define HDC_SECONDARY_IRQ 15
#define HDC_TERTIARY_BASE 0x0168
#define HDC_TERTIARY_SIDE 0x036E
#define HDC_TERTIARY_IRQ 10
#define HDC_QUATERNARY_BASE 0x01E8
#define HDC_QUATERNARY_SIDE 0x03EE
#define HDC_QUATERNARY_IRQ 11
enum
{

16
src/include/86box/lpt.h
View File

@@ -1,6 +1,22 @@
#ifndef EMU_LPT_H
# define EMU_LPT_H
#define LPT1_ADDR 0x0378
#define LPT1_IRQ 7
#define LPT2_ADDR 0x0278
#define LPT2_IRQ 5
// LPT 1 on machines when installed
#define LPT_MDA_ADDR 0x03bc
#define LPT_MDA_IRQ 7
#define LPT4_ADDR 0x0268
#define LPT4_IRQ 5
/*
#define LPT5_ADDR 0x027c
#define LPT5_IRQ 7
#define LPT6_ADDR 0x026c
#define LPT6_IRQ 5
*/
typedef struct
{
const char *name;

16
src/include/86box/serial.h
View File

@@ -35,14 +35,14 @@
#define SERIAL_FIFO_SIZE 16
/* Default settings for the standard ports. */
#define SERIAL1_ADDR 0x03f8
#define SERIAL1_IRQ 4
#define SERIAL2_ADDR 0x02f8
#define SERIAL2_IRQ 3
#define SERIAL3_ADDR 0x03e8
#define SERIAL3_IRQ 4
#define SERIAL4_ADDR 0x02e8
#define SERIAL4_IRQ 3
#define COM1_ADDR 0x03f8
#define COM1_IRQ 4
#define COM2_ADDR 0x02f8
#define COM2_IRQ 3
#define COM3_ADDR 0x03e8
#define COM3_IRQ 4
#define COM4_ADDR 0x02e8
#define COM4_IRQ 3
struct serial_device_s;

4
src/lpt.c
View File

@@ -177,8 +177,8 @@ void
lpt_init(void)
{
int i;
uint16_t default_ports[PARALLEL_MAX] = { 0x378, 0x278, 0x3bc, 0x268 }; /*, 0x27c, 0x26c }; */
uint8_t default_irqs[PARALLEL_MAX] = { 7, 5, 7, 5 }; /* , 7, 5 }; */
uint16_t default_ports[PARALLEL_MAX] = { LPT1_ADDR, LPT2_ADDR, LPT_MDA_ADDR, LPT4_ADDR };
uint8_t default_irqs[PARALLEL_MAX] = { LPT1_IRQ, LPT2_IRQ, LPT_MDA_IRQ, LPT4_IRQ };
for (i = 0; i < PARALLEL_MAX; i++) {
lpt_ports[i].addr = 0xffff;

10
src/machine/m_at_commodore.c
View File

@@ -65,22 +65,22 @@ cbm_io_write(uint16_t port, uint8_t val, void *p)
switch (val & 3) {
case 1:
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
break;
case 2:
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
break;
case 3:
lpt1_init(0x278);
lpt1_init(LPT2_ADDR);
break;
}
switch (val & 0xc) {
case 0x4:
serial_setup(cmd_uart, 0x2f8, 3);
serial_setup(cmd_uart, COM2_ADDR, COM2_IRQ);
break;
case 0x8:
serial_setup(cmd_uart, 0x3f8, 4);
serial_setup(cmd_uart, COM1_ADDR, COM1_IRQ);
break;
}
}

12
src/machine/m_ps1.c
View File

@@ -145,21 +145,21 @@ ps1_write(uint16_t port, uint8_t val, void *priv)
serial_remove(ps->uart);
if (val & 0x04) {
if (val & 0x08)
serial_setup(ps->uart, SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(ps->uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps->uart, SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(ps->uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10) {
switch ((val >> 5) & 3)
{
case 0:
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(0x278);
lpt1_init(LPT2_ADDR);
break;
}
}
@@ -270,7 +270,7 @@ ps1_setup(int model)
ps->uart = device_add_inst(&ns16450_device, 1);
lpt1_remove();
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
mem_remap_top(384);

12
src/machine/m_ps2_isa.c
View File

@@ -90,21 +90,21 @@ static void ps2_write(uint16_t port, uint8_t val, void *p)
serial_remove(ps2_uart);
if (val & 0x04) {
if (val & 0x08)
serial_setup(ps2_uart, SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(ps2_uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps2_uart, SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(ps2_uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10) {
switch ((val >> 5) & 3)
{
case 0:
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(0x278);
lpt1_init(LPT2_ADDR);
break;
}
}
@@ -159,7 +159,7 @@ static void ps2board_init(void)
ps2_uart = device_add_inst(&ns16450_device, 1);
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
memset(&ps2_hd, 0, sizeof(ps2_hd));
}

42
src/machine/m_ps2_mca.c
View File

@@ -359,22 +359,22 @@ static void model_50_write(uint16_t port, uint8_t val)
if (val & 0x04)
{
if (val & 0x08)
serial_setup(ps2.uart, SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps2.uart, SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10)
{
switch ((val >> 5) & 3)
{
case 0:
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(0x278);
lpt1_init(LPT2_ADDR);
break;
}
}
@@ -492,22 +492,22 @@ static void model_55sx_write(uint16_t port, uint8_t val)
if (val & 0x04)
{
if (val & 0x08)
serial_setup(ps2.uart, SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps2.uart, SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10)
{
switch ((val >> 5) & 3)
{
case 0:
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(0x278);
lpt1_init(LPT2_ADDR);
break;
}
}
@@ -552,22 +552,22 @@ static void model_70_type3_write(uint16_t port, uint8_t val)
if (val & 0x04)
{
if (val & 0x08)
serial_setup(ps2.uart, SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps2.uart, SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10)
{
switch ((val >> 5) & 3)
{
case 0:
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(0x278);
lpt1_init(LPT2_ADDR);
break;
}
}
@@ -608,22 +608,22 @@ static void model_80_write(uint16_t port, uint8_t val)
if (val & 0x04)
{
if (val & 0x08)
serial_setup(ps2.uart, SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(ps2.uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps2.uart, SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(ps2.uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10)
{
switch ((val >> 5) & 3)
{
case 0:
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(0x278);
lpt1_init(LPT2_ADDR);
break;
}
}
@@ -832,7 +832,7 @@ static void ps2_mca_board_common_init()
ps2.setup = 0xff;
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
}
static uint8_t ps2_mem_expansion_read(int port, void *p)

4
src/machine/m_xt_compaq.c
View File

@@ -59,7 +59,7 @@ machine_xt_compaq_deskpro_init(const machine_t *model)
standalone_gameport_type = &gameport_device;
lpt1_remove();
lpt1_init(0x03bc);
lpt1_init(LPT_MDA_ADDR);
return ret;
}
@@ -88,7 +88,7 @@ machine_xt_compaq_portable_init(const machine_t *model)
device_add(&gameport_device);
lpt1_remove();
lpt1_init(0x03bc);
lpt1_init(LPT_MDA_ADDR);
return ret;
}

6
src/qt/qt_opengloptions.cpp
View File

@@ -14,6 +14,7 @@
* Copyright 2022 Teemu Korhonen
*/
#include <QByteArray>
#include <QFile>
#include <QRegularExpression>
#include <QStringBuilder>
@@ -89,7 +90,7 @@ OpenGLOptions::save() const
auto path = m_shaders.first().path().toLocal8Bit();
if (!path.isEmpty())
strcpy(video_shader, path.constData());
qstrncpy(video_shader, path.constData(), sizeof(video_shader));
else
video_shader[0] = '\0';
}
@@ -144,6 +145,9 @@ OpenGLOptions::addShader(const QString &path)
shader_file.close();
/* Remove parameter lines */
shader_text.remove(QRegularExpression("^\\s*#pragma parameter.*?\\n", QRegularExpression::MultilineOption));
QRegularExpression version("^\\s*(#version\\s+\\w+)", QRegularExpression::MultilineOption);
auto match = version.match(shader_text);

16
src/scsi/scsi_aha154x.c
View File

@@ -197,7 +197,7 @@ aha154x_eeprom(x54x_t *dev, uint8_t cmd,uint8_t arg,uint8_t len,uint8_t off,uint
if (dev->type == AHA_154xCF) {
if (dev->fdc_address > 0) {
fdc_remove(dev->fdc);
fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
}
}
@@ -901,7 +901,7 @@ aha_initnvr(x54x_t *dev)
/* Initialize the on-board EEPROM. */
dev->nvr[0] = dev->HostID; /* SCSI ID 7 */
dev->nvr[0] |= (0x10 | 0x20 | 0x40);
if (dev->fdc_address == 0x370)
if (dev->fdc_address == FDC_SECONDARY_ADDR)
dev->nvr[0] |= EE0_ALTFLOP;
dev->nvr[1] = dev->Irq-9; /* IRQ15 */
dev->nvr[1] |= (dev->DmaChannel<<4); /* DMA6 */
@@ -939,7 +939,7 @@ aha_setnvr(x54x_t *dev)
if (dev->type == AHA_154xCF) {
if (dev->fdc_address > 0) {
fdc_remove(dev->fdc);
fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (dev->nvr[0] & EE0_ALTFLOP) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
}
}
@@ -1305,12 +1305,12 @@ static const device_config_t aha_154xcf_config[] = {
},
},
{
"fdc_addr", "FDC address", CONFIG_HEX16, "", 0, "", { 0 },
"fdc_addr", "FDC address", CONFIG_HEX16, "", 0, "", { 0 },
{
{ "None", 0 },
{ "0x3f0", 0x3f0 },
{ "0x370", 0x370 },
{ "" }
{ "None", 0 },
{ "0x3f0", FDC_PRIMARY_ADDR },
{ "0x370", FDC_SECONDARY_ADDR },
{ "" }
},
},
{

26
src/sio/sio_82091aa.c
View File

@@ -6,7 +6,7 @@
*
* This file is part of the 86Box distribution.
*
* Emulation of the Intel 82019AA Super I/O chip.
* Emulation of the Intel 82091AA Super I/O chip.
*
*
*
@@ -49,26 +49,26 @@ fdc_handler(i82091aa_t *dev)
{
fdc_remove(dev->fdc);
if (dev->regs[0x10] & 0x01)
fdc_set_base(dev->fdc, (dev->regs[0x10] & 0x02) ? 0x0370 : 0x03f0);
fdc_set_base(dev->fdc, (dev->regs[0x10] & 0x02) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
static void
lpt1_handler(i82091aa_t *dev)
{
uint16_t lpt_port = 0x378;
uint16_t lpt_port = LPT1_ADDR;
lpt1_remove();
switch ((dev->regs[0x20] >> 1) & 0x03) {
case 0x00:
lpt_port = 0x378;
lpt_port = LPT1_ADDR;
break;
case 1:
lpt_port = 0x278;
lpt_port = LPT2_ADDR;
break;
case 2:
lpt_port = 0x3bc;
lpt_port = LPT_MDA_ADDR;
break;
case 3:
lpt_port = 0x000;
@@ -78,7 +78,7 @@ lpt1_handler(i82091aa_t *dev)
if ((dev->regs[0x20] & 0x01) && lpt_port)
lpt1_init(lpt_port);
lpt1_irq((dev->regs[0x20] & 0x08) ? 7 : 5);
lpt1_irq((dev->regs[0x20] & 0x08) ? LPT1_IRQ : LPT2_IRQ);
}
@@ -86,16 +86,16 @@ static void
serial_handler(i82091aa_t *dev, int uart)
{
int reg = (0x30 + (uart << 4));
uint16_t uart_port = 0x3f8;
uint16_t uart_port = COM1_ADDR;
serial_remove(dev->uart[uart]);
switch ((dev->regs[reg] >> 1) & 0x07) {
case 0x00:
uart_port = 0x3f8;
uart_port = COM1_ADDR;
break;
case 0x01:
uart_port = 0x2f8;
uart_port = COM2_ADDR;
break;
case 0x02:
uart_port = 0x220;
@@ -107,18 +107,18 @@ serial_handler(i82091aa_t *dev, int uart)
uart_port = 0x238;
break;
case 0x05:
uart_port = 0x2e8;
uart_port = COM4_ADDR;
break;
case 0x06:
uart_port = 0x338;
break;
case 0x07:
uart_port = 0x3e8;
uart_port = COM3_ADDR;
break;
}
if (dev->regs[reg] & 0x01)
serial_setup(dev->uart[uart], uart_port, (dev->regs[reg] & 0x10) ? 4 : 3);
serial_setup(dev->uart[uart], uart_port, (dev->regs[reg] & 0x10) ? COM1_IRQ : COM2_IRQ);
}

10
src/sio/sio_acc3221.c
View File

@@ -400,7 +400,7 @@ acc3221_write(uint16_t addr, uint8_t val, void *p)
if ((old ^ val) & REG_FB_FDC_DISABLE) {
fdc_remove(dev->fdc);
if (!(dev->regs[0xfb] & REG_FB_FDC_DISABLE))
fdc_set_base(dev->fdc, 0x03f0);
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}
break;
@@ -435,14 +435,14 @@ static void
acc3221_reset(acc3221_t *dev)
{
serial_remove(dev->uart[0]);
serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ);
serial_remove(dev->uart[1]);
serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
lpt1_remove();
lpt1_init(0x378);
lpt1_irq(7);
lpt1_init(LPT1_ADDR);
lpt1_irq(LPT1_IRQ);
fdc_reset(dev->fdc);
}

4
src/sio/sio_detect.c
View File

@@ -92,13 +92,13 @@ sio_detect_init(const device_t *info)
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x0279, 0x0001,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x0370, 0x0002,
io_sethandler(FDC_SECONDARY_ADDR, 0x0002,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x0398, 0x0002,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x03e3, 0x0001,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x03f0, 0x0002,
io_sethandler(FDC_PRIMARY_ADDR, 0x0002,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);
io_sethandler(0x0a79, 0x0001,
sio_detect_read, NULL, NULL, sio_detect_write, NULL, NULL, dev);

30
src/sio/sio_f82c710.c
View File

@@ -81,26 +81,26 @@ f82c710_update_ports(upc_t *dev, int set)
if (dev->regs[0] & 4) {
com_addr = dev->regs[4] * 4;
if (com_addr == SERIAL1_ADDR)
serial_setup(dev->uart[0], com_addr, 4);
else if (com_addr == SERIAL2_ADDR)
serial_setup(dev->uart[1], com_addr, 3);
if (com_addr == COM1_ADDR)
serial_setup(dev->uart[0], com_addr, COM1_IRQ);
else if (com_addr == COM2_ADDR)
serial_setup(dev->uart[1], com_addr, COM2_IRQ);
}
if (dev->regs[0] & 8) {
lpt_addr = dev->regs[6] * 4;
lpt1_init(lpt_addr);
if ((lpt_addr == 0x378) || (lpt_addr == 0x3bc))
lpt1_irq(7);
else if (lpt_addr == 0x278)
lpt1_irq(5);
if ((lpt_addr == LPT1_ADDR) || (lpt_addr == LPT_MDA_ADDR))
lpt1_irq(LPT1_IRQ);
else if (lpt_addr == LPT2_ADDR)
lpt1_irq(LPT2_IRQ);
}
if (dev->regs[12] & 0x80)
ide_pri_enable();
if (dev->regs[12] & 0x20)
fdc_set_base(dev->fdc, 0x03f0);
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}
@@ -127,26 +127,26 @@ f82c606_update_ports(upc_t *dev, int set)
switch (dev->regs[8] & 0xc0) {
case 0x40: nvr_int = 3; break;
case 0x80: uart1_int = 3; break;
case 0xc0: uart2_int = 3; break;
case 0x80: uart1_int = COM2_IRQ; break;
case 0xc0: uart2_int = COM2_IRQ; break;
}
switch (dev->regs[8] & 0x30) {
case 0x10: nvr_int = 4; break;
case 0x20: uart1_int = 4; break;
case 0x30: uart2_int = 4; break;
case 0x20: uart1_int = COM1_IRQ; break;
case 0x30: uart2_int = COM1_IRQ; break;
}
switch (dev->regs[8] & 0x0c) {
case 0x04: nvr_int = 5; break;
case 0x08: uart1_int = 5; break;
case 0x0c: lpt1_int = 5; break;
case 0x0c: lpt1_int = LPT2_IRQ; break;
}
switch (dev->regs[8] & 0x03) {
case 0x01: nvr_int = 7; break;
case 0x02: uart2_int = 7; break;
case 0x03: lpt1_int = 7; break;
case 0x03: lpt1_int = LPT1_IRQ; break;
}
if (dev->regs[0] & 1) {

24
src/sio/sio_fdc37c669.c
View File

@@ -246,10 +246,10 @@ static void
fdc37c669_reset(fdc37c669_t *dev)
{
serial_remove(dev->uart[0]);
serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ);
serial_remove(dev->uart[1]);
serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
memset(dev->regs, 0, 42);
dev->regs[0x00] = 0x28;
@@ -260,27 +260,27 @@ fdc37c669_reset(fdc37c669_t *dev)
dev->regs[0x0d] = 0x03;
dev->regs[0x0e] = 0x02;
dev->regs[0x1e] = 0x80; /* Gameport controller. */
dev->regs[0x20] = (0x3f0 >> 2) & 0xfc;
dev->regs[0x20] = (FDC_PRIMARY_ADDR >> 2) & 0xfc;
dev->regs[0x21] = (0x1f0 >> 2) & 0xfc;
dev->regs[0x22] = ((0x3f6 >> 2) & 0xfc) | 1;
if (dev->id == 1) {
dev->regs[0x23] = (0x278 >> 2);
dev->regs[0x23] = (LPT2_ADDR >> 2);
lpt2_remove();
lpt2_init(0x278);
lpt2_init(LPT2_ADDR);
dev->regs[0x24] = (SERIAL3_ADDR >> 2) & 0xfe;
dev->regs[0x25] = (SERIAL4_ADDR >> 2) & 0xfe;
dev->regs[0x24] = (COM3_ADDR >> 2) & 0xfe;
dev->regs[0x25] = (COM4_ADDR >> 2) & 0xfe;
} else {
fdc_reset(dev->fdc);
lpt1_remove();
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
dev->regs[0x23] = (0x378 >> 2);
dev->regs[0x23] = (LPT1_ADDR >> 2);
dev->regs[0x24] = (SERIAL1_ADDR >> 2) & 0xfe;
dev->regs[0x25] = (SERIAL2_ADDR >> 2) & 0xfe;
dev->regs[0x24] = (COM1_ADDR >> 2) & 0xfe;
dev->regs[0x25] = (COM2_ADDR >> 2) & 0xfe;
}
dev->regs[0x26] = (2 << 4) | 3;
dev->regs[0x27] = (6 << 4) | (dev->id ? 5 : 7);
@@ -316,7 +316,7 @@ fdc37c669_init(const device_t *info)
dev->uart[0] = device_add_inst(&ns16550_device, (next_id << 1) + 1);
dev->uart[1] = device_add_inst(&ns16550_device, (next_id << 1) + 2);
io_sethandler(info->local ? 0x370 : (next_id ? 0x370 : 0x3f0), 0x0002,
io_sethandler(info->local ? FDC_SECONDARY_ADDR : (next_id ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR), 0x0002,
fdc37c669_read, NULL, NULL, fdc37c669_write, NULL, NULL, dev);
fdc37c669_reset(dev);

8
src/sio/sio_fdc37c67x.c
View File

@@ -530,7 +530,7 @@ fdc37c67x_reset(fdc37c67x_t *dev)
dev->ld_regs[4][0x61] = 0xf8;
dev->ld_regs[4][0x70] = 4;
dev->ld_regs[4][0xf0] = 3;
serial_setup(dev->uart[0], 0x3f8, dev->ld_regs[4][0x70]);
serial_setup(dev->uart[0], COM1_ADDR, dev->ld_regs[4][0x70]);
/* Logical device 5: Serial Port 2 */
dev->ld_regs[5][0x30] = 1;
@@ -540,7 +540,7 @@ fdc37c67x_reset(fdc37c67x_t *dev)
dev->ld_regs[5][0x74] = 4;
dev->ld_regs[5][0xf1] = 2;
dev->ld_regs[5][0xf2] = 3;
serial_setup(dev->uart[1], 0x2f8, dev->ld_regs[5][0x70]);
serial_setup(dev->uart[1], COM2_ADDR, dev->ld_regs[5][0x70]);
/* Logical device 7: Keyboard */
dev->ld_regs[7][0x30] = 1;
@@ -594,9 +594,9 @@ fdc37c67x_init(const device_t *info)
fdc37c67x_reset(dev);
io_sethandler(0x370, 0x0002,
io_sethandler(FDC_SECONDARY_ADDR, 0x0002,
fdc37c67x_read, NULL, NULL, fdc37c67x_write, NULL, NULL, dev);
io_sethandler(0x3f0, 0x0002,
io_sethandler(FDC_PRIMARY_ADDR, 0x0002,
fdc37c67x_read, NULL, NULL, fdc37c67x_write, NULL, NULL, dev);
return dev;

34
src/sio/sio_fdc37c6xx.c
View File

@@ -56,11 +56,11 @@ set_com34_addr(fdc37c6xx_t *dev)
dev->com4_addr = 0x238;
break;
case 0x20:
dev->com3_addr = 0x3e8;
dev->com4_addr = 0x2e8;
dev->com3_addr = COM3_ADDR;
dev->com4_addr = COM4_ADDR;
break;
case 0x40:
dev->com3_addr = 0x3e8;
dev->com3_addr = COM3_ADDR;
dev->com4_addr = 0x2e0;
break;
case 0x60:
@@ -84,16 +84,16 @@ set_serial_addr(fdc37c6xx_t *dev, int port)
if (dev->regs[2] & (4 << shift)) {
switch ((dev->regs[2] >> shift) & 3) {
case 0:
serial_setup(dev->uart[port], SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(dev->uart[port], COM1_ADDR, COM1_IRQ);
break;
case 1:
serial_setup(dev->uart[port], SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(dev->uart[port], COM2_ADDR, COM2_IRQ);
break;
case 2:
serial_setup(dev->uart[port], dev->com3_addr, 4);
serial_setup(dev->uart[port], dev->com3_addr, COM3_IRQ);
break;
case 3:
serial_setup(dev->uart[port], dev->com4_addr, 3);
serial_setup(dev->uart[port], dev->com4_addr, COM4_IRQ);
break;
}
}
@@ -108,15 +108,15 @@ lpt1_handler(fdc37c6xx_t *dev)
lpt1_remove();
switch (dev->regs[1] & 3) {
case 1:
lpt1_init(0x3bc);
lpt1_init(LPT_MDA_ADDR);
lpt1_irq(7);
break;
case 2:
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
lpt1_irq(7 /*5*/);
break;
case 3:
lpt1_init(0x278);
lpt1_init(LPT2_ADDR);
lpt1_irq(7 /*5*/);
break;
}
@@ -128,7 +128,7 @@ fdc_handler(fdc37c6xx_t *dev)
{
fdc_remove(dev->fdc);
if (dev->regs[0] & 0x10)
fdc_set_base(dev->fdc, (dev->regs[5] & 0x01) ? 0x0370 : 0x03f0);
fdc_set_base(dev->fdc, (dev->regs[5] & 0x01) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
@@ -160,7 +160,7 @@ fdc37c6xx_write(uint16_t port, uint8_t val, void *priv)
uint8_t valxor = 0;
if (dev->tries == 2) {
if (port == 0x3f0) {
if (port == FDC_PRIMARY_ADDR) {
if (val == 0xaa)
dev->tries = 0;
else
@@ -216,7 +216,7 @@ fdc37c6xx_write(uint16_t port, uint8_t val, void *priv)
break;
}
}
} else if ((port == 0x3f0) && (val == 0x55))
} else if ((port == FDC_PRIMARY_ADDR) && (val == 0x55))
dev->tries++;
}
@@ -243,13 +243,13 @@ fdc37c6xx_reset(fdc37c6xx_t *dev)
dev->com4_addr = 0x238;
serial_remove(dev->uart[0]);
serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ);
serial_remove(dev->uart[1]);
serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
lpt1_remove();
lpt1_init(0x378);
lpt1_init(LPT1_ADDR);
fdc_reset(dev->fdc);
fdc_remove(dev->fdc);
@@ -325,7 +325,7 @@ fdc37c6xx_init(const device_t *info)
dev->uart[1] = device_add_inst(&ns16450_device, 2);
}
io_sethandler(0x03f0, 0x0002,
io_sethandler(FDC_PRIMARY_ADDR, 0x0002,
fdc37c6xx_read, NULL, NULL, fdc37c6xx_write, NULL, NULL, dev);
fdc37c6xx_reset(dev);

8
src/sio/sio_fdc37c93x.c
View File

@@ -741,7 +741,7 @@ fdc37c93x_reset(fdc37c93x_t *dev)
dev->ld_regs[4][0x61] = 0xf8;
dev->ld_regs[4][0x70] = 4;
dev->ld_regs[4][0xF0] = 3;
serial_setup(dev->uart[0], 0x3f8, dev->ld_regs[4][0x70]);
serial_setup(dev->uart[0], COM1_ADDR, dev->ld_regs[4][0x70]);
/* Logical device 5: Serial Port 2 */
dev->ld_regs[5][0x30] = 1;
@@ -751,7 +751,7 @@ fdc37c93x_reset(fdc37c93x_t *dev)
dev->ld_regs[5][0x74] = 4;
dev->ld_regs[5][0xF1] = 2;
dev->ld_regs[5][0xF2] = 3;
serial_setup(dev->uart[1], 0x2f8, dev->ld_regs[5][0x70]);
serial_setup(dev->uart[1], COM2_ADDR, dev->ld_regs[5][0x70]);
/* Logical device 6: RTC */
dev->ld_regs[6][0x30] = 1;
@@ -873,9 +873,9 @@ fdc37c93x_init(const device_t *info)
io_sethandler(0x0fb, 0x0001,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
} else {
io_sethandler(0x370, 0x0002,
io_sethandler(FDC_SECONDARY_ADDR, 0x0002,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
io_sethandler(0x3f0, 0x0002,
io_sethandler(FDC_PRIMARY_ADDR, 0x0002,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
}

4
src/sio/sio_fdc37m60x.c
View File

@@ -319,7 +319,7 @@ const device_t fdc37m60x_device = {
"SMSC FDC37M60X",
"fdc37m60x",
0,
0x03f0,
FDC_PRIMARY_ADDR,
fdc37m60x_init,
fdc37m60x_close,
NULL,
@@ -333,7 +333,7 @@ const device_t fdc37m60x_370_device = {
"SMSC FDC37M60X with 10K Pull Up Resistor",
"fdc37m60x_370",
0,
0x0370,
FDC_SECONDARY_ADDR,
fdc37m60x_init,
fdc37m60x_close,
NULL,

4
src/sio/sio_it8661f.c
View File

@@ -221,7 +221,7 @@ it8661f_write(uint16_t addr, uint8_t val, void *priv)
it8661f_t *dev = (it8661f_t *)priv;
switch (addr) {
case 0x370:
case FDC_SECONDARY_ADDR:
if (!dev->unlocked) {
(val == mb_pnp_key[dev->enumerator]) ? dev->enumerator++ : (dev->enumerator = 0);
if (dev->enumerator == 31) {
@@ -326,7 +326,7 @@ it8661f_init(const device_t *info)
dev->uart[0] = device_add_inst(&ns16550_device, 1);
dev->uart[1] = device_add_inst(&ns16550_device, 2);
io_sethandler(0x0370, 0x0002, it8661f_read, NULL, NULL, it8661f_write, NULL, NULL, dev);
io_sethandler(FDC_SECONDARY_ADDR, 0x0002, it8661f_read, NULL, NULL, it8661f_write, NULL, NULL, dev);
dev->enumerator = 0;
dev->unlocked = 0;

30
src/sio/sio_pc87306.c
View File

@@ -90,27 +90,27 @@ static void
lpt1_handler(pc87306_t *dev)
{
int temp;
uint16_t lptba, lpt_port = 0x378;
uint8_t lpt_irq = 5;
uint16_t lptba, lpt_port = LPT1_ADDR;
uint8_t lpt_irq = LPT2_IRQ;
temp = dev->regs[0x01] & 3;
lptba = ((uint16_t) dev->regs[0x19]) << 2;
switch (temp) {
case 0:
lpt_port = 0x378;
lpt_irq = (dev->regs[0x02] & 0x08) ? 7 : 5;
lpt_port = LPT1_ADDR;
lpt_irq = (dev->regs[0x02] & 0x08) ? LPT1_IRQ : LPT2_IRQ;
break;
case 1:
if (dev->regs[0x1b] & 0x40)
lpt_port = lptba;
else
lpt_port = 0x3bc;
lpt_irq = 7;
lpt_port = LPT_MDA_ADDR;
lpt_irq = LPT_MDA_IRQ;
break;
case 2:
lpt_port = 0x278;
lpt_irq = 5;
lpt_port = LPT2_ADDR;
lpt_irq = LPT2_IRQ;
break;
case 3:
lpt_port = 0x000;
@@ -149,21 +149,21 @@ serial_handler(pc87306_t *dev, int uart)
switch (temp) {
case 0:
serial_setup(dev->uart[uart], SERIAL1_ADDR, irq);
serial_setup(dev->uart[uart], COM1_ADDR, irq);
break;
case 1:
serial_setup(dev->uart[uart], SERIAL2_ADDR, irq);
serial_setup(dev->uart[uart], COM2_ADDR, irq);
break;
case 2:
switch ((dev->regs[1] >> 6) & 3) {
case 0:
serial_setup(dev->uart[uart], 0x3e8, irq);
serial_setup(dev->uart[uart], COM3_ADDR, irq);
break;
case 1:
serial_setup(dev->uart[uart], 0x338, irq);
break;
case 2:
serial_setup(dev->uart[uart], 0x2e8, irq);
serial_setup(dev->uart[uart], COM4_ADDR, irq);
break;
case 3:
serial_setup(dev->uart[uart], 0x220, irq);
@@ -173,7 +173,7 @@ serial_handler(pc87306_t *dev, int uart)
case 3:
switch ((dev->regs[1] >> 6) & 3) {
case 0:
serial_setup(dev->uart[uart], 0x2e8, irq);
serial_setup(dev->uart[uart], COM4_ADDR, irq);
break;
case 1:
serial_setup(dev->uart[uart], 0x238, irq);
@@ -242,7 +242,7 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
if (valxor & 0x28) {
fdc_remove(dev->fdc);
if ((val & 8) && !(dev->regs[2] & 1))
fdc_set_base(dev->fdc, (val & 0x20) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (val & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
break;
case 1:
@@ -277,7 +277,7 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
if (dev->regs[0] & 4)
serial_handler(dev, 1);
if (dev->regs[0] & 8)
fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
}
if (valxor & 8) {

16
src/sio/sio_pc87310.c
View File

@@ -73,8 +73,8 @@ static void
lpt1_handler(pc87310_t *dev)
{
int temp;
uint16_t lpt_port = 0x378;
uint8_t lpt_irq = 7;
uint16_t lpt_port = LPT1_ADDR;
uint8_t lpt_irq = LPT1_IRQ;
/* bits 0-1:
* 00 378h
@@ -86,13 +86,13 @@ lpt1_handler(pc87310_t *dev)
switch (temp) {
case 0:
lpt_port = 0x378;
lpt_port = LPT1_ADDR;
break;
case 1:
lpt_port = 0x3bc;
lpt_port = LPT_MDA_ADDR;
break;
case 2:
lpt_port = 0x278;
lpt_port = LPT2_ADDR;
break;
case 3:
lpt_port = 0x000;
@@ -121,10 +121,10 @@ serial_handler(pc87310_t *dev, int uart)
if (!temp){
//configure serial port as COM2
if (((dev->reg >> 4) & 1) ^ uart)
serial_setup(dev->uart[uart], 0x2f8, 3);
serial_setup(dev->uart[uart], COM2_ADDR, COM2_IRQ);
// configure serial port as COM1
else
serial_setup(dev->uart[uart], 0x3f8, 4);
serial_setup(dev->uart[uart], COM1_ADDR, COM1_IRQ);
}
}
@@ -185,7 +185,7 @@ pc87310_write(uint16_t port, uint8_t val, void *priv)
/* bit 6: 1 disable fdc */
if (!(val & 0x40)) {
pc87310_log("SIO: FDC enabled\n");
fdc_set_base(dev->fdc, 0x3f0);
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}
}
return;

38
src/sio/sio_pc87311.c
View File

@@ -119,8 +119,8 @@ pc87311_read(uint16_t addr, void *priv)
void pc87311_fdc_handler(pc87311_t *dev)
{
fdc_remove(dev->fdc_controller);
fdc_set_base(dev->fdc_controller, (FUNCTION_ENABLE & 0x20) ? 0x0370 : 0x03f0);
pc87311_log("PC87311-FDC: BASE %04x\n", (FUNCTION_ENABLE & 0x20) ? 0x0370 : 0x03f0);
fdc_set_base(dev->fdc_controller, (FUNCTION_ENABLE & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
pc87311_log("PC87311-FDC: BASE %04x\n", (FUNCTION_ENABLE & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
uint16_t com3(pc87311_t *dev)
@@ -128,15 +128,15 @@ uint16_t com3(pc87311_t *dev)
switch (COM_BA)
{
case 0:
return 0x03e8;
return COM3_ADDR;
case 1:
return 0x0338;
case 2:
return 0x02e8;
return COM4_ADDR;
case 3:
return 0x0220;
default:
return 0x03e8;
return COM3_ADDR;
}
}
@@ -145,7 +145,7 @@ uint16_t com4(pc87311_t *dev)
switch (COM_BA)
{
case 0:
return 0x02e8;
return COM4_ADDR;
case 1:
return 0x0238;
case 2:
@@ -153,7 +153,7 @@ uint16_t com4(pc87311_t *dev)
case 3:
return 0x0228;
default:
return 0x02e8;
return COM4_ADDR;
}
}
@@ -164,20 +164,20 @@ void pc87311_uart_handler(uint8_t num, pc87311_t *dev)
switch (!(num & 1) ? UART1_BA : UART2_BA)
{
case 0:
dev->base = 0x03f8;
dev->irq = 4;
dev->base = COM1_ADDR;
dev->irq = COM1_IRQ;
break;
case 1:
dev->base = 0x02f8;
dev->irq = 3;
dev->base = COM2_ADDR;
dev->irq = COM2_IRQ;
break;
case 2:
dev->base = com3(dev);
dev->irq = 4;
dev->irq = COM3_IRQ;
break;
case 3:
dev->base = com4(dev);
dev->irq = 3;
dev->irq = COM4_IRQ;
break;
}
serial_setup(dev->uart[num & 1], dev->base, dev->irq);
@@ -190,16 +190,16 @@ void pc87311_lpt_handler(pc87311_t *dev)
switch (LPT_BA)
{
case 0:
dev->base = 0x0378;
dev->irq = (POWER_TEST & 0x08) ? 7 : 5;
dev->base = LPT1_ADDR;
dev->irq = (POWER_TEST & 0x08) ? LPT1_IRQ : LPT2_IRQ;
break;
case 1:
dev->base = 0x03bc;
dev->irq = 7;
dev->base = LPT_MDA_ADDR;
dev->irq = LPT_MDA_IRQ;
break;
case 2:
dev->base = 0x0278;
dev->irq = 5;
dev->base = LPT2_ADDR;
dev->irq = LPT2_IRQ;
break;
}
lpt1_init(dev->base);

40
src/sio/sio_pc87332.c
View File

@@ -48,23 +48,23 @@ static void
lpt1_handler(pc87332_t *dev)
{
int temp;
uint16_t lpt_port = 0x378;
uint8_t lpt_irq = 5;
uint16_t lpt_port = LPT1_ADDR;
uint8_t lpt_irq = LPT2_IRQ;
temp = dev->regs[0x01] & 3;
switch (temp) {
case 0:
lpt_port = 0x378;
lpt_irq = (dev->regs[0x02] & 0x08) ? 7 : 5;
lpt_port = LPT1_ADDR;
lpt_irq = (dev->regs[0x02] & 0x08) ? LPT1_IRQ : LPT2_IRQ;
break;
case 1:
lpt_port = 0x3bc;
lpt_irq = 7;
lpt_port = LPT_MDA_ADDR;
lpt_irq = LPT_MDA_IRQ;
break;
case 2:
lpt_port = 0x278;
lpt_irq = 5;
lpt_port = LPT2_ADDR;
lpt_irq = LPT2_IRQ;
break;
case 3:
lpt_port = 0x000;
@@ -88,40 +88,40 @@ serial_handler(pc87332_t *dev, int uart)
switch (temp) {
case 0:
serial_setup(dev->uart[uart], SERIAL1_ADDR, 4);
serial_setup(dev->uart[uart], COM1_ADDR, 4);
break;
case 1:
serial_setup(dev->uart[uart], SERIAL2_ADDR, 3);
serial_setup(dev->uart[uart], COM2_ADDR, 3);
break;
case 2:
switch ((dev->regs[1] >> 6) & 3) {
case 0:
serial_setup(dev->uart[uart], 0x3e8, 4);
serial_setup(dev->uart[uart], COM3_ADDR, COM3_IRQ);
break;
case 1:
serial_setup(dev->uart[uart], 0x338, 4);
serial_setup(dev->uart[uart], 0x338, COM3_IRQ);
break;
case 2:
serial_setup(dev->uart[uart], 0x2e8, 4);
serial_setup(dev->uart[uart], COM4_ADDR, COM3_IRQ);
break;
case 3:
serial_setup(dev->uart[uart], 0x220, 4);
serial_setup(dev->uart[uart], 0x220, COM3_IRQ);
break;
}
break;
case 3:
switch ((dev->regs[1] >> 6) & 3) {
case 0:
serial_setup(dev->uart[uart], 0x2e8, 3);
serial_setup(dev->uart[uart], COM4_ADDR, COM4_IRQ);
break;
case 1:
serial_setup(dev->uart[uart], 0x238, 3);
serial_setup(dev->uart[uart], 0x238, COM4_IRQ);
break;
case 2:
serial_setup(dev->uart[uart], 0x2e0, 3);
serial_setup(dev->uart[uart], 0x2e0, COM4_IRQ);
break;
case 3:
serial_setup(dev->uart[uart], 0x228, 3);
serial_setup(dev->uart[uart], 0x228, COM4_IRQ);
break;
}
break;
@@ -195,7 +195,7 @@ pc87332_write(uint16_t port, uint8_t val, void *priv)
if (valxor & 0x28) {
fdc_remove(dev->fdc);
if ((val & 8) && !(dev->regs[2] & 1))
fdc_set_base(dev->fdc, (val & 0x20) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (val & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
if (dev->has_ide && (valxor & 0xc0))
ide_handler(dev);
@@ -232,7 +232,7 @@ pc87332_write(uint16_t port, uint8_t val, void *priv)
if (dev->regs[0] & 4)
serial_handler(dev, 1);
if (dev->regs[0] & 8)
fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? 0x370 : 0x3f0);
fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
}
if (valxor & 8) {

23
src/sio/sio_prime3b.c
View File

@@ -108,15 +108,15 @@ prime3b_write(uint16_t addr, uint8_t val, void *priv)
switch ((dev->regs[0xa4] >> 6) & 3)
{
case 0:
dev->com3_addr = 0x3e8;
dev->com4_addr = 0x2e8;
dev->com3_addr = COM3_ADDR;
dev->com4_addr = COM4_ADDR;
break;
case 1:
dev->com3_addr = 0x338;
dev->com4_addr = 0x238;
break;
case 2:
dev->com3_addr = 0x2e8;
dev->com3_addr = COM4_ADDR;
dev->com4_addr = 0x2e0;
break;
case 3:
@@ -142,7 +142,7 @@ prime3b_read(uint16_t addr, void *priv)
void prime3b_fdc_handler(prime3b_t *dev)
{
uint16_t fdc_base = !(ASR & 0x40) ? 0x3f0 : 0x370;
uint16_t fdc_base = !(ASR & 0x40) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR;
fdc_remove(dev->fdc_controller);
fdc_set_base(dev->fdc_controller, fdc_base);
prime3b_log("Prime3B-FDC: Enabled with base %03x\n", fdc_base);
@@ -154,7 +154,7 @@ void prime3b_uart_handler(uint8_t num, prime3b_t *dev)
if ((ASR >> (3 + 2 * num)) & 1)
uart_base = !((ASR >> (2 + 2 * num)) & 1) ? dev->com3_addr : dev->com4_addr;
else
uart_base = !((ASR >> (2 + 2 * num)) & 1) ? 0x3f8 : 0x2f8;
uart_base = !((ASR >> (2 + 2 * num)) & 1) ? COM1_ADDR : COM2_ADDR;
serial_remove(dev->uart[num]);
serial_setup(dev->uart[num], uart_base, 4 - num);
@@ -163,10 +163,10 @@ void prime3b_uart_handler(uint8_t num, prime3b_t *dev)
void prime3b_lpt_handler(prime3b_t *dev)
{
uint16_t lpt_base = (ASR & 2) ? 0x3bc : (!(ASR & 1) ? 0x378 : 0x278);
uint16_t lpt_base = (ASR & 2) ? LPT_MDA_ADDR : (!(ASR & 1) ? LPT1_ADDR : LPT2_ADDR);
lpt1_remove();
lpt1_init(lpt_base);
lpt1_irq(7);
lpt1_irq(LPT1_IRQ);
prime3b_log("Prime3B-LPT: Enabled with base %03x\n", lpt_base);
}
@@ -174,9 +174,10 @@ void prime3b_ide_handler(prime3b_t *dev)
{
ide_pri_disable();
uint16_t ide_base = !(ASR & 0x80) ? 0x1f0 : 0x170;
uint16_t ide_side = ide_base + 0x206;
ide_set_base(0, ide_base);
ide_set_side(0, ide_base + 0x206);
prime3b_log("Prime3B-IDE: Enabled with base %03x and side %03x\n", ide_base, ide_base + 0x206);
ide_set_side(0, ide_side);
prime3b_log("Prime3B-IDE: Enabled with base %03x and side %03x\n", ide_base, ide_side);
}
void prime3b_enable(prime3b_t *dev)
@@ -256,8 +257,8 @@ prime3b_init(const device_t *info)
if (HAS_IDE_FUNCTIONALITY)
device_add(&ide_isa_device);
dev->com3_addr = 0x3e8;
dev->com4_addr = 0x2e8;
dev->com3_addr = COM3_ADDR;
dev->com4_addr = COM4_ADDR;
fdc_reset(dev->fdc_controller);
prime3b_enable(dev);

18
src/sio/sio_um8669f.c
View File

@@ -71,21 +71,21 @@ static uint8_t um8669f_pnp_rom[] = {
static const isapnp_device_config_t um8669f_pnp_defaults[] = {
{
.activate = 1,
.io = { { .base = 0x03f0 }, },
.irq = { { .irq = 6 }, },
.dma = { { .dma = 2 }, }
.io = { { .base = FDC_PRIMARY_ADDR }, },
.irq = { { .irq = FDC_PRIMARY_IRQ }, },
.dma = { { .dma = FDC_PRIMARY_DMA }, }
}, {
.activate = 1,
.io = { { .base = 0x03f8 }, },
.irq = { { .irq = 4 }, }
.io = { { .base = COM1_ADDR }, },
.irq = { { .irq = COM1_IRQ }, }
}, {
.activate = 1,
.io = { { .base = 0x02f8 }, },
.irq = { { .irq = 3 }, }
.io = { { .base = COM2_ADDR }, },
.irq = { { .irq = COM2_IRQ }, }
}, {
.activate = 1,
.io = { { .base = 0x0378 }, },
.irq = { { .irq = 7 }, }
.io = { { .base = LPT1_ADDR }, },
.irq = { { .irq = LPT1_IRQ }, }
}, {
.activate = 0
}, {

8
src/sio/sio_vt82c686.c
View File

@@ -239,9 +239,9 @@ vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv)
break;
case 0x85:
io_removehandler(0x3f0, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
io_removehandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
if (val & 0x02)
io_sethandler(0x3f0, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
io_sethandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev);
break;
}
}
@@ -261,8 +261,8 @@ vt82c686_reset(vt82c686_t *dev)
fdc_reset(dev->fdc);
serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ);
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
vt82c686_lpt_handler(dev);
vt82c686_serial_handler(dev, 0);

46
src/sio/sio_w83787f.c
View File

@@ -125,27 +125,27 @@ w83787f_serial_handler(w83787f_t *dev, int uart)
int urs0 = !!(dev->regs[1] & (1 << uart));
int urs1 = !!(dev->regs[1] & (4 << uart));
int urs2 = !!(dev->regs[3] & (8 >> uart));
int urs, irq = 4;
uint16_t addr = 0x3f8, enable = 1;
int urs, irq = COM1_IRQ;
uint16_t addr = COM1_ADDR, enable = 1;
urs = (urs1 << 1) | urs0;
if (urs2) {
addr = uart ? 0x3f8 : 0x2f8;
irq = uart ? 4 : 3;
addr = uart ? COM1_ADDR : COM2_ADDR;
irq = uart ? COM1_IRQ : COM2_IRQ;
} else {
switch (urs) {
case 0:
addr = uart ? 0x3e8 : 0x2e8;
irq = uart ? 4 : 3;
addr = uart ? COM3_ADDR : COM4_ADDR;
irq = uart ? COM3_IRQ : COM4_IRQ;
break;
case 1:
addr = uart ? 0x2e8 : 0x3e8;
irq = uart ? 3 : 4;
addr = uart ? COM4_ADDR : COM3_ADDR;
irq = uart ? COM4_IRQ : COM3_IRQ;
break;
case 2:
addr = uart ? 0x2f8 : 0x3f8;
irq = uart ? 3 : 4;
addr = uart ? COM2_ADDR : COM1_ADDR;
irq = uart ? COM2_IRQ : COM1_IRQ;
break;
case 3:
default:
@@ -167,21 +167,21 @@ static void
w83787f_lpt_handler(w83787f_t *dev)
{
int ptras = (dev->regs[1] >> 4) & 0x03;
int irq = 7;
uint16_t addr = 0x378, enable = 1;
int irq = LPT1_IRQ;
uint16_t addr = LPT1_ADDR, enable = 1;
switch (ptras) {
case 0x00:
addr = 0x3bc;
irq = 7;
addr = LPT_MDA_ADDR;
irq = LPT_MDA_IRQ;
break;
case 0x01:
addr = 0x278;
irq = 5;
addr = LPT2_ADDR;
irq = LPT2_IRQ;
break;
case 0x02:
addr = 0x378;
irq = 7;
addr = LPT1_ADDR;
irq = LPT1_IRQ;
break;
case 0x03:
default:
@@ -205,7 +205,7 @@ w83787f_fdc_handler(w83787f_t *dev)
{
fdc_remove(dev->fdc);
if (!(dev->regs[0] & 0x20) && !(dev->regs[6] & 0x08))
fdc_set_base(dev->fdc, (dev->regs[0] & 0x10) ? 0x03f0 : 0x0370);
fdc_set_base(dev->fdc, (dev->regs[0] & 0x10) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR);
}
@@ -361,8 +361,8 @@ static void
w83787f_reset(w83787f_t *dev)
{
lpt1_remove();
lpt1_init(0x378);
lpt1_irq(7);
lpt1_init(LPT1_ADDR);
lpt1_irq(LPT1_IRQ);
memset(dev->regs, 0, 0x2A);
@@ -399,8 +399,8 @@ w83787f_reset(w83787f_t *dev)
dev->regs[0x0c] = 0x2C;
dev->regs[0x0d] = 0xA3;
serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ);
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
dev->key = 0x89;

26
src/sio/sio_w83877f.c
View File

@@ -81,9 +81,9 @@ w83877f_remap(w83877f_t *dev)
io_removehandler(0x250, 0x0002,
w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev);
io_removehandler(0x3f0, 0x0002,
io_removehandler(FDC_PRIMARY_ADDR, 0x0002,
w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev);
dev->base_address = (hefras ? 0x3f0 : 0x250);
dev->base_address = (hefras ? FDC_PRIMARY_ADDR : 0x250);
io_sethandler(dev->base_address, 0x0002,
w83877f_read, NULL, NULL, w83877f_write, NULL, NULL, dev);
dev->key_times = hefras + 1;
@@ -127,7 +127,7 @@ make_port(w83877f_t *dev, uint8_t reg)
p &= 0x3F8;
else
p &= 0x3FC;
if ((p < 0x100) || (p > 0x3FF)) p = 0x378;
if ((p < 0x100) || (p > 0x3FF)) p = LPT1_ADDR;
/* In ECP mode, A10 is active. */
if (l & 0x80)
p |= 0x400;
@@ -135,12 +135,12 @@ make_port(w83877f_t *dev, uint8_t reg)
case 0x24:
p = ((uint16_t) (dev->regs[reg] & 0xfe)) << 2;
p &= 0xFF8;
if ((p < 0x100) || (p > 0x3F8)) p = 0x3F8;
if ((p < 0x100) || (p > 0x3F8)) p = COM1_ADDR;
break;
case 0x25:
p = ((uint16_t) (dev->regs[reg] & 0xfe)) << 2;
p &= 0xFF8;
if ((p < 0x100) || (p > 0x3F8)) p = 0x2F8;
if ((p < 0x100) || (p > 0x3F8)) p = COM2_ADDR;
break;
}
@@ -153,7 +153,7 @@ w83877f_fdc_handler(w83877f_t *dev)
{
fdc_remove(dev->fdc);
if (!(dev->regs[6] & 0x08) && (dev->regs[0x20] & 0xc0))
fdc_set_base(dev->fdc, 0x03f0);
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}
@@ -219,7 +219,7 @@ w83877f_write(uint16_t port, uint8_t val, void *priv)
if (val <= max)
dev->cur_reg = val;
return;
} else if (port == 0x03f0) {
} else if (port == FDC_PRIMARY_ADDR) {
if ((val == dev->key) && !dev->locked) {
if (dev->key_times == 2) {
if (dev->tries) {
@@ -375,7 +375,7 @@ w83877f_read(uint16_t port, void *priv)
uint8_t ret = 0xff;
if (dev->locked) {
if ((port == 0x3f0) || (port == 0x251))
if ((port == FDC_PRIMARY_ADDR) || (port == 0x251))
ret = dev->cur_reg;
else if ((port == 0x3f1) || (port == 0x252)) {
if (dev->cur_reg == 7)
@@ -403,12 +403,12 @@ w83877f_reset(w83877f_t *dev)
dev->regs[0x0d] = 0xA3;
dev->regs[0x16] = dev->reg_init & 0xff;
dev->regs[0x1e] = 0x81;
dev->regs[0x20] = (0x3f0 >> 2) & 0xfc;
dev->regs[0x20] = (FDC_PRIMARY_ADDR >> 2) & 0xfc;
dev->regs[0x21] = (0x1f0 >> 2) & 0xfc;
dev->regs[0x22] = ((0x3f6 >> 2) & 0xfc) | 1;
dev->regs[0x23] = (0x378 >> 2);
dev->regs[0x24] = (0x3f8 >> 2) & 0xfe;
dev->regs[0x25] = (0x2f8 >> 2) & 0xfe;
dev->regs[0x23] = (LPT1_ADDR >> 2);
dev->regs[0x24] = (COM1_ADDR >> 2) & 0xfe;
dev->regs[0x25] = (COM2_ADDR >> 2) & 0xfe;
dev->regs[0x26] = (2 << 4) | 4;
dev->regs[0x27] = (2 << 4) | 5;
dev->regs[0x28] = (4 << 4) | 3;
@@ -421,7 +421,7 @@ w83877f_reset(w83877f_t *dev)
w83877f_serial_handler(dev, 0);
w83877f_serial_handler(dev, 1);
dev->base_address = 0x3f0;
dev->base_address = FDC_PRIMARY_ADDR;
dev->key = 0x89;
dev->key_times = 1;

14
src/sio/sio_w83977f.c
View File

@@ -60,12 +60,12 @@ static uint8_t w83977f_read(uint16_t port, void *priv);
static void
w83977f_remap(w83977f_t *dev)
{
io_removehandler(0x3f0, 0x0002,
io_removehandler(FDC_PRIMARY_ADDR, 0x0002,
w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev);
io_removehandler(0x370, 0x0002,
io_removehandler(FDC_SECONDARY_ADDR, 0x0002,
w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev);
dev->base_address = (HEFRAS ? 0x370 : 0x3f0);
dev->base_address = (HEFRAS ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
io_sethandler(dev->base_address, 0x0002,
w83977f_read, NULL, NULL, w83977f_write, NULL, NULL, dev);
@@ -507,13 +507,13 @@ w83977f_reset(w83977f_t *dev)
}
if (dev->id == 1) {
serial_setup(dev->uart[0], SERIAL3_ADDR, SERIAL3_IRQ);
serial_setup(dev->uart[1], SERIAL4_ADDR, SERIAL4_IRQ);
serial_setup(dev->uart[0], COM3_ADDR, COM3_IRQ);
serial_setup(dev->uart[1], COM4_ADDR, COM4_IRQ);
} else {
fdc_reset(dev->fdc);
serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ);
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
w83977f_fdc_handler(dev);
}