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Implement Crystal CS4235

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This commit is contained in:
RichardG867
2022-02-18 13:46:04 -03:00
parent 7f0c8fae5c
commit 07cba51e7b
5 changed files with 125 additions and 54 deletions
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5
src/include/86box/snd_ad1848.h
View File

@@ -23,6 +23,7 @@ enum {
AD1848_TYPE_DEFAULT = 0,
AD1848_TYPE_CS4248,
AD1848_TYPE_CS4231,
AD1848_TYPE_CS4235,
AD1848_TYPE_CS4236
};
@@ -46,6 +47,10 @@ typedef struct {
int16_t buffer[SOUNDBUFLEN * 2];
int pos;
void *cram_priv,
(*cram_write)(uint16_t addr, uint8_t val, void *priv);
uint8_t (*cram_read)(uint16_t addr, void *priv);
} ad1848_t;

2
src/include/86box/sound.h
View File

@@ -135,6 +135,8 @@ extern const device_t wss_device;
extern const device_t ncr_business_audio_device;
/* Crystal CS423x */
extern const device_t cs4235_device;
extern const device_t cs4235_onboard_device;
extern const device_t cs4236b_device;
extern const device_t cs4237b_device;
extern const device_t cs4238b_device;

38
src/sound/snd_ad1848.c
View File

@@ -16,7 +16,7 @@
*
* Copyright 2008-2020 Sarah Walker.
* Copyright 2018-2020 TheCollector1995.
* Copyright 2021 RichardG.
* Copyright 2021-2022 RichardG.
*/
#include <stdio.h>
#include <stdint.h>
@@ -56,7 +56,7 @@ ad1848_setdma(ad1848_t *ad1848, int dma)
void
ad1848_updatevolmask(ad1848_t *ad1848)
{
if ((ad1848->type == AD1848_TYPE_CS4236) && ((ad1848->xregs[4] & 0x10) || ad1848->wten))
if ((ad1848->type >= AD1848_TYPE_CS4235) && ((ad1848->xregs[4] & 0x10) || ad1848->wten))
ad1848->wave_vol_mask = 0x3f;
else
ad1848->wave_vol_mask = 0x7f;
@@ -69,7 +69,7 @@ ad1848_updatefreq(ad1848_t *ad1848)
double freq;
uint8_t set = 0;
if (ad1848->type == AD1848_TYPE_CS4236) {
if (ad1848->type >= AD1848_TYPE_CS4235) {
if (ad1848->xregs[11] & 0x20) {
freq = 16934400LL;
switch (ad1848->xregs[13]) {
@@ -134,7 +134,7 @@ ad1848_read(uint16_t addr, void *priv)
break;
case 18: case 19:
if (ad1848->type == AD1848_TYPE_CS4236) {
if (ad1848->type >= AD1848_TYPE_CS4235) {
if ((ad1848->xregs[4] & 0x14) == 0x14) /* FM remapping */
ret = ad1848->xregs[ad1848->index - 12]; /* real FM volume on registers 6 and 7 */
else if (ad1848->wten && !(ad1848->xregs[4] & 0x08)) /* wavetable remapping */
@@ -142,8 +142,14 @@ ad1848_read(uint16_t addr, void *priv)
}
break;
case 20: case 21:
/* Backdoor to the Control/RAM registers on CS4235. */
if ((ad1848->type == AD1848_TYPE_CS4235) && (ad1848->xregs[18] & 0x80))
ret = ad1848->cram_read(ad1848->index - 15, ad1848->cram_priv);
break;
case 23:
if ((ad1848->type == AD1848_TYPE_CS4236) && (ad1848->regs[23] & 0x08)) {
if ((ad1848->type >= AD1848_TYPE_CS4235) && (ad1848->regs[23] & 0x08)) {
if ((ad1848->xindex & 0xfe) == 0x00) /* remapped line volume */
ret = ad1848->regs[18 + ad1848->xindex];
else
@@ -174,7 +180,7 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
ad1848->index = val & 0x1f; /* cs4231a extended mode enabled */
else
ad1848->index = val & 0x0f; /* ad1848/cs4248 mode TODO: some variants/clones DO NOT mirror, just ignore the writes? */
if (ad1848->type == AD1848_TYPE_CS4236)
if (ad1848->type >= AD1848_TYPE_CS4235)
ad1848->regs[23] &= ~0x08; /* clear XRAE */
ad1848->trd = val & 0x20;
ad1848->mce = val & 0x40;
@@ -183,7 +189,7 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
case 1:
switch (ad1848->index) {
case 10:
if (ad1848->type != AD1848_TYPE_CS4236)
if (ad1848->type < AD1848_TYPE_CS4235)
break;
/* fall-through */
@@ -223,7 +229,7 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
break;
case 18: case 19:
if (ad1848->type == AD1848_TYPE_CS4236) {
if (ad1848->type >= AD1848_TYPE_CS4235) {
if ((ad1848->xregs[4] & 0x14) == 0x14) { /* FM remapping */
ad1848->xregs[ad1848->index - 12] = val; /* real FM volume on extended registers 6 and 7 */
temp = 1;
@@ -265,12 +271,20 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
}
break;
case 20: case 21:
/* Backdoor to the Control/RAM registers on CS4235. */
if ((ad1848->type == AD1848_TYPE_CS4235) && (ad1848->xregs[18] & 0x80)) {
ad1848->cram_write(ad1848->index - 15, val, ad1848->cram_priv);
val = ad1848->regs[ad1848->index];
}
break;
case 22:
updatefreq = 1;
break;
case 23:
if ((ad1848->type == AD1848_TYPE_CS4236) && ((ad1848->regs[12] & 0x60) == 0x60)) {
if ((ad1848->type >= AD1848_TYPE_CS4235) && ((ad1848->regs[12] & 0x60) == 0x60)) {
if (!(ad1848->regs[23] & 0x08)) { /* existing (not new) XRAE is clear */
ad1848->xindex = ((val & 0x04) << 2) | (val >> 4);
break;
@@ -327,7 +341,7 @@ ad1848_write(uint16_t addr, uint8_t val, void *priv)
if (updatefreq)
ad1848_updatefreq(ad1848);
if ((ad1848->type == AD1848_TYPE_CS4231) || (ad1848->type == AD1848_TYPE_CS4236)) { /* TODO: configure CD volume for CS4248/AD1848 too */
if (ad1848->type >= AD1848_TYPE_CS4231) { /* TODO: configure CD volume for CS4248/AD1848 too */
temp = (ad1848->type == AD1848_TYPE_CS4231) ? 18 : 4;
if (ad1848->regs[temp] & 0x80)
ad1848->cd_vol_l = 0;
@@ -474,7 +488,7 @@ ad1848_init(ad1848_t *ad1848, uint8_t type)
ad1848->regs[8] = 0;
ad1848->regs[9] = 0x08;
ad1848->regs[10] = ad1848->regs[11] = 0;
if ((type == AD1848_TYPE_CS4248) || (type == AD1848_TYPE_CS4231) || (type == AD1848_TYPE_CS4236))
if ((type == AD1848_TYPE_CS4248) || (type == AD1848_TYPE_CS4231) || (type >= AD1848_TYPE_CS4235))
ad1848->regs[12] = 0x8a;
else
ad1848->regs[12] = 0xa;
@@ -489,7 +503,7 @@ ad1848_init(ad1848_t *ad1848, uint8_t type)
ad1848->regs[25] = CS4231;
ad1848->regs[26] = 0x80;
ad1848->regs[29] = 0x80;
} else if (type == AD1848_TYPE_CS4236) {
} else if (type >= AD1848_TYPE_CS4235) {
ad1848->regs[16] = ad1848->regs[17] = 0;
ad1848->regs[18] = ad1848->regs[19] = 0;
ad1848->regs[20] = ad1848->regs[21] = 0;

133
src/sound/snd_cs423x.c
View File

@@ -12,7 +12,7 @@
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2021 RichardG.
* Copyright 2021-2022 RichardG.
*/
#include <stdio.h>
#include <stdint.h>
@@ -37,7 +37,10 @@
#include <86box/nvr.h>
#define CRYSTAL_NOEEPROM 0x100
enum {
CRYSTAL_CS4235 = 0xdd,
CRYSTAL_CS4236B = 0xcb,
CRYSTAL_CS4237B = 0xc8,
CRYSTAL_CS4238B = 0xc9
@@ -69,7 +72,7 @@ static const uint8_t cs4236b_eeprom[] = {
0x10, 0x03, /* DMA routing */
/* PnP resources */
0x0e, 0x63, 0x42, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, /* CSC4236, dummy checksum (filled in by isapnp_add_card) */
0x0e, 0x63, 0x42, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, /* CSC4236, dummy checksum (filled in by isapnp_add_card) */
0x0a, 0x10, 0x01, /* PnP version 1.0, vendor version 0.1 */
0x82, 0x0e, 0x00, 'C', 'r', 'y', 's', 't', 'a', 'l', ' ', 'C', 'o', 'd', 'e' ,'c', 0x00, /* ANSI identifier */
@@ -312,7 +315,8 @@ cs423x_write(uint16_t addr, uint8_t val, void *priv)
break;
case 6: /* RAM Access End */
if (!val) {
/* TriGem Delhi-III BIOS writes undocumented value 0x40 instead of 0x00. */
if ((val == 0x00) || (val == 0x40)) {
dev->ram_dl = 0;
/* Update PnP state and resource data. */
@@ -356,6 +360,20 @@ cs423x_slam_write(uint16_t addr, uint8_t val, void *priv)
break;
case CRYSTAL_SLAM_INDEX:
/* Intercept the Activate Audio Device command. */
if (val == 0x79) {
/* Apply the last logical device's configuration. */
if (dev->slam_config) {
cs423x_pnp_config_changed(dev->slam_ld, dev->slam_config, dev);
free(dev->slam_config);
dev->slam_config = NULL;
}
/* Exit out of SLAM. */
dev->slam_state = CRYSTAL_SLAM_NONE;
break;
}
/* Write register index. */
dev->slam_reg = val;
dev->slam_state = CRYSTAL_SLAM_BYTE1;
@@ -429,18 +447,6 @@ cs423x_slam_write(uint16_t addr, uint8_t val, void *priv)
/* Activate or deactivate the device. */
dev->slam_config->activate = val & 0x01;
break;
case 0x79: /* activate chip */
/* Apply the last logical device's configuration. */
if (dev->slam_config) {
cs423x_pnp_config_changed(dev->slam_ld, dev->slam_config, dev);
free(dev->slam_config);
dev->slam_config = NULL;
}
/* Exit out of SLAM. */
dev->slam_state = CRYSTAL_SLAM_NONE;
break;
}
/* Prepare for the next register, unless a two-byte read returns above. */
@@ -560,10 +566,12 @@ cs423x_pnp_enable(cs423x_t *dev, uint8_t update_rom, uint8_t update_hwconfig)
}
/* Update SPS. */
if (dev->ram_data[0x4003] & 0x04)
dev->indirect_regs[8] |= 0x04;
else
dev->indirect_regs[8] &= ~0x04;
if (dev->type != CRYSTAL_CS4235) {
if (dev->ram_data[0x4003] & 0x04)
dev->indirect_regs[8] |= 0x04;
else
dev->indirect_regs[8] &= ~0x04;
}
/* Update IFM. */
if (dev->ram_data[0x4003] & 0x80)
@@ -723,8 +731,9 @@ cs423x_init(const device_t *info)
memset(dev, 0, sizeof(cs423x_t));
/* Initialize model-specific data. */
dev->type = info->local;
dev->type = info->local & 0xff;
switch (dev->type) {
case CRYSTAL_CS4235:
case CRYSTAL_CS4236B:
case CRYSTAL_CS4237B:
case CRYSTAL_CS4238B:
@@ -735,36 +744,45 @@ cs423x_init(const device_t *info)
/* Different Chip Version and ID registers, which shouldn't be reset by ad1848_init */
dev->ad1848.xregs[25] = dev->type;
/* Load EEPROM contents from template. */
memcpy(dev->eeprom_data, cs4236b_eeprom, sizeof(cs4236b_eeprom));
if (!(info->local & CRYSTAL_NOEEPROM)) {
/* Load EEPROM contents from template. */
memcpy(dev->eeprom_data, cs4236b_eeprom, sizeof(cs4236b_eeprom));
/* Set content size. */
dev->eeprom_data[2] = sizeof(cs4236b_eeprom) >> 8;
dev->eeprom_data[3] = sizeof(cs4236b_eeprom) & 0xff;
/* Set content size. */
dev->eeprom_data[2] = sizeof(cs4236b_eeprom) >> 8;
dev->eeprom_data[3] = sizeof(cs4236b_eeprom) & 0xff;
/* Set PnP card ID and EEPROM file name. */
switch (dev->type) {
case CRYSTAL_CS4236B:
dev->nvr_path = "cs4236b.nvr";
break;
/* Set PnP card ID and EEPROM file name. */
switch (dev->type) {
case CRYSTAL_CS4235:
dev->eeprom_data[8] = 0x05;
dev->eeprom_data[16] = 0x08;
dev->eeprom_data[26] = 0x25;
dev->nvr_path = "cs4235.nvr";
break;
case CRYSTAL_CS4237B:
dev->eeprom_data[26] = 0x37;
dev->nvr_path = "cs4237b.nvr";
break;
case CRYSTAL_CS4236B:
dev->nvr_path = "cs4236b.nvr";
break;
case CRYSTAL_CS4238B:
dev->eeprom_data[26] = 0x38;
dev->nvr_path = "cs4238b.nvr";
break;
case CRYSTAL_CS4237B:
dev->eeprom_data[26] = 0x37;
dev->nvr_path = "cs4237b.nvr";
break;
case CRYSTAL_CS4238B:
dev->eeprom_data[26] = 0x38;
dev->nvr_path = "cs4238b.nvr";
break;
}
/* Load EEPROM contents from file if present. */
cs423x_nvram(dev, 0);
}
/* Load EEPROM contents from file if present. */
cs423x_nvram(dev, 0);
/* Initialize game port. The '7B and '8B game port only responds to 6 I/O ports; the remaining
2 ports are reserved on those chips, and probably connected to the Digital Assist feature. */
dev->gameport = gameport_add((dev->type == CRYSTAL_CS4236B) ? &gameport_pnp_device : &gameport_pnp_6io_device);
dev->gameport = gameport_add(((dev->type == CRYSTAL_CS4235) || (dev->type == CRYSTAL_CS4236B)) ? &gameport_pnp_device : &gameport_pnp_6io_device);
break;
}
@@ -787,6 +805,11 @@ cs423x_init(const device_t *info)
cs423x_reset(dev);
sound_add_handler(cs423x_get_buffer, dev);
/* Add Control/RAM backdoor handlers for CS4235. */
dev->ad1848.cram_priv = dev;
dev->ad1848.cram_read = cs423x_read;
dev->ad1848.cram_write = cs423x_write;
return dev;
}
@@ -817,6 +840,32 @@ cs423x_speed_changed(void *priv)
}
const device_t cs4235_device =
{
"Crystal CS4235",
"cs4235",
DEVICE_ISA | DEVICE_AT,
CRYSTAL_CS4235,
cs423x_init, cs423x_close, cs423x_reset,
{ NULL },
cs423x_speed_changed,
NULL,
NULL
};
const device_t cs4235_onboard_device =
{
"Crystal CS4235 (On-Board)",
"cs4235_onboard",
DEVICE_ISA | DEVICE_AT,
CRYSTAL_CS4235 | CRYSTAL_NOEEPROM,
cs423x_init, cs423x_close, cs423x_reset,
{ NULL },
cs423x_speed_changed,
NULL,
NULL
};
const device_t cs4236b_device =
{
"Crystal CS4236B",

1
src/sound/sound.c
View File

@@ -106,6 +106,7 @@ static const SOUND_CARD sound_cards[] =
{ &adgold_device },
{ &azt2316a_device },
{ &azt1605_device },
{ &cs4235_device },
{ &cs4236b_device },
{ &sb_1_device },
{ &sb_15_device },