Merge branch 'master' of ssh://github.com/86Box/86Box into cleanup30
# Conflicts: # src/cdrom/cdrom_image.c # src/cdrom/cdrom_image_backend.c # src/include/86box/cdrom.h # src/include/86box/cdrom_image_backend.h # src/include/86box/resource.h # src/qt/qt_mediamenu.cpp # src/qt/qt_mediamenu.hpp # src/unix/unix.c # src/win/win.c # src/win/win_devconf.c # src/win/win_dialog.c # src/win/win_joystick_rawinput.c # src/win/win_media_menu.c # src/win/win_mouse.c # src/win/win_settings.c # src/win/win_ui.c
This commit is contained in:
RichardG867
@@ -18,182 +18,184 @@
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* Copyright 2021 Laci bá'
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*/
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#ifndef EMU_86BOX_H
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# define EMU_86BOX_H
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#define EMU_86BOX_H
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/* Configuration values. */
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#define SERIAL_MAX 4
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#define PARALLEL_MAX 4
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#define SCREEN_RES_X 640
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#define SCREEN_RES_Y 480
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#define SERIAL_MAX 4
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#define PARALLEL_MAX 4
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#define SCREEN_RES_X 640
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#define SCREEN_RES_Y 480
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/* Filename and pathname info. */
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#define CONFIG_FILE "86box.cfg"
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#define CONFIG_FILE "86box.cfg"
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#define NVR_PATH "nvr"
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#define SCREENSHOT_PATH "screenshots"
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/* Recently used images */
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#define MAX_PREV_IMAGES 4
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#define MAX_IMAGE_PATH_LEN 256
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/* Default language 0xFFFF = from system, 0x409 = en-US */
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#define DEFAULT_LANGUAGE 0x0409
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#ifdef MIN
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#undef MIN
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# undef MIN
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#endif
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#ifdef MAX
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#undef MAX
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# undef MAX
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#endif
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#ifdef ABS
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#undef ABS
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# undef ABS
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#endif
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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#define ABS(x) ((x) > 0 ? (x) : -(x))
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#define BCD8(x) ((((x) / 10) << 4) | ((x) % 10))
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#define BCD16(x) ((((x) / 1000) << 12) | (((x) / 100) << 8) | BCD8(x))
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#define BCD32(x) ((((x) / 10000000) << 28) | (((x) / 1000000) << 24) | (((x) / 100000) << 20) | (((x) / 10000) << 16) | BCD16(x))
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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#define ABS(x) ((x) > 0 ? (x) : -(x))
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#define BCD8(x) ((((x) / 10) << 4) | ((x) % 10))
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#define BCD16(x) ((((x) / 1000) << 12) | (((x) / 100) << 8) | BCD8(x))
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#define BCD32(x) ((((x) / 10000000) << 28) | (((x) / 1000000) << 24) | (((x) / 100000) << 20) | (((x) / 10000) << 16) | BCD16(x))
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Global variables. */
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extern uint32_t lang_sys; /* (-) system language code */
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extern uint32_t lang_sys; /* (-) system language code */
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extern int dump_on_exit; /* (O) dump regs on exit*/
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extern int do_dump_config; /* (O) dump cfg after load */
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extern int start_in_fullscreen; /* (O) start in fullscreen */
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extern int dump_on_exit; /* (O) dump regs on exit*/
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extern int do_dump_config; /* (O) dump cfg after load */
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extern int start_in_fullscreen; /* (O) start in fullscreen */
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#ifdef _WIN32
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extern int force_debug; /* (O) force debug output */
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extern int force_debug; /* (O) force debug output */
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#endif
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#ifdef USE_WX
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extern int video_fps; /* (O) render speed in fps */
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extern int video_fps; /* (O) render speed in fps */
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#endif
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extern int settings_only; /* (O) show only the settings dialog */
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extern int confirm_exit_cmdl; /* (O) do not ask for confirmation on quit if set to 0 */
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extern int settings_only; /* (O) show only the settings dialog */
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extern int confirm_exit_cmdl; /* (O) do not ask for confirmation on quit if set to 0 */
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#ifdef _WIN32
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extern uint64_t unique_id;
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extern uint64_t source_hwnd;
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extern uint64_t unique_id;
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extern uint64_t source_hwnd;
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#endif
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extern char rom_path[1024]; /* (O) full path to ROMs */
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extern char log_path[1024]; /* (O) full path of logfile */
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extern char vm_name[1024]; /* (O) display name of the VM */
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#ifdef USE_INSTRUMENT
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extern uint8_t instru_enabled;
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extern uint64_t instru_run_ms;
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#endif
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extern char rom_path[1024]; /* (O) full path to ROMs */
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extern char log_path[1024]; /* (O) full path of logfile */
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extern char vm_name[1024]; /* (O) display name of the VM */
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#define window_x monitor_settings[0].mon_window_x
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#define window_y monitor_settings[0].mon_window_y
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#define window_w monitor_settings[0].mon_window_w
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#define window_h monitor_settings[0].mon_window_h
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extern int window_remember,
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vid_resize, /* (C) allow resizing */
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invert_display, /* (C) invert the display */
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suppress_overscan; /* (C) suppress overscans */
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extern uint32_t lang_id; /* (C) language code identifier */
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extern char icon_set[256]; /* (C) iconset identifier */
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extern int scale; /* (C) screen scale factor */
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extern int dpi_scale; /* (C) DPI scaling of the emulated screen */
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extern int vid_api; /* (C) video renderer */
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extern int vid_cga_contrast, /* (C) video */
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video_fullscreen, /* (C) video */
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video_fullscreen_first, /* (C) video */
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video_fullscreen_scale, /* (C) video */
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enable_overscan, /* (C) video */
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force_43, /* (C) video */
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video_filter_method, /* (C) video */
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video_vsync, /* (C) video */
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video_framerate, /* (C) video */
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gfxcard; /* (C) graphics/video card */
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extern char video_shader[512]; /* (C) video */
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extern int serial_enabled[], /* (C) enable serial ports */
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bugger_enabled, /* (C) enable ISAbugger */
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postcard_enabled, /* (C) enable POST card */
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isamem_type[], /* (C) enable ISA mem cards */
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isartc_type; /* (C) enable ISA RTC card */
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extern int sound_is_float, /* (C) sound uses FP values */
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GAMEBLASTER, /* (C) sound option */
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GUS, GUSMAX, /* (C) sound option */
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SSI2001, /* (C) sound option */
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voodoo_enabled, /* (C) video option */
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ibm8514_enabled, /* (C) video option */
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xga_enabled; /* (C) video option */
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extern uint32_t mem_size; /* (C) memory size (Installed on system board) */
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extern uint32_t isa_mem_size; /* (C) memory size (ISA Memory Cards) */
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extern int cpu, /* (C) cpu type */
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cpu_use_dynarec, /* (C) cpu uses/needs Dyna */
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fpu_type; /* (C) fpu type */
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extern int time_sync; /* (C) enable time sync */
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extern int network_type; /* (C) net provider type */
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extern int network_card; /* (C) net interface num */
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extern char network_host[522]; /* (C) host network intf */
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extern int hdd_format_type; /* (C) hard disk file format */
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extern int confirm_reset, /* (C) enable reset confirmation */
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confirm_exit, /* (C) enable exit confirmation */
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confirm_save; /* (C) enable save confirmation */
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extern int enable_discord; /* (C) enable Discord integration */
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extern int window_remember,
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vid_resize, /* (C) allow resizing */
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invert_display, /* (C) invert the display */
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suppress_overscan; /* (C) suppress overscans */
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extern uint32_t lang_id; /* (C) language code identifier */
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extern char icon_set[256]; /* (C) iconset identifier */
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extern int scale; /* (C) screen scale factor */
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extern int dpi_scale; /* (C) DPI scaling of the emulated screen */
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extern int vid_api; /* (C) video renderer */
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extern int vid_cga_contrast, /* (C) video */
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video_fullscreen, /* (C) video */
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video_fullscreen_first, /* (C) video */
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video_fullscreen_scale, /* (C) video */
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enable_overscan, /* (C) video */
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force_43, /* (C) video */
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video_filter_method, /* (C) video */
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video_vsync, /* (C) video */
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video_framerate, /* (C) video */
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gfxcard; /* (C) graphics/video card */
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extern char video_shader[512]; /* (C) video */
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extern int bugger_enabled, /* (C) enable ISAbugger */
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postcard_enabled, /* (C) enable POST card */
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isamem_type[], /* (C) enable ISA mem cards */
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isartc_type; /* (C) enable ISA RTC card */
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extern int sound_is_float, /* (C) sound uses FP values */
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GAMEBLASTER, /* (C) sound option */
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GUS, GUSMAX, /* (C) sound option */
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SSI2001, /* (C) sound option */
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voodoo_enabled, /* (C) video option */
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ibm8514_enabled, /* (C) video option */
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xga_enabled; /* (C) video option */
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extern uint32_t mem_size; /* (C) memory size (Installed on system board) */
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extern uint32_t isa_mem_size; /* (C) memory size (ISA Memory Cards) */
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extern int cpu, /* (C) cpu type */
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cpu_use_dynarec, /* (C) cpu uses/needs Dyna */
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fpu_type; /* (C) fpu type */
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extern int time_sync; /* (C) enable time sync */
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extern int hdd_format_type; /* (C) hard disk file format */
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extern int confirm_reset, /* (C) enable reset confirmation */
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confirm_exit, /* (C) enable exit confirmation */
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confirm_save; /* (C) enable save confirmation */
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extern int enable_discord; /* (C) enable Discord integration */
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extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out,
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how to remove that hack from the ET4000/W32p. */
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extern int fixed_size_x, fixed_size_y;
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extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */
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extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out,
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how to remove that hack from the ET4000/W32p. */
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extern int fixed_size_x, fixed_size_y;
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extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */
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extern double mouse_x_error, mouse_y_error; /* Mouse error accumulators */
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extern int pit_mode; /* (C) force setting PIT mode */
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extern int fm_driver; /* (C) select FM sound driver */
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extern char exe_path[2048]; /* path (dir) of executable */
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extern char usr_path[1024]; /* path (dir) of user data */
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extern char cfg_path[1024]; /* full path of config file */
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extern char exe_path[2048]; /* path (dir) of executable */
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extern char usr_path[1024]; /* path (dir) of user data */
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extern char cfg_path[1024]; /* full path of config file */
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extern int open_dir_usr_path; /* default file open dialog directory of usr_path */
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#ifndef USE_NEW_DYNAREC
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extern FILE *stdlog; /* file to log output to */
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extern FILE *stdlog; /* file to log output to */
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#endif
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extern int config_changed; /* config has changed */
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extern int config_changed; /* config has changed */
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/* Function prototypes. */
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#ifdef HAVE_STDARG_H
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extern void pclog_ex(const char *fmt, va_list);
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extern void fatal_ex(const char *fmt, va_list);
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extern void pclog_ex(const char *fmt, va_list);
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extern void fatal_ex(const char *fmt, va_list);
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#endif
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extern void pclog_toggle_suppr(void);
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extern void pclog(const char *fmt, ...);
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extern void fatal(const char *fmt, ...);
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extern void set_screen_size(int x, int y);
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extern void set_screen_size_monitor(int x, int y, int monitor_index);
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extern void reset_screen_size(void);
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extern void reset_screen_size_monitor(int monitor_index);
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extern void set_screen_size_natural(void);
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extern void pclog_toggle_suppr(void);
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extern void pclog(const char *fmt, ...);
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extern void fatal(const char *fmt, ...);
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extern void set_screen_size(int x, int y);
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extern void set_screen_size_monitor(int x, int y, int monitor_index);
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extern void reset_screen_size(void);
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extern void reset_screen_size_monitor(int monitor_index);
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extern void set_screen_size_natural(void);
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extern void update_mouse_msg();
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#if 0
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extern void pc_reload(wchar_t *fn);
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#endif
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extern int pc_init_modules(void);
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extern int pc_init(int argc, char *argv[]);
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extern void pc_close(void *threadid);
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extern void pc_reset_hard_close(void);
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extern void pc_reset_hard_init(void);
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extern void pc_reset_hard(void);
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extern void pc_full_speed(void);
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extern void pc_speed_changed(void);
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extern void pc_send_cad(void);
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extern void pc_send_cae(void);
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extern void pc_send_cab(void);
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extern void pc_run(void);
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extern void pc_start(void);
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extern void pc_onesec(void);
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extern int pc_init_modules(void);
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extern int pc_init(int argc, char *argv[]);
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extern void pc_close(void *threadid);
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extern void pc_reset_hard_close(void);
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extern void pc_reset_hard_init(void);
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extern void pc_reset_hard(void);
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extern void pc_full_speed(void);
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extern void pc_speed_changed(void);
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extern void pc_send_cad(void);
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extern void pc_send_cae(void);
|
||||
extern void pc_send_cab(void);
|
||||
extern void pc_run(void);
|
||||
extern void pc_start(void);
|
||||
extern void pc_onesec(void);
|
||||
|
||||
extern uint16_t get_last_addr(void);
|
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extern uint16_t get_last_addr(void);
|
||||
|
||||
/* This is for external subtraction of cycles;
|
||||
should be in cpu.c but I put it here to avoid
|
||||
having to include cpu.c everywhere. */
|
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extern void sub_cycles(int c);
|
||||
extern void resub_cycles(int old_cycles);
|
||||
extern void sub_cycles(int c);
|
||||
extern void resub_cycles(int old_cycles);
|
||||
|
||||
extern double isa_timing;
|
||||
extern int io_delay, framecountx;
|
||||
extern double isa_timing;
|
||||
extern int io_delay, framecountx;
|
||||
|
||||
extern volatile int cpu_thread_run;
|
||||
extern volatile int cpu_thread_run;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_86BOX_H*/
|
||||
#endif /*EMU_86BOX_H*/
|
||||
|
||||
@@ -15,124 +15,117 @@
|
||||
* Copyright 2020 Miran Grca.
|
||||
*/
|
||||
#ifndef ACPI_H
|
||||
# define ACPI_H
|
||||
|
||||
#define ACPI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define ACPI_TIMER_FREQ 3579545
|
||||
#define PM_FREQ ACPI_TIMER_FREQ
|
||||
#define ACPI_TIMER_FREQ 3579545
|
||||
#define PM_FREQ ACPI_TIMER_FREQ
|
||||
|
||||
#define RSM_STS (1 << 15)
|
||||
#define PWRBTN_STS (1 << 8)
|
||||
#define GBL_STS (1 << 5)
|
||||
#define BM_STS (1 << 4)
|
||||
#define TMROF_STS (1 << 0)
|
||||
#define RSM_STS (1 << 15)
|
||||
#define PWRBTN_STS (1 << 8)
|
||||
#define GBL_STS (1 << 5)
|
||||
#define BM_STS (1 << 4)
|
||||
#define TMROF_STS (1 << 0)
|
||||
|
||||
#define RTC_EN (1 << 10)
|
||||
#define PWRBTN_EN (1 << 8)
|
||||
#define GBL_EN (1 << 5)
|
||||
#define TMROF_EN (1 << 0)
|
||||
#define RTC_EN (1 << 10)
|
||||
#define PWRBTN_EN (1 << 8)
|
||||
#define GBL_EN (1 << 5)
|
||||
#define TMROF_EN (1 << 0)
|
||||
|
||||
#define SCI_EN (1 << 0)
|
||||
#define SUS_EN (1 << 13)
|
||||
#define SCI_EN (1 << 0)
|
||||
#define SUS_EN (1 << 13)
|
||||
|
||||
#define SUS_POWER_OFF (1 << 0)
|
||||
#define SUS_SUSPEND (1 << 1)
|
||||
#define SUS_NVR (1 << 2)
|
||||
#define SUS_RESET_CPU (1 << 3)
|
||||
#define SUS_RESET_CACHE (1 << 4)
|
||||
#define SUS_RESET_PCI (1 << 5)
|
||||
#define SUS_POWER_OFF (1 << 0)
|
||||
#define SUS_SUSPEND (1 << 1)
|
||||
#define SUS_NVR (1 << 2)
|
||||
#define SUS_RESET_CPU (1 << 3)
|
||||
#define SUS_RESET_CACHE (1 << 4)
|
||||
#define SUS_RESET_PCI (1 << 5)
|
||||
|
||||
#define ACPI_ENABLE 0xf1
|
||||
#define ACPI_DISABLE 0xf0
|
||||
|
||||
#define VEN_ALI 0x010b9
|
||||
#define VEN_INTEL 0x08086
|
||||
#define VEN_SIS 0x01039
|
||||
#define VEN_SMC 0x01055
|
||||
#define VEN_VIA 0x01106
|
||||
#define VEN_VIA_596B 0x11106
|
||||
#define ACPI_ENABLE 0xf1
|
||||
#define ACPI_DISABLE 0xf0
|
||||
|
||||
#define VEN_ALI 0x010b9
|
||||
#define VEN_INTEL 0x08086
|
||||
#define VEN_SIS 0x01039
|
||||
#define VEN_SMC 0x01055
|
||||
#define VEN_VIA 0x01106
|
||||
#define VEN_VIA_596B 0x11106
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t acpitst, auxen, auxsts, plvl2, plvl3,
|
||||
smicmd, gpio_dir,
|
||||
gpio_val, muxcntrl, ali_soft_smi,
|
||||
timer32, smireg,
|
||||
gpireg[3], gporeg[4],
|
||||
extiotrapsts, extiotrapen;
|
||||
uint16_t pmsts, pmen,
|
||||
pmcntrl, gpsts, gpsts1,
|
||||
gpen, gpen1, gpscien,
|
||||
gpcntrl, gplvl, gpmux,
|
||||
gpsel, gpsmien, pscntrl,
|
||||
gpscists;
|
||||
int smi_lock, smi_active;
|
||||
uint32_t pcntrl, p2cntrl, glbsts,
|
||||
devsts, glben,
|
||||
glbctl, devctl,
|
||||
padsts, paden,
|
||||
gptren, gptimer, timer_val,
|
||||
gpo_val, gpi_val,
|
||||
extsmi_val, pad0;
|
||||
uint64_t tmr_overflow_time;
|
||||
uint8_t acpitst, auxen, auxsts, plvl2, plvl3,
|
||||
smicmd, gpio_dir,
|
||||
gpio_val, muxcntrl, ali_soft_smi,
|
||||
timer32, smireg,
|
||||
gpireg[3], gporeg[4],
|
||||
extiotrapsts, extiotrapen;
|
||||
uint16_t pmsts, pmen,
|
||||
pmcntrl, gpsts, gpsts1,
|
||||
gpen, gpen1, gpscien,
|
||||
gpcntrl, gplvl, gpmux,
|
||||
gpsel, gpsmien, pscntrl,
|
||||
gpscists;
|
||||
int smi_lock, smi_active;
|
||||
uint32_t pcntrl, p2cntrl, glbsts,
|
||||
devsts, glben,
|
||||
glbctl, devctl,
|
||||
padsts, paden,
|
||||
gptren, gptimer,
|
||||
gpo_val, gpi_val,
|
||||
extsmi_val, pad0;
|
||||
} acpi_regs_t;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
acpi_regs_t regs;
|
||||
uint8_t gpireg2_default, pad[3],
|
||||
gporeg_default[4],
|
||||
suspend_types[8];
|
||||
uint16_t io_base, aux_io_base;
|
||||
int vendor,
|
||||
slot, irq_mode,
|
||||
irq_pin, irq_line,
|
||||
mirq_is_level;
|
||||
pc_timer_t timer, resume_timer;
|
||||
nvr_t *nvr;
|
||||
apm_t *apm;
|
||||
void *i2c,
|
||||
(*trap_update)(void *priv), *trap_priv;
|
||||
acpi_regs_t regs;
|
||||
uint8_t gpireg2_default, pad[3],
|
||||
gporeg_default[4],
|
||||
suspend_types[8];
|
||||
uint16_t io_base, aux_io_base;
|
||||
int vendor,
|
||||
slot, irq_mode,
|
||||
irq_pin, irq_line,
|
||||
mirq_is_level;
|
||||
pc_timer_t timer, resume_timer;
|
||||
nvr_t *nvr;
|
||||
apm_t *apm;
|
||||
void *i2c,
|
||||
(*trap_update)(void *priv), *trap_priv;
|
||||
} acpi_t;
|
||||
|
||||
|
||||
/* Global variables. */
|
||||
extern int acpi_rtc_status;
|
||||
|
||||
extern const device_t acpi_ali_device;
|
||||
extern const device_t acpi_intel_device;
|
||||
extern const device_t acpi_smc_device;
|
||||
extern const device_t acpi_via_device;
|
||||
extern const device_t acpi_via_596b_device;
|
||||
extern int acpi_rtc_status;
|
||||
|
||||
extern const device_t acpi_ali_device;
|
||||
extern const device_t acpi_intel_device;
|
||||
extern const device_t acpi_smc_device;
|
||||
extern const device_t acpi_via_device;
|
||||
extern const device_t acpi_via_596b_device;
|
||||
|
||||
/* Functions */
|
||||
extern void acpi_update_irq(acpi_t *dev);
|
||||
extern void acpi_raise_smi(void *priv, int do_smi);
|
||||
extern void acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en);
|
||||
extern void acpi_update_aux_io_mapping(acpi_t *dev, uint32_t base, int chipset_en);
|
||||
extern void acpi_init_gporeg(acpi_t *dev, uint8_t val0, uint8_t val1, uint8_t val2, uint8_t val3);
|
||||
extern void acpi_set_timer32(acpi_t *dev, uint8_t timer32);
|
||||
extern void acpi_set_slot(acpi_t *dev, int slot);
|
||||
extern void acpi_set_irq_mode(acpi_t *dev, int irq_mode);
|
||||
extern void acpi_set_irq_pin(acpi_t *dev, int irq_pin);
|
||||
extern void acpi_set_irq_line(acpi_t *dev, int irq_line);
|
||||
extern void acpi_set_mirq_is_level(acpi_t *dev, int mirq_is_level);
|
||||
extern void acpi_set_gpireg2_default(acpi_t *dev, uint8_t gpireg2_default);
|
||||
extern void acpi_set_nvr(acpi_t *dev, nvr_t *nvr);
|
||||
extern void acpi_set_trap_update(acpi_t *dev, void (*update)(void *priv), void *priv);
|
||||
extern uint8_t acpi_ali_soft_smi_status_read(acpi_t *dev);
|
||||
extern void acpi_ali_soft_smi_status_write(acpi_t *dev, uint8_t soft_smi);
|
||||
extern void acpi_update_irq(acpi_t *dev);
|
||||
extern void acpi_raise_smi(void *priv, int do_smi);
|
||||
extern void acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en);
|
||||
extern void acpi_update_aux_io_mapping(acpi_t *dev, uint32_t base, int chipset_en);
|
||||
extern void acpi_init_gporeg(acpi_t *dev, uint8_t val0, uint8_t val1, uint8_t val2, uint8_t val3);
|
||||
extern void acpi_set_timer32(acpi_t *dev, uint8_t timer32);
|
||||
extern void acpi_set_slot(acpi_t *dev, int slot);
|
||||
extern void acpi_set_irq_mode(acpi_t *dev, int irq_mode);
|
||||
extern void acpi_set_irq_pin(acpi_t *dev, int irq_pin);
|
||||
extern void acpi_set_irq_line(acpi_t *dev, int irq_line);
|
||||
extern void acpi_set_mirq_is_level(acpi_t *dev, int mirq_is_level);
|
||||
extern void acpi_set_gpireg2_default(acpi_t *dev, uint8_t gpireg2_default);
|
||||
extern void acpi_set_nvr(acpi_t *dev, nvr_t *nvr);
|
||||
extern void acpi_set_trap_update(acpi_t *dev, void (*update)(void *priv), void *priv);
|
||||
extern uint8_t acpi_ali_soft_smi_status_read(acpi_t *dev);
|
||||
extern void acpi_ali_soft_smi_status_write(acpi_t *dev, uint8_t soft_smi);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*ACPI_H*/
|
||||
#endif /*ACPI_H*/
|
||||
|
||||
35
src/include/86box/agpgart.h
Normal file
35
src/include/86box/agpgart.h
Normal file
@@ -0,0 +1,35 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* AGP Graphics Address Remapping Table remapping emulation.
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: RichardG, <richardg867@gmail.com>
|
||||
*
|
||||
* Copyright 2021 RichardG.
|
||||
*/
|
||||
|
||||
#ifndef EMU_AGPGART_H
|
||||
#define EMU_AGPGART_H
|
||||
|
||||
typedef struct agpgart_s {
|
||||
int aperture_enable;
|
||||
uint32_t aperture_base, aperture_size, aperture_mask, gart_base;
|
||||
mem_mapping_t aperture_mapping;
|
||||
} agpgart_t;
|
||||
|
||||
extern void agpgart_set_aperture(agpgart_t *dev, uint32_t base, uint32_t size, int enable);
|
||||
extern void agpgart_set_gart(agpgart_t *dev, uint32_t base);
|
||||
|
||||
#ifdef EMU_DEVICE_H
|
||||
/* AGP GART */
|
||||
extern const device_t agpgart_device;
|
||||
#endif
|
||||
|
||||
#endif /*EMU_AGPGART_H*/
|
||||
@@ -15,8 +15,7 @@
|
||||
* Copyright 2019 Miran Grca.
|
||||
*/
|
||||
#ifndef APM_H
|
||||
# define APM_H
|
||||
|
||||
#define APM_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -25,23 +24,20 @@ extern "C" {
|
||||
typedef struct
|
||||
{
|
||||
uint8_t cmd,
|
||||
stat, do_smi;
|
||||
stat, do_smi;
|
||||
} apm_t;
|
||||
|
||||
|
||||
/* Global variables. */
|
||||
extern const device_t apm_device;
|
||||
|
||||
extern const device_t apm_pci_device;
|
||||
extern const device_t apm_pci_acpi_device;
|
||||
extern const device_t apm_device;
|
||||
|
||||
extern const device_t apm_pci_device;
|
||||
extern const device_t apm_pci_acpi_device;
|
||||
|
||||
/* Functions. */
|
||||
extern void apm_set_do_smi(apm_t *dev, uint8_t do_smi);
|
||||
extern void apm_set_do_smi(apm_t *dev, uint8_t do_smi);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*APM_H*/
|
||||
#endif /*APM_H*/
|
||||
|
||||
@@ -22,13 +22,11 @@
|
||||
* Copyright 1989-2018 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef BUGGER_H
|
||||
# define BUGGER_H
|
||||
|
||||
#define BUGGER_H
|
||||
|
||||
/* I/O port range used. */
|
||||
#define BUGGER_ADDR 0x007a
|
||||
#define BUGGER_ADDRLEN 4
|
||||
|
||||
#define BUGGER_ADDR 0x007a
|
||||
#define BUGGER_ADDRLEN 4
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -37,12 +35,10 @@ extern "C" {
|
||||
/* Global variables. */
|
||||
extern const device_t bugger_device;
|
||||
|
||||
|
||||
/* Functions. */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*BUGGER_H*/
|
||||
#endif /*BUGGER_H*/
|
||||
|
||||
@@ -15,26 +15,21 @@
|
||||
* Copyright 2021 Miran Grca.
|
||||
*/
|
||||
#ifndef EMU_CARTRIDGE_H
|
||||
# define EMU_CARTRIDGE_H
|
||||
|
||||
#define EMU_CARTRIDGE_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern char cart_fns[2][512];
|
||||
|
||||
extern char cart_fns[2][512];
|
||||
|
||||
|
||||
extern void cart_load(int drive, char *fn);
|
||||
extern void cart_close(int drive);
|
||||
|
||||
extern void cart_reset(void);
|
||||
extern void cart_load(int drive, char *fn);
|
||||
extern void cart_close(int drive);
|
||||
|
||||
extern void cart_reset(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_CARTRIDGE_H*/
|
||||
#endif /*EMU_CARTRIDGE_H*/
|
||||
|
||||
@@ -19,155 +19,149 @@
|
||||
* Public License for more details. *
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
#ifndef PCE_IBMPC_CASSETTE_H
|
||||
# define PCE_IBMPC_CASSETTE_H 1
|
||||
|
||||
#define PCE_IBMPC_CASSETTE_H 1
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
|
||||
typedef struct {
|
||||
char save;
|
||||
char pcm;
|
||||
char save;
|
||||
char pcm;
|
||||
|
||||
unsigned char motor;
|
||||
unsigned char motor;
|
||||
|
||||
unsigned long position;
|
||||
unsigned long position;
|
||||
|
||||
unsigned long position_save;
|
||||
unsigned long position_load;
|
||||
unsigned long position_save;
|
||||
unsigned long position_load;
|
||||
|
||||
unsigned char data_out;
|
||||
unsigned char data_inp;
|
||||
unsigned char data_out;
|
||||
unsigned char data_inp;
|
||||
|
||||
int pcm_out_vol;
|
||||
int pcm_out_val;
|
||||
int pcm_out_vol;
|
||||
int pcm_out_val;
|
||||
|
||||
unsigned cas_out_cnt;
|
||||
unsigned char cas_out_buf;
|
||||
unsigned cas_out_cnt;
|
||||
unsigned char cas_out_buf;
|
||||
|
||||
unsigned cas_inp_cnt;
|
||||
unsigned char cas_inp_buf;
|
||||
unsigned char cas_inp_bit;
|
||||
unsigned cas_inp_cnt;
|
||||
unsigned char cas_inp_buf;
|
||||
unsigned char cas_inp_bit;
|
||||
|
||||
int pcm_inp_fir[3];
|
||||
int pcm_inp_fir[3];
|
||||
|
||||
unsigned long clk;
|
||||
unsigned long clk;
|
||||
|
||||
unsigned long clk_pcm;
|
||||
unsigned long clk_pcm;
|
||||
|
||||
unsigned long clk_out;
|
||||
unsigned long clk_inp;
|
||||
unsigned long clk_out;
|
||||
unsigned long clk_inp;
|
||||
|
||||
unsigned long srate;
|
||||
unsigned long srate;
|
||||
|
||||
char close;
|
||||
char *fname;
|
||||
FILE *fp;
|
||||
pc_timer_t timer;
|
||||
char close;
|
||||
char *fname;
|
||||
FILE *fp;
|
||||
pc_timer_t timer;
|
||||
} pc_cassette_t;
|
||||
|
||||
void pc_cas_init(pc_cassette_t *cas);
|
||||
void pc_cas_free(pc_cassette_t *cas);
|
||||
|
||||
void pc_cas_init (pc_cassette_t *cas);
|
||||
void pc_cas_free (pc_cassette_t *cas);
|
||||
|
||||
pc_cassette_t *pc_cas_new (void);
|
||||
void pc_cas_del (pc_cassette_t *cas);
|
||||
pc_cassette_t *pc_cas_new(void);
|
||||
void pc_cas_del(pc_cassette_t *cas);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Set the cassette file
|
||||
* @return True on error, false otherwise
|
||||
*****************************************************************************/
|
||||
int pc_cas_set_fname (pc_cassette_t *cas, const char *fname);
|
||||
int pc_cas_set_fname(pc_cassette_t *cas, const char *fname);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Get the cassette mode
|
||||
* @return True if in save mode, false if in load mode
|
||||
*****************************************************************************/
|
||||
int pc_cas_get_mode (const pc_cassette_t *cas);
|
||||
int pc_cas_get_mode(const pc_cassette_t *cas);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Set the cassette mode
|
||||
* @param save If true set save mode, otherwise set load mode
|
||||
*****************************************************************************/
|
||||
void pc_cas_set_mode (pc_cassette_t *cas, int save);
|
||||
void pc_cas_set_mode(pc_cassette_t *cas, int save);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Get the cassette pcm mode
|
||||
* @return True if in pcm mode, false if in binary mode
|
||||
*****************************************************************************/
|
||||
int pc_cas_get_pcm (const pc_cassette_t *cas);
|
||||
int pc_cas_get_pcm(const pc_cassette_t *cas);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Set the cassette pcm mode
|
||||
* @param pcm If true set pcm mode, otherwise set binary mode
|
||||
*****************************************************************************/
|
||||
void pc_cas_set_pcm (pc_cassette_t *cas, int pcm);
|
||||
void pc_cas_set_pcm(pc_cassette_t *cas, int pcm);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Get the pcm sample rate
|
||||
* @return The sample rate in Hz
|
||||
*****************************************************************************/
|
||||
unsigned long pc_cas_get_srate (const pc_cassette_t *cas);
|
||||
unsigned long pc_cas_get_srate(const pc_cassette_t *cas);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Set the pcm sample rate
|
||||
* @param pcm The sample rate in Hz
|
||||
*****************************************************************************/
|
||||
void pc_cas_set_srate (pc_cassette_t *cas, unsigned long srate);
|
||||
void pc_cas_set_srate(pc_cassette_t *cas, unsigned long srate);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Rewind the cassette
|
||||
*****************************************************************************/
|
||||
void pc_cas_rewind (pc_cassette_t *cas);
|
||||
void pc_cas_rewind(pc_cassette_t *cas);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Fast forward to the end of the cassette
|
||||
*****************************************************************************/
|
||||
void pc_cas_append (pc_cassette_t *cas);
|
||||
void pc_cas_append(pc_cassette_t *cas);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Get the current load/save position
|
||||
*****************************************************************************/
|
||||
unsigned long pc_cas_get_position (const pc_cassette_t *cas);
|
||||
unsigned long pc_cas_get_position(const pc_cassette_t *cas);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Set the current load/save position
|
||||
*****************************************************************************/
|
||||
int pc_cas_set_position (pc_cassette_t *cas, unsigned long pos);
|
||||
int pc_cas_set_position(pc_cassette_t *cas, unsigned long pos);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Set the cassette motor status
|
||||
*****************************************************************************/
|
||||
void pc_cas_set_motor (pc_cassette_t *cas, unsigned char val);
|
||||
void pc_cas_set_motor(pc_cassette_t *cas, unsigned char val);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Get the current input from the cassette
|
||||
*****************************************************************************/
|
||||
unsigned char pc_cas_get_inp (const pc_cassette_t *cas);
|
||||
unsigned char pc_cas_get_inp(const pc_cassette_t *cas);
|
||||
|
||||
/*!***************************************************************************
|
||||
* @short Set the current output to the cassette
|
||||
*****************************************************************************/
|
||||
void pc_cas_set_out (pc_cassette_t *cas, unsigned char val);
|
||||
void pc_cas_set_out(pc_cassette_t *cas, unsigned char val);
|
||||
|
||||
void pc_cas_print_state (const pc_cassette_t *cas);
|
||||
void pc_cas_print_state(const pc_cassette_t *cas);
|
||||
|
||||
void pc_cas_clock (pc_cassette_t *cas, unsigned long cnt);
|
||||
void pc_cas_advance (pc_cassette_t *cas);
|
||||
void pc_cas_clock(pc_cassette_t *cas, unsigned long cnt);
|
||||
void pc_cas_advance(pc_cassette_t *cas);
|
||||
|
||||
extern pc_cassette_t *cassette;
|
||||
|
||||
extern pc_cassette_t * cassette;
|
||||
|
||||
extern char cassette_fname[512];
|
||||
extern char cassette_mode[512];
|
||||
extern unsigned long cassette_pos, cassette_srate;
|
||||
extern int cassette_enable;
|
||||
extern int cassette_append, cassette_pcm;
|
||||
extern int cassette_ui_writeprot;
|
||||
|
||||
extern const device_t cassette_device;
|
||||
extern char cassette_fname[512];
|
||||
extern char cassette_mode[512];
|
||||
extern unsigned long cassette_pos, cassette_srate;
|
||||
extern int cassette_enable;
|
||||
extern int cassette_append, cassette_pcm;
|
||||
extern int cassette_ui_writeprot;
|
||||
|
||||
extern const device_t cassette_device;
|
||||
|
||||
#endif /*PCE_IBMPC_CASSETTE_H*/
|
||||
|
||||
@@ -38,6 +38,8 @@
|
||||
#define CD_TOC_SESSION 1
|
||||
#define CD_TOC_RAW 2
|
||||
|
||||
#define CD_IMAGE_HISTORY 4
|
||||
|
||||
#define BUF_SIZE 32768
|
||||
|
||||
#define CDROM_IMAGE 200
|
||||
@@ -106,6 +108,8 @@ typedef struct cdrom {
|
||||
char image_path[1024],
|
||||
prev_image_path[1024];
|
||||
|
||||
char *image_history[CD_IMAGE_HISTORY];
|
||||
|
||||
uint32_t sound_on, cdrom_capacity,
|
||||
pad, seek_pos,
|
||||
seek_diff, cd_end;
|
||||
|
||||
@@ -15,158 +15,160 @@
|
||||
* Copyright 2019,2020 Miran Grca.
|
||||
*/
|
||||
#ifndef EMU_CHIPSET_H
|
||||
# define EMU_CHIPSET_H
|
||||
|
||||
#define EMU_CHIPSET_H
|
||||
|
||||
/* ACC */
|
||||
extern const device_t acc2168_device;
|
||||
extern const device_t acc2168_device;
|
||||
|
||||
/* ALi */
|
||||
extern const device_t ali1217_device;
|
||||
extern const device_t ali1429_device;
|
||||
extern const device_t ali1429g_device;
|
||||
extern const device_t ali1489_device;
|
||||
extern const device_t ali1531_device;
|
||||
extern const device_t ali1541_device;
|
||||
extern const device_t ali1543_device;
|
||||
extern const device_t ali1543c_device;
|
||||
extern const device_t ali1621_device;
|
||||
extern const device_t ali6117d_device;
|
||||
extern const device_t ali1217_device;
|
||||
extern const device_t ali1429_device;
|
||||
extern const device_t ali1429g_device;
|
||||
extern const device_t ali1489_device;
|
||||
extern const device_t ali1531_device;
|
||||
extern const device_t ali1541_device;
|
||||
extern const device_t ali1543_device;
|
||||
extern const device_t ali1543c_device;
|
||||
extern const device_t ali1621_device;
|
||||
extern const device_t ali6117d_device;
|
||||
|
||||
/* AMD */
|
||||
extern const device_t amd640_device;
|
||||
extern const device_t amd640_device;
|
||||
|
||||
/* Contaq/Cypress */
|
||||
extern const device_t contaq_82c596a_device;
|
||||
extern const device_t contaq_82c597_device;
|
||||
extern const device_t contaq_82c596a_device;
|
||||
extern const device_t contaq_82c597_device;
|
||||
|
||||
/* C&T */
|
||||
extern const device_t ct_82c100_device;
|
||||
extern const device_t neat_device;
|
||||
extern const device_t scat_device;
|
||||
extern const device_t scat_4_device;
|
||||
extern const device_t scat_sx_device;
|
||||
extern const device_t cs8230_device;
|
||||
extern const device_t cs4031_device;
|
||||
extern const device_t ct_82c100_device;
|
||||
extern const device_t neat_device;
|
||||
extern const device_t scat_device;
|
||||
extern const device_t scat_4_device;
|
||||
extern const device_t scat_sx_device;
|
||||
extern const device_t cs8230_device;
|
||||
extern const device_t cs4031_device;
|
||||
|
||||
/* G2 */
|
||||
extern const device_t gc100_device;
|
||||
extern const device_t gc100a_device;
|
||||
extern const device_t gc100_device;
|
||||
extern const device_t gc100a_device;
|
||||
|
||||
/* Headland */
|
||||
extern const device_t headland_gc10x_device;
|
||||
extern const device_t headland_ht18a_device;
|
||||
extern const device_t headland_ht18b_device;
|
||||
extern const device_t headland_ht18c_device;
|
||||
extern const device_t headland_gc10x_device;
|
||||
extern const device_t headland_gc113_device;
|
||||
extern const device_t headland_ht18a_device;
|
||||
extern const device_t headland_ht18b_device;
|
||||
extern const device_t headland_ht18c_device;
|
||||
extern const device_t headland_ht21c_d_device;
|
||||
extern const device_t headland_ht21e_device;
|
||||
|
||||
/* IMS */
|
||||
extern const device_t ims8848_device;
|
||||
extern const device_t ims8848_device;
|
||||
|
||||
/* Intel */
|
||||
extern const device_t intel_82335_device;
|
||||
extern const device_t i420ex_device;
|
||||
extern const device_t i420ex_ide_device;
|
||||
extern const device_t i420tx_device;
|
||||
extern const device_t i420zx_device;
|
||||
extern const device_t i430lx_device;
|
||||
extern const device_t i430nx_device;
|
||||
extern const device_t i430fx_device;
|
||||
extern const device_t i430fx_old_device;
|
||||
extern const device_t i430fx_rev02_device;
|
||||
extern const device_t i430hx_device;
|
||||
extern const device_t i430vx_device;
|
||||
extern const device_t i430tx_device;
|
||||
extern const device_t i440fx_device;
|
||||
extern const device_t i440lx_device;
|
||||
extern const device_t i440ex_device;
|
||||
extern const device_t i440bx_device;
|
||||
extern const device_t i440bx_no_agp_device;
|
||||
extern const device_t i440gx_device;
|
||||
extern const device_t i440zx_device;
|
||||
extern const device_t i450kx_device;
|
||||
extern const device_t intel_82335_device;
|
||||
extern const device_t i420ex_device;
|
||||
extern const device_t i420ex_ide_device;
|
||||
extern const device_t i420tx_device;
|
||||
extern const device_t i420zx_device;
|
||||
extern const device_t i430lx_device;
|
||||
extern const device_t i430nx_device;
|
||||
extern const device_t i430fx_device;
|
||||
extern const device_t i430fx_old_device;
|
||||
extern const device_t i430fx_rev02_device;
|
||||
extern const device_t i430hx_device;
|
||||
extern const device_t i430vx_device;
|
||||
extern const device_t i430tx_device;
|
||||
extern const device_t i440fx_device;
|
||||
extern const device_t i440lx_device;
|
||||
extern const device_t i440ex_device;
|
||||
extern const device_t i440bx_device;
|
||||
extern const device_t i440bx_no_agp_device;
|
||||
extern const device_t i440gx_device;
|
||||
extern const device_t i440zx_device;
|
||||
extern const device_t i450kx_device;
|
||||
|
||||
extern const device_t sio_device;
|
||||
extern const device_t sio_zb_device;
|
||||
extern const device_t sio_device;
|
||||
extern const device_t sio_zb_device;
|
||||
|
||||
extern const device_t piix_device;
|
||||
extern const device_t piix_old_device;
|
||||
extern const device_t piix_rev02_device;
|
||||
extern const device_t piix3_device;
|
||||
extern const device_t piix3_ioapic_device;
|
||||
extern const device_t piix4_device;
|
||||
extern const device_t piix4e_device;
|
||||
extern const device_t slc90e66_device;
|
||||
extern const device_t piix_device;
|
||||
extern const device_t piix_old_device;
|
||||
extern const device_t piix_rev02_device;
|
||||
extern const device_t piix3_device;
|
||||
extern const device_t piix3_ioapic_device;
|
||||
extern const device_t piix4_device;
|
||||
extern const device_t piix4e_device;
|
||||
extern const device_t slc90e66_device;
|
||||
|
||||
extern const device_t ioapic_device;
|
||||
extern const device_t ioapic_device;
|
||||
|
||||
/* OPTi */
|
||||
extern const device_t opti283_device;
|
||||
extern const device_t opti291_device;
|
||||
extern const device_t opti493_device;
|
||||
extern const device_t opti495_device;
|
||||
extern const device_t opti802g_device;
|
||||
extern const device_t opti822_device;
|
||||
extern const device_t opti895_device;
|
||||
extern const device_t opti283_device;
|
||||
extern const device_t opti291_device;
|
||||
extern const device_t opti493_device;
|
||||
extern const device_t opti495_device;
|
||||
extern const device_t opti802g_device;
|
||||
extern const device_t opti822_device;
|
||||
extern const device_t opti895_device;
|
||||
|
||||
extern const device_t opti5x7_device;
|
||||
extern const device_t opti5x7_device;
|
||||
|
||||
/* SiS */
|
||||
extern const device_t rabbit_device;
|
||||
extern const device_t sis_85c401_device;
|
||||
extern const device_t sis_85c460_device;
|
||||
extern const device_t sis_85c461_device;
|
||||
extern const device_t sis_85c471_device;
|
||||
extern const device_t sis_85c496_device;
|
||||
extern const device_t sis_85c496_ls486e_device;
|
||||
extern const device_t sis_85c50x_device;
|
||||
extern const device_t sis_5511_device;
|
||||
extern const device_t sis_5571_device;
|
||||
extern const device_t rabbit_device;
|
||||
extern const device_t sis_85c401_device;
|
||||
extern const device_t sis_85c460_device;
|
||||
extern const device_t sis_85c461_device;
|
||||
extern const device_t sis_85c471_device;
|
||||
extern const device_t sis_85c496_device;
|
||||
extern const device_t sis_85c496_ls486e_device;
|
||||
extern const device_t sis_85c50x_device;
|
||||
extern const device_t sis_5511_device;
|
||||
extern const device_t sis_5571_device;
|
||||
|
||||
/* ST */
|
||||
extern const device_t stpc_client_device;
|
||||
extern const device_t stpc_consumer2_device;
|
||||
extern const device_t stpc_elite_device;
|
||||
extern const device_t stpc_atlas_device;
|
||||
extern const device_t stpc_serial_device;
|
||||
extern const device_t stpc_lpt_device;
|
||||
extern const device_t stpc_client_device;
|
||||
extern const device_t stpc_consumer2_device;
|
||||
extern const device_t stpc_elite_device;
|
||||
extern const device_t stpc_atlas_device;
|
||||
extern const device_t stpc_serial_device;
|
||||
extern const device_t stpc_lpt_device;
|
||||
|
||||
/* UMC */
|
||||
extern const device_t umc_8886f_device;
|
||||
extern const device_t umc_8886af_device;
|
||||
extern const device_t umc_hb4_device;
|
||||
extern const device_t umc_8886f_device;
|
||||
extern const device_t umc_8886af_device;
|
||||
extern const device_t umc_hb4_device;
|
||||
|
||||
/* VIA */
|
||||
extern const device_t via_vt82c49x_device;
|
||||
extern const device_t via_vt82c49x_pci_device;
|
||||
extern const device_t via_vt82c49x_pci_ide_device;
|
||||
extern const device_t via_vt82c505_device;
|
||||
extern const device_t via_vpx_device;
|
||||
extern const device_t via_vp3_device;
|
||||
extern const device_t via_mvp3_device;
|
||||
extern const device_t via_apro_device;
|
||||
extern const device_t via_apro133_device;
|
||||
extern const device_t via_apro133a_device;
|
||||
extern const device_t via_vt8601_device;
|
||||
extern const device_t via_vt82c586b_device;
|
||||
extern const device_t via_vt82c596a_device;
|
||||
extern const device_t via_vt82c596b_device;
|
||||
extern const device_t via_vt82c686a_device;
|
||||
extern const device_t via_vt82c686b_device;
|
||||
extern const device_t via_vt8231_device;
|
||||
extern const device_t via_vt82c49x_device;
|
||||
extern const device_t via_vt82c49x_pci_device;
|
||||
extern const device_t via_vt82c49x_pci_ide_device;
|
||||
extern const device_t via_vt82c505_device;
|
||||
extern const device_t via_vpx_device;
|
||||
extern const device_t via_vp3_device;
|
||||
extern const device_t via_mvp3_device;
|
||||
extern const device_t via_apro_device;
|
||||
extern const device_t via_apro133_device;
|
||||
extern const device_t via_apro133a_device;
|
||||
extern const device_t via_vt8601_device;
|
||||
extern const device_t via_vt82c586b_device;
|
||||
extern const device_t via_vt82c596a_device;
|
||||
extern const device_t via_vt82c596b_device;
|
||||
extern const device_t via_vt82c686a_device;
|
||||
extern const device_t via_vt82c686b_device;
|
||||
extern const device_t via_vt8231_device;
|
||||
|
||||
/* VLSI */
|
||||
extern const device_t vl82c480_device;
|
||||
extern const device_t vl82c486_device;
|
||||
extern const device_t vlsi_scamp_device;
|
||||
extern const device_t vl82c480_device;
|
||||
extern const device_t vl82c486_device;
|
||||
extern const device_t vlsi_scamp_device;
|
||||
|
||||
/* WD */
|
||||
extern const device_t wd76c10_device;
|
||||
extern const device_t wd76c10_device;
|
||||
|
||||
/* Miscellaneous Hardware */
|
||||
extern const device_t phoenix_486_jumper_device;
|
||||
extern const device_t phoenix_486_jumper_pci_device;
|
||||
extern const device_t phoenix_486_jumper_device;
|
||||
extern const device_t phoenix_486_jumper_pci_device;
|
||||
|
||||
#if defined(DEV_BRANCH) && defined(USE_OLIVETTI)
|
||||
extern const device_t olivetti_eva_device;
|
||||
extern const device_t olivetti_eva_device;
|
||||
#endif
|
||||
#endif /*EMU_CHIPSET_H*/
|
||||
#endif /*EMU_CHIPSET_H*/
|
||||
|
||||
@@ -15,7 +15,7 @@
|
||||
* Copyright 2020 RichardG.
|
||||
*/
|
||||
#ifndef EMU_CLOCK_H
|
||||
# define EMU_CLOCK_H
|
||||
#define EMU_CLOCK_H
|
||||
|
||||
/* clock_ics9xxx.c */
|
||||
enum {
|
||||
@@ -54,9 +54,7 @@ enum {
|
||||
ICS9xxx_MAX
|
||||
};
|
||||
|
||||
|
||||
/* clock_ics9xxx.c */
|
||||
extern device_t *ics9xxx_get(uint8_t model);
|
||||
extern device_t *ics9xxx_get(uint8_t model);
|
||||
|
||||
|
||||
#endif /*EMU_CLOCK_H*/
|
||||
#endif /*EMU_CLOCK_H*/
|
||||
|
||||
@@ -20,8 +20,7 @@
|
||||
* Copyright 2017 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_CONFIG_H
|
||||
# define EMU_CONFIG_H
|
||||
|
||||
#define EMU_CONFIG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -69,16 +68,16 @@ typedef struct {
|
||||
window_x,
|
||||
window_y,
|
||||
sound_gain; /* Sound gain */
|
||||
#ifdef USE_LANGUAGE
|
||||
# ifdef USE_LANGUAGE
|
||||
uint16_t language_id; /* Language ID (0x0409 = English (US)) */
|
||||
#endif
|
||||
# endif
|
||||
|
||||
/* Machine cateogory */
|
||||
int machine, /* Machine */
|
||||
cpu, /* CPU */
|
||||
#ifdef USE_DYNAREC
|
||||
# ifdef USE_DYNAREC
|
||||
cpu_use_dynarec, /* CPU recompiler enabled */
|
||||
#endif
|
||||
# endif
|
||||
wait_states, /* CPU wait states */
|
||||
enable_external_fpu, /* FPU enabled */
|
||||
time_sync; /* Time sync enabled */
|
||||
@@ -109,11 +108,9 @@ typedef struct {
|
||||
|
||||
/* Ports category */
|
||||
char parallel_devices[PARALLEL_MAX][32]; /* LPT device names */
|
||||
#ifdef USE_SERIAL_DEVICES
|
||||
# ifdef USE_SERIAL_DEVICES
|
||||
char serial_devices[SERIAL_MAX][32]; /* Serial device names */
|
||||
#endif
|
||||
int serial_enabled[SERIAL_MAX], /* Serial ports 1, 2, 3, 4 enabled */
|
||||
parallel_enabled[PARALLEL_MAX]; /* LPT1, LPT2, LPT3, LPT4 enabled */
|
||||
# endif
|
||||
|
||||
/* Other peripherals category */
|
||||
int fdc_type, /* Floppy disk controller type */
|
||||
@@ -137,33 +134,38 @@ typedef struct {
|
||||
} config_t;
|
||||
#endif
|
||||
|
||||
extern void config_load(void);
|
||||
extern void config_save(void);
|
||||
extern void config_write(char *fn);
|
||||
extern void config_dump(void);
|
||||
extern void config_load(void);
|
||||
extern void config_save(void);
|
||||
|
||||
extern void config_delete_var(char *head, char *name);
|
||||
extern int config_get_int(char *head, char *name, int def);
|
||||
extern double config_get_double(char *head, char *name, double def);
|
||||
extern int config_get_hex16(char *head, char *name, int def);
|
||||
extern int config_get_hex20(char *head, char *name, int def);
|
||||
extern int config_get_mac(char *head, char *name, int def);
|
||||
extern char *config_get_string(char *head, char *name, char *def);
|
||||
extern wchar_t *config_get_wstring(char *head, char *name, wchar_t *def);
|
||||
extern void config_set_int(char *head, char *name, int val);
|
||||
extern void config_set_double(char *head, char *name, double val);
|
||||
extern void config_set_hex16(char *head, char *name, int val);
|
||||
extern void config_set_hex20(char *head, char *name, int val);
|
||||
extern void config_set_mac(char *head, char *name, int val);
|
||||
extern void config_set_string(char *head, char *name, char *val);
|
||||
extern void config_set_wstring(char *head, char *name, wchar_t *val);
|
||||
#ifdef EMU_INI_H
|
||||
extern ini_t config_get_ini(void);
|
||||
#else
|
||||
extern void *config_get_ini(void);
|
||||
#endif
|
||||
|
||||
extern void * config_find_section(char *name);
|
||||
extern void config_rename_section(void *priv, char *name);
|
||||
#define config_delete_var(head, name) ini_delete_var(config_get_ini(), head, name)
|
||||
|
||||
#define config_get_int(head, name, def) ini_get_int(config_get_ini(), head, name, def)
|
||||
#define config_get_double(head, name, def) ini_get_double(config_get_ini(), head, name, def)
|
||||
#define config_get_hex16(head, name, def) ini_get_hex16(config_get_ini(), head, name, def)
|
||||
#define config_get_hex20(head, name, def) ini_get_hex20(config_get_ini(), head, name, def)
|
||||
#define config_get_mac(head, name, def) ini_get_mac(config_get_ini(), head, name, def)
|
||||
#define config_get_string(head, name, def) ini_get_string(config_get_ini(), head, name, def)
|
||||
#define config_get_wstring(head, name, def) ini_get_wstring(config_get_ini(), head, name, def)
|
||||
|
||||
#define config_set_int(head, name, val) ini_set_int(config_get_ini(), head, name, val)
|
||||
#define config_set_double(head, name, val) ini_set_double(config_get_ini(), head, name, val)
|
||||
#define config_set_hex16(head, name, val) ini_set_hex16(config_get_ini(), head, name, val)
|
||||
#define config_set_hex20(head, name, val) ini_set_hex20(config_get_ini(), head, name, val)
|
||||
#define config_set_mac(head, name, val) ini_set_mac(config_get_ini(), head, name, val)
|
||||
#define config_set_string(head, name, val) ini_set_string(config_get_ini(), head, name, val)
|
||||
#define config_set_wstring(head, name, val) ini_set_wstring(config_get_ini(), head, name, val)
|
||||
|
||||
#define config_find_section(name) ini_find_section(config_get_ini(), name)
|
||||
#define config_rename_section ini_rename_section
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_CONFIG_H*/
|
||||
#endif /*EMU_CONFIG_H*/
|
||||
|
||||
@@ -15,8 +15,7 @@
|
||||
* Copyright 2020 Miran Grca.
|
||||
*/
|
||||
#ifndef DDMA_H
|
||||
# define DDMA_H
|
||||
|
||||
#define DDMA_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -24,26 +23,23 @@ extern "C" {
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16_t io_base;
|
||||
int channel, enable;
|
||||
uint16_t io_base;
|
||||
int channel, enable;
|
||||
} ddma_channel_t;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
ddma_channel_t channels[8];
|
||||
ddma_channel_t channels[8];
|
||||
} ddma_t;
|
||||
|
||||
|
||||
/* Global variables. */
|
||||
extern const device_t ddma_device;
|
||||
|
||||
extern const device_t ddma_device;
|
||||
|
||||
/* Functions. */
|
||||
extern void ddma_update_io_mapping(ddma_t *dev, int ch, uint8_t base_l, uint8_t base_h, int enable);
|
||||
extern void ddma_update_io_mapping(ddma_t *dev, int ch, uint8_t base_l, uint8_t base_h, int enable);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*DDMA_H*/
|
||||
#endif /*DDMA_H*/
|
||||
|
||||
@@ -37,46 +37,62 @@
|
||||
* USA.
|
||||
*/
|
||||
#ifndef EMU_DEVICE_H
|
||||
# define EMU_DEVICE_H
|
||||
|
||||
|
||||
#define CONFIG_END -1
|
||||
#define CONFIG_STRING 0
|
||||
#define CONFIG_INT 1
|
||||
#define CONFIG_BINARY 2
|
||||
#define CONFIG_SELECTION 3
|
||||
#define CONFIG_MIDI_OUT 4
|
||||
#define CONFIG_FNAME 5
|
||||
#define CONFIG_SPINNER 6
|
||||
#define CONFIG_HEX16 7
|
||||
#define CONFIG_HEX20 8
|
||||
#define CONFIG_MAC 9
|
||||
#define CONFIG_MIDI_IN 10
|
||||
#define EMU_DEVICE_H
|
||||
|
||||
#define CONFIG_END -1
|
||||
#define CONFIG_STRING 0
|
||||
#define CONFIG_INT 1
|
||||
#define CONFIG_BINARY 2
|
||||
#define CONFIG_SELECTION 3
|
||||
#define CONFIG_MIDI_OUT 4
|
||||
#define CONFIG_FNAME 5
|
||||
#define CONFIG_SPINNER 6
|
||||
#define CONFIG_HEX16 7
|
||||
#define CONFIG_HEX20 8
|
||||
#define CONFIG_MAC 9
|
||||
#define CONFIG_MIDI_IN 10
|
||||
#define CONFIG_BIOS 11
|
||||
|
||||
enum {
|
||||
DEVICE_NOT_WORKING = 1, /* does not currently work correctly and will be disabled in a release build */
|
||||
DEVICE_PCJR = 2, /* requires an IBM PCjr */
|
||||
DEVICE_AT = 4, /* requires an AT-compatible system */
|
||||
DEVICE_PS2 = 8, /* requires a PS/1 or PS/2 system */
|
||||
DEVICE_ISA = 0x10, /* requires the ISA bus */
|
||||
DEVICE_CBUS = 0x20, /* requires the C-BUS bus */
|
||||
DEVICE_MCA = 0x40, /* requires the MCA bus */
|
||||
DEVICE_EISA = 0x80, /* requires the EISA bus */
|
||||
DEVICE_VLB = 0x100, /* requires the PCI bus */
|
||||
DEVICE_PCI = 0x200, /* requires the VLB bus */
|
||||
DEVICE_AGP = 0x400, /* requires the AGP bus */
|
||||
DEVICE_AC97 = 0x800, /* requires the AC'97 bus */
|
||||
DEVICE_COM = 0x1000, /* requires a serial port */
|
||||
DEVICE_LPT = 0x2000 /* requires a parallel port */
|
||||
DEVICE_PCJR = 2, /* requires an IBM PCjr */
|
||||
DEVICE_AT = 4, /* requires an AT-compatible system */
|
||||
DEVICE_PS2 = 8, /* requires a PS/1 or PS/2 system */
|
||||
DEVICE_ISA = 0x10, /* requires the ISA bus */
|
||||
DEVICE_CBUS = 0x20, /* requires the C-BUS bus */
|
||||
DEVICE_MCA = 0x40, /* requires the MCA bus */
|
||||
DEVICE_EISA = 0x80, /* requires the EISA bus */
|
||||
DEVICE_VLB = 0x100, /* requires the PCI bus */
|
||||
DEVICE_PCI = 0x200, /* requires the VLB bus */
|
||||
DEVICE_AGP = 0x400, /* requires the AGP bus */
|
||||
DEVICE_AC97 = 0x800, /* requires the AC'97 bus */
|
||||
DEVICE_COM = 0x1000, /* requires a serial port */
|
||||
DEVICE_LPT = 0x2000 /* requires a parallel port */
|
||||
};
|
||||
|
||||
#define BIOS_NORMAL 0
|
||||
#define BIOS_INTERLEAVED 1
|
||||
#define BIOS_INTERLEAVED_SINGLEFILE 2
|
||||
#define BIOS_INTERLEAVED_QUAD 3
|
||||
#define BIOS_INTERLEAVED_QUAD_SINGLEFILE 4
|
||||
#define BIOS_INTEL_AMI 5
|
||||
#define BIOS_INTERLEAVED_INVERT 8
|
||||
#define BIOS_HIGH_BIT_INVERT 16
|
||||
|
||||
typedef struct {
|
||||
const char *description;
|
||||
int value;
|
||||
int value;
|
||||
} device_config_selection_t;
|
||||
|
||||
typedef struct {
|
||||
const char *name;
|
||||
const char *internal_name;
|
||||
int bios_type;
|
||||
int files_no;
|
||||
uint32_t local, size;
|
||||
void *dev1, *dev2;
|
||||
const char **files;
|
||||
} device_config_bios_t;
|
||||
|
||||
typedef struct {
|
||||
int16_t min;
|
||||
int16_t max;
|
||||
@@ -84,92 +100,92 @@ typedef struct {
|
||||
} device_config_spinner_t;
|
||||
|
||||
typedef struct {
|
||||
const char *name;
|
||||
const char *description;
|
||||
int type;
|
||||
const char *default_string;
|
||||
int default_int;
|
||||
const char *file_filter;
|
||||
const device_config_spinner_t spinner;
|
||||
const char *name;
|
||||
const char *description;
|
||||
int type;
|
||||
const char *default_string;
|
||||
int default_int;
|
||||
const char *file_filter;
|
||||
const device_config_spinner_t spinner;
|
||||
const device_config_selection_t selection[16];
|
||||
const device_config_bios_t *bios;
|
||||
} device_config_t;
|
||||
|
||||
typedef struct _device_ {
|
||||
const char *name;
|
||||
const char *name;
|
||||
const char *internal_name;
|
||||
uint32_t flags; /* system flags */
|
||||
uint32_t local; /* flags local to device */
|
||||
uint32_t flags; /* system flags */
|
||||
uint32_t local; /* flags local to device */
|
||||
|
||||
void *(*init)(const struct _device_ *);
|
||||
void (*close)(void *priv);
|
||||
void (*reset)(void *priv);
|
||||
void *(*init)(const struct _device_ *);
|
||||
void (*close)(void *priv);
|
||||
void (*reset)(void *priv);
|
||||
union {
|
||||
int (*available)(void);
|
||||
int (*poll)(int x, int y, int z, int b, void *priv);
|
||||
void (*register_pci_slot)(int device, int type, int inta, int intb, int intc, int intd, void *priv);
|
||||
int (*available)(void);
|
||||
int (*poll)(int x, int y, int z, int b, void *priv);
|
||||
void (*register_pci_slot)(int device, int type, int inta, int intb, int intc, int intd, void *priv);
|
||||
};
|
||||
void (*speed_changed)(void *priv);
|
||||
void (*force_redraw)(void *priv);
|
||||
void (*speed_changed)(void *priv);
|
||||
void (*force_redraw)(void *priv);
|
||||
|
||||
const device_config_t *config;
|
||||
} device_t;
|
||||
|
||||
typedef struct {
|
||||
const device_t *dev;
|
||||
char name[2048];
|
||||
const device_t *dev;
|
||||
char name[2048];
|
||||
} device_context_t;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern void device_init(void);
|
||||
extern void device_set_context(device_context_t *c, const device_t *d, int inst);
|
||||
extern void device_context(const device_t *d);
|
||||
extern void device_context_inst(const device_t *d, int inst);
|
||||
extern void device_context_restore(void);
|
||||
extern void *device_add(const device_t *d);
|
||||
extern void device_add_ex(const device_t *d, void *priv);
|
||||
extern void *device_add_inst(const device_t *d, int inst);
|
||||
extern void device_add_inst_ex(const device_t *d, void *priv, int inst);
|
||||
extern void *device_cadd(const device_t *d, const device_t *cd);
|
||||
extern void device_cadd_ex(const device_t *d, const device_t *cd, void *priv);
|
||||
extern void *device_cadd_inst(const device_t *d, const device_t *cd, int inst);
|
||||
extern void device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst);
|
||||
extern void device_close_all(void);
|
||||
extern void device_reset_all(void);
|
||||
extern void device_reset_all_pci(void);
|
||||
extern void *device_get_priv(const device_t *d);
|
||||
extern int device_available(const device_t *d);
|
||||
extern int device_poll(const device_t *d, int x, int y, int z, int b);
|
||||
extern void device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd);
|
||||
extern void device_speed_changed(void);
|
||||
extern void device_force_redraw(void);
|
||||
extern void device_get_name(const device_t *d, int bus, char *name);
|
||||
extern int device_has_config(const device_t *d);
|
||||
extern void device_init(void);
|
||||
extern void device_set_context(device_context_t *c, const device_t *d, int inst);
|
||||
extern void device_context(const device_t *d);
|
||||
extern void device_context_inst(const device_t *d, int inst);
|
||||
extern void device_context_restore(void);
|
||||
extern void *device_add(const device_t *d);
|
||||
extern void device_add_ex(const device_t *d, void *priv);
|
||||
extern void *device_add_inst(const device_t *d, int inst);
|
||||
extern void device_add_inst_ex(const device_t *d, void *priv, int inst);
|
||||
extern void *device_cadd(const device_t *d, const device_t *cd);
|
||||
extern void device_cadd_ex(const device_t *d, const device_t *cd, void *priv);
|
||||
extern void *device_cadd_inst(const device_t *d, const device_t *cd, int inst);
|
||||
extern void device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst);
|
||||
extern void device_close_all(void);
|
||||
extern void device_reset_all(void);
|
||||
extern void device_reset_all_pci(void);
|
||||
extern void *device_get_priv(const device_t *d);
|
||||
extern int device_available(const device_t *d);
|
||||
extern int device_poll(const device_t *d, int x, int y, int z, int b);
|
||||
extern void device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd);
|
||||
extern void device_speed_changed(void);
|
||||
extern void device_force_redraw(void);
|
||||
extern void device_get_name(const device_t *d, int bus, char *name);
|
||||
extern int device_has_config(const device_t *d);
|
||||
|
||||
extern int device_is_valid(const device_t *, int m);
|
||||
extern int device_is_valid(const device_t *, int m);
|
||||
|
||||
extern int device_get_config_int(const char *name);
|
||||
extern int device_get_config_int_ex(const char *s, int dflt_int);
|
||||
extern int device_get_config_hex16(const char *name);
|
||||
extern int device_get_config_hex20(const char *name);
|
||||
extern int device_get_config_mac(const char *name, int dflt_int);
|
||||
extern void device_set_config_int(const char *s, int val);
|
||||
extern void device_set_config_hex16(const char *s, int val);
|
||||
extern void device_set_config_hex20(const char *s, int val);
|
||||
extern void device_set_config_mac(const char *s, int val);
|
||||
extern const char *device_get_config_string(const char *name);
|
||||
extern int device_get_config_int(const char *name);
|
||||
extern int device_get_config_int_ex(const char *s, int dflt_int);
|
||||
extern int device_get_config_hex16(const char *name);
|
||||
extern int device_get_config_hex20(const char *name);
|
||||
extern int device_get_config_mac(const char *name, int dflt_int);
|
||||
extern void device_set_config_int(const char *s, int val);
|
||||
extern void device_set_config_hex16(const char *s, int val);
|
||||
extern void device_set_config_hex20(const char *s, int val);
|
||||
extern void device_set_config_mac(const char *s, int val);
|
||||
extern const char *device_get_config_string(const char *name);
|
||||
#define device_get_config_bios device_get_config_string
|
||||
|
||||
extern char * device_get_internal_name(const device_t *d);
|
||||
extern char *device_get_internal_name(const device_t *d);
|
||||
|
||||
extern int machine_get_config_int(char *s);
|
||||
extern char *machine_get_config_string(char *s);
|
||||
extern int machine_get_config_int(char *s);
|
||||
extern char *machine_get_config_string(char *s);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_DEVICE_H*/
|
||||
#endif /*EMU_DEVICE_H*/
|
||||
|
||||
@@ -15,20 +15,19 @@
|
||||
* Copyright 2019 David Hrdlička.
|
||||
*/
|
||||
#ifndef WIN_DISCORD_H
|
||||
# define WIN_DISCORD_H
|
||||
#define WIN_DISCORD_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern int discord_loaded;
|
||||
extern int discord_loaded;
|
||||
|
||||
extern int discord_load();
|
||||
extern void discord_init();
|
||||
extern void discord_close();
|
||||
extern void discord_update_activity(int paused);
|
||||
extern void discord_run_callbacks();
|
||||
extern int discord_load();
|
||||
extern void discord_init();
|
||||
extern void discord_close();
|
||||
extern void discord_update_activity(int paused);
|
||||
extern void discord_run_callbacks();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -37,75 +37,70 @@
|
||||
* USA.
|
||||
*/
|
||||
#ifndef EMU_DMA_H
|
||||
# define EMU_DMA_H
|
||||
|
||||
|
||||
#define DMA_NODATA -1
|
||||
#define DMA_OVER 0x10000
|
||||
#define DMA_VERIFY 0x20000
|
||||
#define EMU_DMA_H
|
||||
|
||||
#define DMA_NODATA -1
|
||||
#define DMA_OVER 0x10000
|
||||
#define DMA_VERIFY 0x20000
|
||||
|
||||
typedef struct {
|
||||
uint8_t m, mode, page, stat,
|
||||
stat_rq, command,
|
||||
ps2_mode, arb_level,
|
||||
sg_command, sg_status,
|
||||
ptr0, enabled,
|
||||
ext_mode, page_l,
|
||||
page_h, pad;
|
||||
uint16_t cb, io_addr,
|
||||
base, transfer_mode;
|
||||
uint32_t ptr, ptr_cur,
|
||||
addr,
|
||||
ab, ac;
|
||||
int cc, wp,
|
||||
size, count,
|
||||
eot;
|
||||
uint8_t m, mode, page, stat,
|
||||
stat_rq, command,
|
||||
ps2_mode, arb_level,
|
||||
sg_command, sg_status,
|
||||
ptr0, enabled,
|
||||
ext_mode, page_l,
|
||||
page_h, pad;
|
||||
uint16_t cb, io_addr,
|
||||
base, transfer_mode;
|
||||
uint32_t ptr, ptr_cur,
|
||||
addr,
|
||||
ab, ac;
|
||||
int cc, wp,
|
||||
size, count,
|
||||
eot;
|
||||
} dma_t;
|
||||
|
||||
extern dma_t dma[8];
|
||||
extern uint8_t dma_e;
|
||||
extern uint8_t dma_m;
|
||||
|
||||
extern dma_t dma[8];
|
||||
extern uint8_t dma_e;
|
||||
extern uint8_t dma_m;
|
||||
extern void dma_init(void);
|
||||
extern void dma16_init(void);
|
||||
extern void ps2_dma_init(void);
|
||||
extern void dma_reset(void);
|
||||
extern int dma_mode(int channel);
|
||||
|
||||
extern void readdma0(void);
|
||||
extern int readdma1(void);
|
||||
extern uint8_t readdma2(void);
|
||||
extern int readdma3(void);
|
||||
|
||||
extern void dma_init(void);
|
||||
extern void dma16_init(void);
|
||||
extern void ps2_dma_init(void);
|
||||
extern void dma_reset(void);
|
||||
extern int dma_mode(int channel);
|
||||
extern void writedma2(uint8_t temp);
|
||||
|
||||
extern void readdma0(void);
|
||||
extern int readdma1(void);
|
||||
extern uint8_t readdma2(void);
|
||||
extern int readdma3(void);
|
||||
extern int dma_get_drq(int channel);
|
||||
extern void dma_set_drq(int channel, int set);
|
||||
|
||||
extern void writedma2(uint8_t temp);
|
||||
extern int dma_channel_read(int channel);
|
||||
extern int dma_channel_write(int channel, uint16_t val);
|
||||
|
||||
extern int dma_get_drq(int channel);
|
||||
extern void dma_set_drq(int channel, int set);
|
||||
extern void dma_alias_set(void);
|
||||
extern void dma_alias_set_piix(void);
|
||||
extern void dma_alias_remove(void);
|
||||
extern void dma_alias_remove_piix(void);
|
||||
|
||||
extern int dma_channel_read(int channel);
|
||||
extern int dma_channel_write(int channel, uint16_t val);
|
||||
extern void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize);
|
||||
extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize);
|
||||
|
||||
extern void dma_alias_set(void);
|
||||
extern void dma_alias_set_piix(void);
|
||||
extern void dma_alias_remove(void);
|
||||
extern void dma_alias_remove_piix(void);
|
||||
void dma_set_params(uint8_t advanced, uint32_t mask);
|
||||
void dma_set_mask(uint32_t mask);
|
||||
|
||||
extern void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize);
|
||||
extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize);
|
||||
void dma_set_at(uint8_t at);
|
||||
|
||||
void dma_set_params(uint8_t advanced, uint32_t mask);
|
||||
void dma_set_mask(uint32_t mask);
|
||||
void dma_ext_mode_init(void);
|
||||
void dma_high_page_init(void);
|
||||
|
||||
void dma_set_at(uint8_t at);
|
||||
void dma_remove_sg(void);
|
||||
void dma_set_sg_base(uint8_t sg_base);
|
||||
|
||||
void dma_ext_mode_init(void);
|
||||
void dma_high_page_init(void);
|
||||
|
||||
void dma_remove_sg(void);
|
||||
void dma_set_sg_base(uint8_t sg_base);
|
||||
|
||||
|
||||
#endif /*EMU_DMA_H*/
|
||||
#endif /*EMU_DMA_H*/
|
||||
|
||||
@@ -20,184 +20,184 @@
|
||||
* Copyright 2018-2020 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_FDC_H
|
||||
# define EMU_FDC_H
|
||||
#define EMU_FDC_H
|
||||
|
||||
extern int fdc_type;
|
||||
|
||||
#define FDC_PRIMARY_ADDR 0x03f0
|
||||
#define FDC_PRIMARY_IRQ 6
|
||||
#define FDC_PRIMARY_DMA 2
|
||||
#define FDC_PRIMARY_PCJR_ADDR 0x00f0
|
||||
#define FDC_PRIMARY_PCJR_IRQ 6
|
||||
#define FDC_PRIMARY_PCJR_DMA 2
|
||||
#define FDC_SECONDARY_ADDR 0x0370
|
||||
#define FDC_SECONDARY_IRQ 6
|
||||
#define FDC_SECONDARY_DMA 2
|
||||
#define FDC_TERTIARY_ADDR 0x0360
|
||||
#define FDC_TERTIARY_IRQ 6
|
||||
#define FDC_TERTIARY_DMA 2
|
||||
#define FDC_QUATERNARY_ADDR 0x03e0
|
||||
#define FDC_QUATERNARY_IRQ 6
|
||||
#define FDC_QUATERNARY_DMA 2
|
||||
|
||||
#define FDC_FLAG_PCJR 0x01 /* PCjr */
|
||||
#define FDC_FLAG_DISKCHG_ACTLOW 0x02 /* Amstrad, PS/1, PS/2 ISA */
|
||||
#define FDC_FLAG_AT 0x04 /* AT+, PS/x */
|
||||
#define FDC_FLAG_PS1 0x08 /* PS/1, PS/2 ISA */
|
||||
#define FDC_FLAG_SUPERIO 0x10 /* Super I/O chips */
|
||||
#define FDC_FLAG_START_RWC_1 0x20 /* W83877F, W83977F */
|
||||
#define FDC_FLAG_MORE_TRACKS 0x40 /* W83877F, W83977F, PC87306, PC87309 */
|
||||
#define FDC_FLAG_NSC 0x80 /* PC87306, PC87309 */
|
||||
#define FDC_FLAG_TOSHIBA 0x100 /* T1000, T1200 */
|
||||
#define FDC_FLAG_AMSTRAD 0x200 /* Non-AT Amstrad machines */
|
||||
#define FDC_FLAG_UMC 0x400 /* UMC UM8398 */
|
||||
#define FDC_PRIMARY_ADDR 0x03f0
|
||||
#define FDC_PRIMARY_IRQ 6
|
||||
#define FDC_PRIMARY_DMA 2
|
||||
#define FDC_PRIMARY_PCJR_ADDR 0x00f0
|
||||
#define FDC_PRIMARY_PCJR_IRQ 6
|
||||
#define FDC_PRIMARY_PCJR_DMA 2
|
||||
#define FDC_SECONDARY_ADDR 0x0370
|
||||
#define FDC_SECONDARY_IRQ 6
|
||||
#define FDC_SECONDARY_DMA 2
|
||||
#define FDC_TERTIARY_ADDR 0x0360
|
||||
#define FDC_TERTIARY_IRQ 6
|
||||
#define FDC_TERTIARY_DMA 2
|
||||
#define FDC_QUATERNARY_ADDR 0x03e0
|
||||
#define FDC_QUATERNARY_IRQ 6
|
||||
#define FDC_QUATERNARY_DMA 2
|
||||
|
||||
#define FDC_FLAG_PCJR 0x01 /* PCjr */
|
||||
#define FDC_FLAG_DISKCHG_ACTLOW 0x02 /* Amstrad, PS/1, PS/2 ISA */
|
||||
#define FDC_FLAG_AT 0x04 /* AT+, PS/x */
|
||||
#define FDC_FLAG_PS1 0x08 /* PS/1, PS/2 ISA */
|
||||
#define FDC_FLAG_SUPERIO 0x10 /* Super I/O chips */
|
||||
#define FDC_FLAG_START_RWC_1 0x20 /* W83877F, W83977F */
|
||||
#define FDC_FLAG_MORE_TRACKS 0x40 /* W83877F, W83977F, PC87306, PC87309 */
|
||||
#define FDC_FLAG_NSC 0x80 /* PC87306, PC87309 */
|
||||
#define FDC_FLAG_TOSHIBA 0x100 /* T1000, T1200 */
|
||||
#define FDC_FLAG_AMSTRAD 0x200 /* Non-AT Amstrad machines */
|
||||
#define FDC_FLAG_UMC 0x400 /* UMC UM8398 */
|
||||
#define FDC_FLAG_ALI 0x800 /* ALi M512x / M1543C */
|
||||
|
||||
typedef struct {
|
||||
uint8_t dor, stat, command, processed_cmd, dat, st0, swap, dtl;
|
||||
uint8_t swwp, disable_write, st5, st6, error;
|
||||
uint8_t params[8], res[11];
|
||||
uint8_t specify[2];
|
||||
uint8_t config, pretrk;
|
||||
uint8_t fifobuf[16];
|
||||
uint8_t dor, stat, command, processed_cmd, dat, st0, swap, dtl;
|
||||
uint8_t swwp, disable_write, st5, st6, error;
|
||||
uint8_t params[8], res[11];
|
||||
uint8_t specify[2];
|
||||
uint8_t config, pretrk;
|
||||
uint8_t fifobuf[16];
|
||||
|
||||
uint16_t base_address;
|
||||
uint16_t base_address;
|
||||
|
||||
int head, sector, drive, lastdrive;
|
||||
int pcn[4], eot[4];
|
||||
int rw_track, pos;
|
||||
int pnum, ptot;
|
||||
int rate, reset_stat;
|
||||
int lock, perp;
|
||||
int format_state, format_n;
|
||||
int step, seek_dir;
|
||||
int tc, noprec;
|
||||
int head, sector, drive, lastdrive;
|
||||
int pcn[4], eot[4];
|
||||
int rw_track, pos;
|
||||
int pnum, ptot;
|
||||
int rate, reset_stat;
|
||||
int lock, perp;
|
||||
int format_state, format_n;
|
||||
int step, seek_dir;
|
||||
int tc, noprec;
|
||||
|
||||
int data_ready, inread;
|
||||
int bitcell_period, enh_mode;
|
||||
int rwc[4], drvrate[4];
|
||||
int boot_drive, dma;
|
||||
int densel_polarity, densel_force;
|
||||
int fifo, tfifo;
|
||||
int fifobufpos, drv2en;
|
||||
int data_ready, inread;
|
||||
int bitcell_period, enh_mode;
|
||||
int rwc[4], drvrate[4];
|
||||
int boot_drive, dma;
|
||||
int densel_polarity, densel_force;
|
||||
int fifo, tfifo;
|
||||
int fifobufpos, drv2en;
|
||||
|
||||
int gap;
|
||||
int enable_3f1, format_sectors;
|
||||
int max_track, mfm;
|
||||
int deleted, wrong_am;
|
||||
int sc, satisfying_sectors;
|
||||
int fintr, rw_drive;
|
||||
int gap;
|
||||
int enable_3f1, format_sectors;
|
||||
int max_track, mfm;
|
||||
int deleted, wrong_am;
|
||||
int sc, satisfying_sectors;
|
||||
int fintr, rw_drive;
|
||||
|
||||
int flags, interrupt;
|
||||
int flags, interrupt;
|
||||
|
||||
int irq; /* Should be 6 by default. */
|
||||
int dma_ch; /* Should be 2 by default. */
|
||||
int irq; /* Should be 6 by default. */
|
||||
int dma_ch; /* Should be 2 by default. */
|
||||
|
||||
int bit_rate; /* Should be 250 at start. */
|
||||
int paramstogo;
|
||||
int bit_rate; /* Should be 250 at start. */
|
||||
int paramstogo;
|
||||
|
||||
sector_id_t read_track_sector, format_sector_id;
|
||||
sector_id_t read_track_sector, format_sector_id;
|
||||
|
||||
uint64_t watchdog_count;
|
||||
uint64_t watchdog_count;
|
||||
|
||||
pc_timer_t timer, watchdog_timer;
|
||||
pc_timer_t timer, watchdog_timer;
|
||||
} fdc_t;
|
||||
|
||||
|
||||
extern void fdc_remove(fdc_t *fdc);
|
||||
extern void fdc_poll(fdc_t *fdc);
|
||||
extern void fdc_abort(fdc_t *fdc);
|
||||
extern void fdc_set_dskchg_activelow(fdc_t *fdc);
|
||||
extern void fdc_3f1_enable(fdc_t *fdc, int enable);
|
||||
extern int fdc_get_bit_rate(fdc_t *fdc);
|
||||
extern int fdc_get_bitcell_period(fdc_t *fdc);
|
||||
extern void fdc_remove(fdc_t *fdc);
|
||||
extern void fdc_poll(fdc_t *fdc);
|
||||
extern void fdc_abort(fdc_t *fdc);
|
||||
extern void fdc_set_dskchg_activelow(fdc_t *fdc);
|
||||
extern void fdc_3f1_enable(fdc_t *fdc, int enable);
|
||||
extern int fdc_get_bit_rate(fdc_t *fdc);
|
||||
extern int fdc_get_bitcell_period(fdc_t *fdc);
|
||||
|
||||
/* A few functions to communicate between Super I/O chips and the FDC. */
|
||||
extern void fdc_update_enh_mode(fdc_t *fdc, int enh_mode);
|
||||
extern int fdc_get_rwc(fdc_t *fdc, int drive);
|
||||
extern void fdc_update_rwc(fdc_t *fdc, int drive, int rwc);
|
||||
extern int fdc_get_boot_drive(fdc_t *fdc);
|
||||
extern void fdc_update_boot_drive(fdc_t *fdc, int boot_drive);
|
||||
extern void fdc_update_densel_polarity(fdc_t *fdc, int densel_polarity);
|
||||
extern uint8_t fdc_get_densel_polarity(fdc_t *fdc);
|
||||
extern void fdc_update_densel_force(fdc_t *fdc, int densel_force);
|
||||
extern void fdc_update_drvrate(fdc_t *fdc, int drive, int drvrate);
|
||||
extern void fdc_update_drv2en(fdc_t *fdc, int drv2en);
|
||||
extern void fdc_update_enh_mode(fdc_t *fdc, int enh_mode);
|
||||
extern int fdc_get_rwc(fdc_t *fdc, int drive);
|
||||
extern void fdc_update_rwc(fdc_t *fdc, int drive, int rwc);
|
||||
extern int fdc_get_boot_drive(fdc_t *fdc);
|
||||
extern void fdc_update_boot_drive(fdc_t *fdc, int boot_drive);
|
||||
extern void fdc_update_densel_polarity(fdc_t *fdc, int densel_polarity);
|
||||
extern uint8_t fdc_get_densel_polarity(fdc_t *fdc);
|
||||
extern void fdc_update_densel_force(fdc_t *fdc, int densel_force);
|
||||
extern void fdc_update_drvrate(fdc_t *fdc, int drive, int drvrate);
|
||||
extern void fdc_update_drv2en(fdc_t *fdc, int drv2en);
|
||||
|
||||
extern void fdc_noidam(fdc_t *fdc);
|
||||
extern void fdc_nosector(fdc_t *fdc);
|
||||
extern void fdc_nodataam(fdc_t *fdc);
|
||||
extern void fdc_cannotformat(fdc_t *fdc);
|
||||
extern void fdc_wrongcylinder(fdc_t *fdc);
|
||||
extern void fdc_badcylinder(fdc_t *fdc);
|
||||
extern void fdc_writeprotect(fdc_t *fdc);
|
||||
extern void fdc_datacrcerror(fdc_t *fdc);
|
||||
extern void fdc_headercrcerror(fdc_t *fdc);
|
||||
extern void fdc_nosector(fdc_t *fdc);
|
||||
extern void fdc_noidam(fdc_t *fdc);
|
||||
extern void fdc_nosector(fdc_t *fdc);
|
||||
extern void fdc_nodataam(fdc_t *fdc);
|
||||
extern void fdc_cannotformat(fdc_t *fdc);
|
||||
extern void fdc_wrongcylinder(fdc_t *fdc);
|
||||
extern void fdc_badcylinder(fdc_t *fdc);
|
||||
extern void fdc_writeprotect(fdc_t *fdc);
|
||||
extern void fdc_datacrcerror(fdc_t *fdc);
|
||||
extern void fdc_headercrcerror(fdc_t *fdc);
|
||||
extern void fdc_nosector(fdc_t *fdc);
|
||||
|
||||
extern int real_drive(fdc_t *fdc, int drive);
|
||||
extern int real_drive(fdc_t *fdc, int drive);
|
||||
|
||||
extern sector_id_t fdc_get_read_track_sector(fdc_t *fdc);
|
||||
extern int fdc_get_compare_condition(fdc_t *fdc);
|
||||
extern int fdc_is_deleted(fdc_t *fdc);
|
||||
extern int fdc_is_sk(fdc_t *fdc);
|
||||
extern void fdc_set_wrong_am(fdc_t *fdc);
|
||||
extern int fdc_get_drive(fdc_t *fdc);
|
||||
extern int fdc_get_perp(fdc_t *fdc);
|
||||
extern int fdc_get_format_n(fdc_t *fdc);
|
||||
extern int fdc_is_mfm(fdc_t *fdc);
|
||||
extern double fdc_get_hut(fdc_t *fdc);
|
||||
extern double fdc_get_hlt(fdc_t *fdc);
|
||||
extern void fdc_request_next_sector_id(fdc_t *fdc);
|
||||
extern void fdc_stop_id_request(fdc_t *fdc);
|
||||
extern int fdc_get_gap(fdc_t *fdc);
|
||||
extern int fdc_get_gap2(fdc_t *fdc, int drive);
|
||||
extern int fdc_get_dtl(fdc_t *fdc);
|
||||
extern int fdc_get_format_sectors(fdc_t *fdc);
|
||||
extern uint8_t fdc_get_swwp(fdc_t *fdc);
|
||||
extern void fdc_set_swwp(fdc_t *fdc, uint8_t swwp);
|
||||
extern uint8_t fdc_get_diswr(fdc_t *fdc);
|
||||
extern void fdc_set_diswr(fdc_t *fdc, uint8_t diswr);
|
||||
extern uint8_t fdc_get_swap(fdc_t *fdc);
|
||||
extern void fdc_set_swap(fdc_t *fdc, uint8_t swap);
|
||||
extern int fdc_get_compare_condition(fdc_t *fdc);
|
||||
extern int fdc_is_deleted(fdc_t *fdc);
|
||||
extern int fdc_is_sk(fdc_t *fdc);
|
||||
extern void fdc_set_wrong_am(fdc_t *fdc);
|
||||
extern int fdc_get_drive(fdc_t *fdc);
|
||||
extern int fdc_get_perp(fdc_t *fdc);
|
||||
extern int fdc_get_format_n(fdc_t *fdc);
|
||||
extern int fdc_is_mfm(fdc_t *fdc);
|
||||
extern double fdc_get_hut(fdc_t *fdc);
|
||||
extern double fdc_get_hlt(fdc_t *fdc);
|
||||
extern void fdc_request_next_sector_id(fdc_t *fdc);
|
||||
extern void fdc_stop_id_request(fdc_t *fdc);
|
||||
extern int fdc_get_gap(fdc_t *fdc);
|
||||
extern int fdc_get_gap2(fdc_t *fdc, int drive);
|
||||
extern int fdc_get_dtl(fdc_t *fdc);
|
||||
extern int fdc_get_format_sectors(fdc_t *fdc);
|
||||
extern uint8_t fdc_get_swwp(fdc_t *fdc);
|
||||
extern void fdc_set_swwp(fdc_t *fdc, uint8_t swwp);
|
||||
extern uint8_t fdc_get_diswr(fdc_t *fdc);
|
||||
extern void fdc_set_diswr(fdc_t *fdc, uint8_t diswr);
|
||||
extern uint8_t fdc_get_swap(fdc_t *fdc);
|
||||
extern void fdc_set_swap(fdc_t *fdc, uint8_t swap);
|
||||
|
||||
extern void fdc_finishcompare(fdc_t *fdc, int satisfying);
|
||||
extern void fdc_finishread(fdc_t *fdc);
|
||||
extern void fdc_sector_finishcompare(fdc_t *fdc, int satisfying);
|
||||
extern void fdc_sector_finishread(fdc_t *fdc);
|
||||
extern void fdc_track_finishread(fdc_t *fdc, int condition);
|
||||
extern int fdc_is_verify(fdc_t *fdc);
|
||||
extern void fdc_finishcompare(fdc_t *fdc, int satisfying);
|
||||
extern void fdc_finishread(fdc_t *fdc);
|
||||
extern void fdc_sector_finishcompare(fdc_t *fdc, int satisfying);
|
||||
extern void fdc_sector_finishread(fdc_t *fdc);
|
||||
extern void fdc_track_finishread(fdc_t *fdc, int condition);
|
||||
extern int fdc_is_verify(fdc_t *fdc);
|
||||
|
||||
extern void fdc_overrun(fdc_t *fdc);
|
||||
extern void fdc_set_base(fdc_t *fdc, int base);
|
||||
extern void fdc_set_irq(fdc_t *fdc, int irq);
|
||||
extern void fdc_set_dma_ch(fdc_t *fdc, int dma_ch);
|
||||
extern int fdc_getdata(fdc_t *fdc, int last);
|
||||
extern int fdc_data(fdc_t *fdc, uint8_t data, int last);
|
||||
extern void fdc_overrun(fdc_t *fdc);
|
||||
extern void fdc_set_base(fdc_t *fdc, int base);
|
||||
extern void fdc_set_irq(fdc_t *fdc, int irq);
|
||||
extern void fdc_set_dma_ch(fdc_t *fdc, int dma_ch);
|
||||
extern int fdc_getdata(fdc_t *fdc, int last);
|
||||
extern int fdc_data(fdc_t *fdc, uint8_t data, int last);
|
||||
|
||||
extern void fdc_sectorid(fdc_t *fdc, uint8_t track, uint8_t side,
|
||||
uint8_t sector, uint8_t size, uint8_t crc1,
|
||||
uint8_t crc2);
|
||||
extern void fdc_sectorid(fdc_t *fdc, uint8_t track, uint8_t side,
|
||||
uint8_t sector, uint8_t size, uint8_t crc1,
|
||||
uint8_t crc2);
|
||||
|
||||
extern uint8_t fdc_read(uint16_t addr, void *priv);
|
||||
extern void fdc_reset(void *priv);
|
||||
extern uint8_t fdc_read(uint16_t addr, void *priv);
|
||||
extern void fdc_reset(void *priv);
|
||||
|
||||
extern uint8_t fdc_get_current_drive(void);
|
||||
extern uint8_t fdc_get_current_drive(void);
|
||||
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t fdc_xt_device;
|
||||
extern const device_t fdc_xt_t1x00_device;
|
||||
extern const device_t fdc_xt_tandy_device;
|
||||
extern const device_t fdc_xt_amstrad_device;
|
||||
extern const device_t fdc_pcjr_device;
|
||||
extern const device_t fdc_at_device;
|
||||
extern const device_t fdc_at_actlow_device;
|
||||
extern const device_t fdc_at_ps1_device;
|
||||
extern const device_t fdc_at_smc_device;
|
||||
extern const device_t fdc_at_winbond_device;
|
||||
extern const device_t fdc_at_nsc_device;
|
||||
extern const device_t fdc_dp8473_device;
|
||||
extern const device_t fdc_um8398_device;
|
||||
extern const device_t fdc_xt_device;
|
||||
extern const device_t fdc_xt_t1x00_device;
|
||||
extern const device_t fdc_xt_tandy_device;
|
||||
extern const device_t fdc_xt_amstrad_device;
|
||||
extern const device_t fdc_pcjr_device;
|
||||
extern const device_t fdc_at_device;
|
||||
extern const device_t fdc_at_actlow_device;
|
||||
extern const device_t fdc_at_ps1_device;
|
||||
extern const device_t fdc_at_smc_device;
|
||||
extern const device_t fdc_at_ali_device;
|
||||
extern const device_t fdc_at_winbond_device;
|
||||
extern const device_t fdc_at_nsc_device;
|
||||
extern const device_t fdc_dp8473_device;
|
||||
extern const device_t fdc_um8398_device;
|
||||
#endif
|
||||
|
||||
#endif /*EMU_FDC_H*/
|
||||
#endif /*EMU_FDC_H*/
|
||||
|
||||
@@ -20,12 +20,12 @@
|
||||
* Copyright 2018-2020 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_FDC_EXT_H
|
||||
# define EMU_FDC_EXT_H
|
||||
#define EMU_FDC_EXT_H
|
||||
|
||||
extern int fdc_type;
|
||||
|
||||
/* Controller types. */
|
||||
#define FDC_INTERNAL 0
|
||||
#define FDC_INTERNAL 0
|
||||
|
||||
extern const device_t fdc_b215_device;
|
||||
extern const device_t fdc_pii151b_device;
|
||||
@@ -33,10 +33,10 @@ extern const device_t fdc_pii158b_device;
|
||||
|
||||
extern void fdc_card_init(void);
|
||||
|
||||
extern char *fdc_card_get_internal_name(int card);
|
||||
extern int fdc_card_get_from_internal_name(char *s);
|
||||
extern char *fdc_card_get_internal_name(int card);
|
||||
extern int fdc_card_get_from_internal_name(char *s);
|
||||
extern const device_t *fdc_card_getdevice(int card);
|
||||
extern int fdc_card_has_config(int card);
|
||||
extern int fdc_card_available(int card);
|
||||
extern int fdc_card_has_config(int card);
|
||||
extern int fdc_card_available(int card);
|
||||
|
||||
#endif /*EMU_FDC_H*/
|
||||
#endif /*EMU_FDC_H*/
|
||||
|
||||
@@ -19,178 +19,173 @@
|
||||
* Copyright 2018 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_FDD_H
|
||||
# define EMU_FDD_H
|
||||
|
||||
|
||||
#define FDD_NUM 4
|
||||
#define SEEK_RECALIBRATE -999
|
||||
#define EMU_FDD_H
|
||||
|
||||
#define FDD_NUM 4
|
||||
#define FLOPPY_IMAGE_HISTORY 4
|
||||
#define SEEK_RECALIBRATE -999
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern int fdd_swap;
|
||||
extern int fdd_swap;
|
||||
|
||||
extern void fdd_set_motor_enable(int drive, int motor_enable);
|
||||
extern void fdd_do_seek(int drive, int track);
|
||||
extern void fdd_forced_seek(int drive, int track_diff);
|
||||
extern void fdd_seek(int drive, int track_diff);
|
||||
extern int fdd_track0(int drive);
|
||||
extern int fdd_getrpm(int drive);
|
||||
extern void fdd_set_densel(int densel);
|
||||
extern int fdd_can_read_medium(int drive);
|
||||
extern int fdd_doublestep_40(int drive);
|
||||
extern int fdd_is_525(int drive);
|
||||
extern int fdd_is_dd(int drive);
|
||||
extern int fdd_is_ed(int drive);
|
||||
extern int fdd_is_double_sided(int drive);
|
||||
extern void fdd_set_head(int drive, int head);
|
||||
extern int fdd_get_head(int drive);
|
||||
extern void fdd_set_turbo(int drive, int turbo);
|
||||
extern int fdd_get_turbo(int drive);
|
||||
extern void fdd_set_check_bpb(int drive, int check_bpb);
|
||||
extern int fdd_get_check_bpb(int drive);
|
||||
extern void fdd_set_motor_enable(int drive, int motor_enable);
|
||||
extern void fdd_do_seek(int drive, int track);
|
||||
extern void fdd_forced_seek(int drive, int track_diff);
|
||||
extern void fdd_seek(int drive, int track_diff);
|
||||
extern int fdd_track0(int drive);
|
||||
extern int fdd_getrpm(int drive);
|
||||
extern void fdd_set_densel(int densel);
|
||||
extern int fdd_can_read_medium(int drive);
|
||||
extern int fdd_doublestep_40(int drive);
|
||||
extern int fdd_is_525(int drive);
|
||||
extern int fdd_is_dd(int drive);
|
||||
extern int fdd_is_ed(int drive);
|
||||
extern int fdd_is_double_sided(int drive);
|
||||
extern void fdd_set_head(int drive, int head);
|
||||
extern int fdd_get_head(int drive);
|
||||
extern void fdd_set_turbo(int drive, int turbo);
|
||||
extern int fdd_get_turbo(int drive);
|
||||
extern void fdd_set_check_bpb(int drive, int check_bpb);
|
||||
extern int fdd_get_check_bpb(int drive);
|
||||
|
||||
extern void fdd_set_type(int drive, int type);
|
||||
extern int fdd_get_type(int drive);
|
||||
extern void fdd_set_type(int drive, int type);
|
||||
extern int fdd_get_type(int drive);
|
||||
|
||||
extern int fdd_get_flags(int drive);
|
||||
extern int fdd_get_densel(int drive);
|
||||
extern int fdd_get_flags(int drive);
|
||||
extern int fdd_get_densel(int drive);
|
||||
|
||||
extern char *fdd_getname(int type);
|
||||
extern char *fdd_getname(int type);
|
||||
|
||||
extern char *fdd_get_internal_name(int type);
|
||||
extern int fdd_get_from_internal_name(char *s);
|
||||
|
||||
extern int fdd_current_track(int drive);
|
||||
extern char *fdd_get_internal_name(int type);
|
||||
extern int fdd_get_from_internal_name(char *s);
|
||||
|
||||
extern int fdd_current_track(int drive);
|
||||
|
||||
typedef struct {
|
||||
int id;
|
||||
int id;
|
||||
|
||||
void (*seek)(int drive, int track);
|
||||
void (*readsector)(int drive, int sector, int track, int side,
|
||||
int density, int sector_size);
|
||||
void (*writesector)(int drive, int sector, int track, int side,
|
||||
int density, int sector_size);
|
||||
void (*comparesector)(int drive, int sector, int track, int side,
|
||||
int density, int sector_size);
|
||||
void (*readaddress)(int drive, int side, int density);
|
||||
void (*format)(int drive, int side, int density, uint8_t fill);
|
||||
int (*hole)(int drive);
|
||||
uint64_t (*byteperiod)(int drive);
|
||||
void (*stop)(int drive);
|
||||
void (*poll)(int drive);
|
||||
void (*seek)(int drive, int track);
|
||||
void (*readsector)(int drive, int sector, int track, int side,
|
||||
int density, int sector_size);
|
||||
void (*writesector)(int drive, int sector, int track, int side,
|
||||
int density, int sector_size);
|
||||
void (*comparesector)(int drive, int sector, int track, int side,
|
||||
int density, int sector_size);
|
||||
void (*readaddress)(int drive, int side, int density);
|
||||
void (*format)(int drive, int side, int density, uint8_t fill);
|
||||
int (*hole)(int drive);
|
||||
uint64_t (*byteperiod)(int drive);
|
||||
void (*stop)(int drive);
|
||||
void (*poll)(int drive);
|
||||
} DRIVE;
|
||||
|
||||
extern DRIVE drives[FDD_NUM];
|
||||
extern char floppyfns[FDD_NUM][512];
|
||||
extern char *fdd_image_history[FDD_NUM][FLOPPY_IMAGE_HISTORY];
|
||||
extern pc_timer_t fdd_poll_time[FDD_NUM];
|
||||
extern int ui_writeprot[FDD_NUM];
|
||||
|
||||
extern DRIVE drives[FDD_NUM];
|
||||
extern char floppyfns[FDD_NUM][512];
|
||||
extern pc_timer_t fdd_poll_time[FDD_NUM];
|
||||
extern int ui_writeprot[FDD_NUM];
|
||||
extern int curdrive;
|
||||
|
||||
extern int curdrive;
|
||||
extern int fdd_time;
|
||||
extern int64_t floppytime;
|
||||
|
||||
extern int fdd_time;
|
||||
extern int64_t floppytime;
|
||||
extern void fdd_load(int drive, char *fn);
|
||||
extern void fdd_new(int drive, char *fn);
|
||||
extern void fdd_close(int drive);
|
||||
extern void fdd_init(void);
|
||||
extern void fdd_reset(void);
|
||||
extern void fdd_seek(int drive, int track);
|
||||
extern void fdd_readsector(int drive, int sector, int track,
|
||||
int side, int density, int sector_size);
|
||||
extern void fdd_writesector(int drive, int sector, int track,
|
||||
int side, int density, int sector_size);
|
||||
extern void fdd_comparesector(int drive, int sector, int track,
|
||||
int side, int density, int sector_size);
|
||||
extern void fdd_readaddress(int drive, int side, int density);
|
||||
extern void fdd_format(int drive, int side, int density, uint8_t fill);
|
||||
extern int fdd_hole(int drive);
|
||||
extern void fdd_stop(int drive);
|
||||
extern void fdd_do_writeback(int drive);
|
||||
|
||||
extern int motorspin;
|
||||
extern uint64_t motoron[FDD_NUM];
|
||||
|
||||
extern void fdd_load(int drive, char *fn);
|
||||
extern void fdd_new(int drive, char *fn);
|
||||
extern void fdd_close(int drive);
|
||||
extern void fdd_init(void);
|
||||
extern void fdd_reset(void);
|
||||
extern void fdd_seek(int drive, int track);
|
||||
extern void fdd_readsector(int drive, int sector, int track,
|
||||
int side, int density, int sector_size);
|
||||
extern void fdd_writesector(int drive, int sector, int track,
|
||||
int side, int density, int sector_size);
|
||||
extern void fdd_comparesector(int drive, int sector, int track,
|
||||
int side, int density, int sector_size);
|
||||
extern void fdd_readaddress(int drive, int side, int density);
|
||||
extern void fdd_format(int drive, int side, int density, uint8_t fill);
|
||||
extern int fdd_hole(int drive);
|
||||
extern void fdd_stop(int drive);
|
||||
extern void fdd_do_writeback(int drive);
|
||||
extern int swwp;
|
||||
extern int disable_write;
|
||||
|
||||
extern int motorspin;
|
||||
extern uint64_t motoron[FDD_NUM];
|
||||
extern int defaultwriteprot;
|
||||
|
||||
extern int swwp;
|
||||
extern int disable_write;
|
||||
|
||||
extern int defaultwriteprot;
|
||||
|
||||
extern int writeprot[FDD_NUM], fwriteprot[FDD_NUM];
|
||||
extern int fdd_changed[FDD_NUM];
|
||||
extern int drive_empty[FDD_NUM];
|
||||
extern int writeprot[FDD_NUM], fwriteprot[FDD_NUM];
|
||||
extern int fdd_changed[FDD_NUM];
|
||||
extern int drive_empty[FDD_NUM];
|
||||
|
||||
/*Used in the Read A Track command. Only valid for fdd_readsector(). */
|
||||
#define SECTOR_FIRST -2
|
||||
#define SECTOR_NEXT -1
|
||||
|
||||
typedef union {
|
||||
uint16_t word;
|
||||
uint8_t bytes[2];
|
||||
uint16_t word;
|
||||
uint8_t bytes[2];
|
||||
} crc_t;
|
||||
|
||||
void fdd_calccrc(uint8_t byte, crc_t *crc_var);
|
||||
|
||||
typedef struct {
|
||||
uint16_t (*disk_flags)(int drive);
|
||||
uint16_t (*side_flags)(int drive);
|
||||
void (*writeback)(int drive);
|
||||
void (*set_sector)(int drive, int side, uint8_t c, uint8_t h,
|
||||
uint8_t r, uint8_t n);
|
||||
uint8_t (*read_data)(int drive, int side, uint16_t pos);
|
||||
void (*write_data)(int drive, int side, uint16_t pos,
|
||||
uint8_t data);
|
||||
int (*format_conditions)(int drive);
|
||||
int32_t (*extra_bit_cells)(int drive, int side);
|
||||
uint16_t* (*encoded_data)(int drive, int side);
|
||||
void (*read_revolution)(int drive);
|
||||
uint32_t (*index_hole_pos)(int drive, int side);
|
||||
uint32_t (*get_raw_size)(int drive, int side);
|
||||
uint16_t (*disk_flags)(int drive);
|
||||
uint16_t (*side_flags)(int drive);
|
||||
void (*writeback)(int drive);
|
||||
void (*set_sector)(int drive, int side, uint8_t c, uint8_t h,
|
||||
uint8_t r, uint8_t n);
|
||||
uint8_t (*read_data)(int drive, int side, uint16_t pos);
|
||||
void (*write_data)(int drive, int side, uint16_t pos,
|
||||
uint8_t data);
|
||||
int (*format_conditions)(int drive);
|
||||
int32_t (*extra_bit_cells)(int drive, int side);
|
||||
uint16_t *(*encoded_data)(int drive, int side);
|
||||
void (*read_revolution)(int drive);
|
||||
uint32_t (*index_hole_pos)(int drive, int side);
|
||||
uint32_t (*get_raw_size)(int drive, int side);
|
||||
|
||||
uint8_t check_crc;
|
||||
} d86f_handler_t;
|
||||
|
||||
extern const int gap3_sizes[5][8][48];
|
||||
extern const int gap3_sizes[5][8][48];
|
||||
|
||||
extern const uint8_t dmf_r[21];
|
||||
extern const uint8_t xdf_physical_sectors[2][2];
|
||||
extern const uint8_t xdf_gap3_sizes[2][2];
|
||||
extern const uint16_t xdf_trackx_spos[2][8];
|
||||
extern const uint8_t dmf_r[21];
|
||||
extern const uint8_t xdf_physical_sectors[2][2];
|
||||
extern const uint8_t xdf_gap3_sizes[2][2];
|
||||
extern const uint16_t xdf_trackx_spos[2][8];
|
||||
|
||||
typedef struct {
|
||||
uint8_t h;
|
||||
uint8_t r;
|
||||
uint8_t h;
|
||||
uint8_t r;
|
||||
} xdf_id_t;
|
||||
|
||||
typedef union {
|
||||
uint16_t word;
|
||||
xdf_id_t id;
|
||||
uint16_t word;
|
||||
xdf_id_t id;
|
||||
} xdf_sector_t;
|
||||
|
||||
extern const xdf_sector_t xdf_img_layout[2][2][46];
|
||||
extern const xdf_sector_t xdf_disk_layout[2][2][38];
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint8_t c;
|
||||
uint8_t h;
|
||||
uint8_t r;
|
||||
uint8_t n;
|
||||
uint8_t c;
|
||||
uint8_t h;
|
||||
uint8_t r;
|
||||
uint8_t n;
|
||||
} sector_id_fields_t;
|
||||
|
||||
typedef union {
|
||||
uint32_t dword;
|
||||
uint8_t byte_array[4];
|
||||
uint32_t dword;
|
||||
uint8_t byte_array[4];
|
||||
sector_id_fields_t id;
|
||||
} sector_id_t;
|
||||
|
||||
|
||||
void d86f_set_fdc(void *fdc);
|
||||
void fdi_set_fdc(void *fdc);
|
||||
void fdd_set_fdc(void *fdc);
|
||||
@@ -198,10 +193,8 @@ void imd_set_fdc(void *fdc);
|
||||
void img_set_fdc(void *fdc);
|
||||
void mfm_set_fdc(void *fdc);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_FDD_H*/
|
||||
#endif /*EMU_FDD_H*/
|
||||
|
||||
@@ -17,94 +17,90 @@
|
||||
* Copyright 2018,2019 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_FLOPPY_86F_H
|
||||
# define EMU_FLOPPY_86F_H
|
||||
#define EMU_FLOPPY_86F_H
|
||||
|
||||
|
||||
#define D86FVER 0x020C
|
||||
#define D86FVER 0x020C
|
||||
|
||||
/* Thesere were borrowed from TeleDisk. */
|
||||
#define SECTOR_DUPLICATED 0x01
|
||||
#define SECTOR_CRC_ERROR 0x02
|
||||
#define SECTOR_DELETED_DATA 0x04
|
||||
#define SECTOR_DATA_SKIPPED 0x10
|
||||
#define SECTOR_NO_DATA 0x20
|
||||
#define SECTOR_NO_ID 0x40
|
||||
#define SECTOR_DUPLICATED 0x01
|
||||
#define SECTOR_CRC_ERROR 0x02
|
||||
#define SECTOR_DELETED_DATA 0x04
|
||||
#define SECTOR_DATA_SKIPPED 0x10
|
||||
#define SECTOR_NO_DATA 0x20
|
||||
#define SECTOR_NO_ID 0x40
|
||||
|
||||
#define length_gap0 80
|
||||
#define length_gap1 50
|
||||
#define length_sync 12
|
||||
#define length_am 4
|
||||
#define length_crc 2
|
||||
#define length_gap0 80
|
||||
#define length_gap1 50
|
||||
#define length_sync 12
|
||||
#define length_am 4
|
||||
#define length_crc 2
|
||||
|
||||
#define IBM
|
||||
#define MFM
|
||||
#ifdef IBM
|
||||
#define pre_gap1 length_gap0 + length_sync + length_am
|
||||
# define pre_gap1 length_gap0 + length_sync + length_am
|
||||
#else
|
||||
#define pre_gap1 0
|
||||
# define pre_gap1 0
|
||||
#endif
|
||||
|
||||
#define pre_track pre_gap1 + length_gap1
|
||||
#define pre_gap length_sync + length_am + 4 + length_crc
|
||||
#define pre_data length_sync + length_am
|
||||
#define post_gap length_crc
|
||||
#define pre_track pre_gap1 + length_gap1
|
||||
#define pre_gap length_sync + length_am + 4 + length_crc
|
||||
#define pre_data length_sync + length_am
|
||||
#define post_gap length_crc
|
||||
|
||||
extern d86f_handler_t d86f_handler[FDD_NUM];
|
||||
|
||||
extern d86f_handler_t d86f_handler[FDD_NUM];
|
||||
extern void d86f_init(void);
|
||||
extern void d86f_load(int drive, char *fn);
|
||||
extern void d86f_close(int drive);
|
||||
extern void d86f_seek(int drive, int track);
|
||||
extern int d86f_hole(int drive);
|
||||
extern uint64_t d86f_byteperiod(int drive);
|
||||
extern void d86f_stop(int drive);
|
||||
extern void d86f_poll(int drive);
|
||||
extern int d86f_realtrack(int track, int drive);
|
||||
extern void d86f_reset(int drive, int side);
|
||||
extern void d86f_readsector(int drive, int sector, int track, int side, int density, int sector_size);
|
||||
extern void d86f_writesector(int drive, int sector, int track, int side, int density, int sector_size);
|
||||
extern void d86f_comparesector(int drive, int sector, int track, int side, int rate, int sector_size);
|
||||
extern void d86f_readaddress(int drive, int side, int density);
|
||||
extern void d86f_format(int drive, int side, int density, uint8_t fill);
|
||||
|
||||
extern void d86f_prepare_track_layout(int drive, int side);
|
||||
extern void d86f_set_version(int drive, uint16_t version);
|
||||
extern uint16_t d86f_side_flags(int drive);
|
||||
extern uint16_t d86f_track_flags(int drive);
|
||||
extern void d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n);
|
||||
extern void d86f_initialize_linked_lists(int drive);
|
||||
extern void d86f_destroy_linked_lists(int drive, int side);
|
||||
|
||||
extern void d86f_init(void);
|
||||
extern void d86f_load(int drive, char *fn);
|
||||
extern void d86f_close(int drive);
|
||||
extern void d86f_seek(int drive, int track);
|
||||
extern int d86f_hole(int drive);
|
||||
extern uint64_t d86f_byteperiod(int drive);
|
||||
extern void d86f_stop(int drive);
|
||||
extern void d86f_poll(int drive);
|
||||
extern int d86f_realtrack(int track, int drive);
|
||||
extern void d86f_reset(int drive, int side);
|
||||
extern void d86f_readsector(int drive, int sector, int track, int side, int density, int sector_size);
|
||||
extern void d86f_writesector(int drive, int sector, int track, int side, int density, int sector_size);
|
||||
extern void d86f_comparesector(int drive, int sector, int track, int side, int rate, int sector_size);
|
||||
extern void d86f_readaddress(int drive, int side, int density);
|
||||
extern void d86f_format(int drive, int side, int density, uint8_t fill);
|
||||
extern uint16_t d86f_prepare_sector(int drive, int side, int prev_pos, uint8_t *id_buf, uint8_t *data_buf,
|
||||
int data_len, int gap2, int gap3, int flags);
|
||||
extern void d86f_setup(int drive);
|
||||
extern void d86f_destroy(int drive);
|
||||
extern int d86f_export(int drive, char *fn);
|
||||
extern void d86f_unregister(int drive);
|
||||
extern void d86f_common_handlers(int drive);
|
||||
extern void d86f_set_version(int drive, uint16_t version);
|
||||
extern int d86f_is_40_track(int drive);
|
||||
extern void d86f_reset_index_hole_pos(int drive, int side);
|
||||
extern uint16_t d86f_prepare_pretrack(int drive, int side, int iso);
|
||||
extern void d86f_set_track_pos(int drive, uint32_t track_pos);
|
||||
extern void d86f_set_cur_track(int drive, int track);
|
||||
extern void d86f_zero_track(int drive);
|
||||
extern void d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n);
|
||||
extern void d86f_initialize_linked_lists(int drive);
|
||||
extern void d86f_destroy_linked_lists(int drive, int side);
|
||||
|
||||
extern void d86f_prepare_track_layout(int drive, int side);
|
||||
extern void d86f_set_version(int drive, uint16_t version);
|
||||
extern uint16_t d86f_side_flags(int drive);
|
||||
extern uint16_t d86f_track_flags(int drive);
|
||||
extern void d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n);
|
||||
extern void d86f_initialize_linked_lists(int drive);
|
||||
extern void d86f_destroy_linked_lists(int drive, int side);
|
||||
extern uint16_t *common_encoded_data(int drive, int side);
|
||||
extern void common_read_revolution(int drive);
|
||||
extern uint32_t common_get_raw_size(int drive, int side);
|
||||
|
||||
extern uint16_t d86f_prepare_sector(int drive, int side, int prev_pos, uint8_t *id_buf, uint8_t *data_buf,
|
||||
int data_len, int gap2, int gap3, int flags);
|
||||
extern void d86f_setup(int drive);
|
||||
extern void d86f_destroy(int drive);
|
||||
extern int d86f_export(int drive, char *fn);
|
||||
extern void d86f_unregister(int drive);
|
||||
extern void d86f_common_handlers(int drive);
|
||||
extern void d86f_set_version(int drive, uint16_t version);
|
||||
extern int d86f_is_40_track(int drive);
|
||||
extern void d86f_reset_index_hole_pos(int drive, int side);
|
||||
extern uint16_t d86f_prepare_pretrack(int drive, int side, int iso);
|
||||
extern void d86f_set_track_pos(int drive, uint32_t track_pos);
|
||||
extern void d86f_set_cur_track(int drive, int track);
|
||||
extern void d86f_zero_track(int drive);
|
||||
extern void d86f_initialize_last_sector_id(int drive, int c, int h, int r, int n);
|
||||
extern void d86f_initialize_linked_lists(int drive);
|
||||
extern void d86f_destroy_linked_lists(int drive, int side);
|
||||
extern void null_writeback(int drive);
|
||||
extern void null_write_data(int drive, int side, uint16_t pos, uint8_t data);
|
||||
extern int null_format_conditions(int drive);
|
||||
extern int32_t null_extra_bit_cells(int drive, int side);
|
||||
extern void null_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n);
|
||||
extern uint32_t null_index_hole_pos(int drive, int side);
|
||||
|
||||
extern uint16_t *common_encoded_data(int drive, int side);
|
||||
extern void common_read_revolution(int drive);
|
||||
extern uint32_t common_get_raw_size(int drive, int side);
|
||||
|
||||
extern void null_writeback(int drive);
|
||||
extern void null_write_data(int drive, int side, uint16_t pos, uint8_t data);
|
||||
extern int null_format_conditions(int drive);
|
||||
extern int32_t null_extra_bit_cells(int drive, int side);
|
||||
extern void null_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n);
|
||||
extern uint32_t null_index_hole_pos(int drive, int side);
|
||||
|
||||
|
||||
#endif /*EMU_FLOPPY_86F_H*/
|
||||
#endif /*EMU_FLOPPY_86F_H*/
|
||||
|
||||
@@ -15,21 +15,18 @@
|
||||
* Copyright 2017,2018 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef FDD_COMMON_H
|
||||
# define FDD_COMMON_H
|
||||
#define FDD_COMMON_H
|
||||
|
||||
extern const uint8_t fdd_holes[6];
|
||||
extern const uint8_t fdd_rates[6];
|
||||
extern const double fdd_bit_rates_300[6];
|
||||
extern const uint8_t fdd_max_sectors[8][6];
|
||||
extern const uint8_t fdd_dmf_r[21];
|
||||
|
||||
extern const uint8_t fdd_holes[6];
|
||||
extern const uint8_t fdd_rates[6];
|
||||
extern const double fdd_bit_rates_300[6];
|
||||
extern const uint8_t fdd_max_sectors[8][6];
|
||||
extern const uint8_t fdd_dmf_r[21];
|
||||
extern int fdd_get_gap3_size(int rate, int size, int sector);
|
||||
extern uint8_t fdd_sector_size_code(int size);
|
||||
extern int fdd_sector_code_size(uint8_t code);
|
||||
extern int fdd_bps_valid(uint16_t bps);
|
||||
extern int fdd_interleave(int sector, int skew, int spt);
|
||||
|
||||
|
||||
extern int fdd_get_gap3_size(int rate, int size, int sector);
|
||||
extern uint8_t fdd_sector_size_code(int size);
|
||||
extern int fdd_sector_code_size(uint8_t code);
|
||||
extern int fdd_bps_valid(uint16_t bps);
|
||||
extern int fdd_interleave(int sector, int skew, int spt);
|
||||
|
||||
|
||||
#endif /*FDD_COMMON_H*/
|
||||
#endif /*FDD_COMMON_H*/
|
||||
|
||||
@@ -20,12 +20,10 @@
|
||||
* Copyright 2018 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_FLOPPY_FDI_H
|
||||
# define EMU_FLOPPY_FDI_H
|
||||
#define EMU_FLOPPY_FDI_H
|
||||
|
||||
extern void fdi_seek(int drive, int track);
|
||||
extern void fdi_load(int drive, char *fn);
|
||||
extern void fdi_close(int drive);
|
||||
|
||||
extern void fdi_seek(int drive, int track);
|
||||
extern void fdi_load(int drive, char *fn);
|
||||
extern void fdi_close(int drive);
|
||||
|
||||
|
||||
#endif /*EMU_FLOPPY_FDI_H*/
|
||||
#endif /*EMU_FLOPPY_FDI_H*/
|
||||
|
||||
@@ -35,12 +35,10 @@
|
||||
* USA.
|
||||
*/
|
||||
#ifndef EMU_FLOPPY_IMD_H
|
||||
# define EMU_FLOPPY_IMD_H
|
||||
|
||||
#define EMU_FLOPPY_IMD_H
|
||||
|
||||
extern void imd_init(void);
|
||||
extern void imd_load(int drive, char *fn);
|
||||
extern void imd_close(int drive);
|
||||
|
||||
|
||||
#endif /*EMU_FLOPPY_IMD_H*/
|
||||
#endif /*EMU_FLOPPY_IMD_H*/
|
||||
|
||||
@@ -20,12 +20,10 @@
|
||||
* Copyright 2018 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_FLOPPY_IMG_H
|
||||
# define EMU_FLOPPY_IMG_H
|
||||
#define EMU_FLOPPY_IMG_H
|
||||
|
||||
extern void img_init(void);
|
||||
extern void img_load(int drive, char *fn);
|
||||
extern void img_close(int drive);
|
||||
|
||||
extern void img_init(void);
|
||||
extern void img_load(int drive, char *fn);
|
||||
extern void img_close(int drive);
|
||||
|
||||
|
||||
#endif /*EMU_FLOPPY_IMG_H*/
|
||||
#endif /*EMU_FLOPPY_IMG_H*/
|
||||
|
||||
@@ -45,12 +45,10 @@
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#ifndef EMU_FLOPPY_JSON_H
|
||||
# define EMU_FLOPPY_JSON_H
|
||||
#define EMU_FLOPPY_JSON_H
|
||||
|
||||
extern void json_init(void);
|
||||
extern void json_load(int drive, char *fn);
|
||||
extern void json_close(int drive);
|
||||
|
||||
extern void json_init(void);
|
||||
extern void json_load(int drive, char *fn);
|
||||
extern void json_close(int drive);
|
||||
|
||||
|
||||
#endif /*EMU_FLOPPY_JSON_H*/
|
||||
#endif /*EMU_FLOPPY_JSON_H*/
|
||||
|
||||
@@ -15,12 +15,10 @@
|
||||
* Copyright 2018 Miran Grca.
|
||||
*/
|
||||
#ifndef EMU_FLOPPY_MFM_H
|
||||
# define EMU_FLOPPY_MFM_H
|
||||
#define EMU_FLOPPY_MFM_H
|
||||
|
||||
extern void mfm_seek(int drive, int track);
|
||||
extern void mfm_load(int drive, char *fn);
|
||||
extern void mfm_close(int drive);
|
||||
|
||||
extern void mfm_seek(int drive, int track);
|
||||
extern void mfm_load(int drive, char *fn);
|
||||
extern void mfm_close(int drive);
|
||||
|
||||
|
||||
#endif /*EMU_FLOPPY_MFM_H*/
|
||||
#endif /*EMU_FLOPPY_MFM_H*/
|
||||
|
||||
@@ -17,12 +17,10 @@
|
||||
* Copyright 2017,2018 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_FLOPPY_TD0_H
|
||||
# define EMU_FLOPPY_TD0_H
|
||||
|
||||
#define EMU_FLOPPY_TD0_H
|
||||
|
||||
extern void td0_init(void);
|
||||
extern void td0_load(int drive, char *fn);
|
||||
extern void td0_close(int drive);
|
||||
|
||||
|
||||
#endif /*EMU_FLOPPY_TD0_H*/
|
||||
#endif /*EMU_FLOPPY_TD0_H*/
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
#ifndef EMU_FIFO8_H
|
||||
#define EMU_FIFO8_H
|
||||
|
||||
|
||||
typedef struct {
|
||||
/* All fields are private */
|
||||
uint8_t *data;
|
||||
@@ -26,7 +25,7 @@ extern void fifo8_create(Fifo8 *fifo, uint32_t capacity);
|
||||
* @fifo: FIFO to cleanup
|
||||
*
|
||||
* Cleanup a FIFO created with fifo8_create(). Frees memory created for FIFO
|
||||
*storage. The FIFO is no longer usable after this has been called.
|
||||
*storage. The FIFO is no longer usable after this has been called.
|
||||
*/
|
||||
|
||||
extern void fifo8_destroy(Fifo8 *fifo);
|
||||
|
||||
@@ -1,135 +1,143 @@
|
||||
#ifndef EMU_FILTERS_H
|
||||
# define EMU_FILTERS_H
|
||||
#define EMU_FILTERS_H
|
||||
|
||||
#define NCoef 2
|
||||
|
||||
/* fc=150Hz */
|
||||
static inline float adgold_highpass_iir(int i, float NewSample) {
|
||||
float ACoef[NCoef+1] = {
|
||||
static inline float
|
||||
adgold_highpass_iir(int i, float NewSample)
|
||||
{
|
||||
float ACoef[NCoef + 1] = {
|
||||
0.98657437157334349000,
|
||||
-1.97314874314668700000,
|
||||
0.98657437157334349000
|
||||
};
|
||||
|
||||
float BCoef[NCoef+1] = {
|
||||
float BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.97223372919758360000,
|
||||
0.97261396931534050000
|
||||
};
|
||||
|
||||
static float y[2][NCoef+1]; /* output samples */
|
||||
static float x[2][NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static float y[2][NCoef + 1]; /* output samples */
|
||||
static float x[2][NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[i][n] = x[i][n-1];
|
||||
y[i][n] = y[i][n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[i][n] = x[i][n - 1];
|
||||
y[i][n] = y[i][n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[i][0] = NewSample;
|
||||
y[i][0] = ACoef[0] * x[i][0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[i][0] += ACoef[n] * x[i][n] - BCoef[n] * y[i][n];
|
||||
|
||||
return y[i][0];
|
||||
}
|
||||
|
||||
/* fc=150Hz */
|
||||
static inline float adgold_lowpass_iir(int i, float NewSample) {
|
||||
float ACoef[NCoef+1] = {
|
||||
static inline float
|
||||
adgold_lowpass_iir(int i, float NewSample)
|
||||
{
|
||||
float ACoef[NCoef + 1] = {
|
||||
0.00009159473951071446,
|
||||
0.00018318947902142891,
|
||||
0.00009159473951071446
|
||||
};
|
||||
|
||||
float BCoef[NCoef+1] = {
|
||||
float BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.97223372919526560000,
|
||||
0.97261396931306277000
|
||||
};
|
||||
|
||||
static float y[2][NCoef+1]; /* output samples */
|
||||
static float x[2][NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static float y[2][NCoef + 1]; /* output samples */
|
||||
static float x[2][NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[i][n] = x[i][n-1];
|
||||
y[i][n] = y[i][n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[i][n] = x[i][n - 1];
|
||||
y[i][n] = y[i][n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[i][0] = NewSample;
|
||||
y[i][0] = ACoef[0] * x[i][0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[i][0] += ACoef[n] * x[i][n] - BCoef[n] * y[i][n];
|
||||
|
||||
return y[i][0];
|
||||
}
|
||||
|
||||
/* fc=56Hz */
|
||||
static inline float adgold_pseudo_stereo_iir(float NewSample) {
|
||||
float ACoef[NCoef+1] = {
|
||||
static inline float
|
||||
adgold_pseudo_stereo_iir(float NewSample)
|
||||
{
|
||||
float ACoef[NCoef + 1] = {
|
||||
0.00001409030866231767,
|
||||
0.00002818061732463533,
|
||||
0.00001409030866231767
|
||||
};
|
||||
|
||||
float BCoef[NCoef+1] = {
|
||||
float BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.98733021473466760000,
|
||||
0.98738361004063568000
|
||||
};
|
||||
|
||||
static float y[NCoef+1]; /* output samples */
|
||||
static float x[NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static float y[NCoef + 1]; /* output samples */
|
||||
static float x[NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[n] = x[n-1];
|
||||
y[n] = y[n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[n] = x[n - 1];
|
||||
y[n] = y[n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[0] = NewSample;
|
||||
y[0] = ACoef[0] * x[0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[0] += ACoef[n] * x[n] - BCoef[n] * y[n];
|
||||
|
||||
return y[0];
|
||||
}
|
||||
|
||||
/* fc=3.2kHz - probably incorrect */
|
||||
static inline float dss_iir(float NewSample) {
|
||||
float ACoef[NCoef+1] = {
|
||||
static inline float
|
||||
dss_iir(float NewSample)
|
||||
{
|
||||
float ACoef[NCoef + 1] = {
|
||||
0.03356837051492005100,
|
||||
0.06713674102984010200,
|
||||
0.03356837051492005100
|
||||
};
|
||||
|
||||
float BCoef[NCoef+1] = {
|
||||
float BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.41898265221812010000,
|
||||
0.55326988968868285000
|
||||
};
|
||||
|
||||
static float y[NCoef+1]; /* output samples */
|
||||
static float x[NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static float y[NCoef + 1]; /* output samples */
|
||||
static float x[NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[n] = x[n-1];
|
||||
y[n] = y[n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[n] = x[n - 1];
|
||||
y[n] = y[n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[0] = NewSample;
|
||||
y[0] = ACoef[0] * x[0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[0] += ACoef[n] * x[n] - BCoef[n] * y[n];
|
||||
|
||||
return y[0];
|
||||
@@ -138,197 +146,208 @@ static inline float dss_iir(float NewSample) {
|
||||
#undef NCoef
|
||||
#define NCoef 1
|
||||
/*Basic high pass to remove DC bias. fc=10Hz*/
|
||||
static inline float dac_iir(int i, float NewSample) {
|
||||
float ACoef[NCoef+1] = {
|
||||
static inline float
|
||||
dac_iir(int i, float NewSample)
|
||||
{
|
||||
float ACoef[NCoef + 1] = {
|
||||
0.99901119820285345000,
|
||||
-0.99901119820285345000
|
||||
};
|
||||
|
||||
float BCoef[NCoef+1] = {
|
||||
float BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-0.99869185905052738000
|
||||
};
|
||||
|
||||
static float y[2][NCoef+1]; /* output samples */
|
||||
static float x[2][NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static float y[2][NCoef + 1]; /* output samples */
|
||||
static float x[2][NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[i][n] = x[i][n-1];
|
||||
y[i][n] = y[i][n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[i][n] = x[i][n - 1];
|
||||
y[i][n] = y[i][n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[i][0] = NewSample;
|
||||
y[i][0] = ACoef[0] * x[i][0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[i][0] += ACoef[n] * x[i][n] - BCoef[n] * y[i][n];
|
||||
|
||||
return y[i][0];
|
||||
}
|
||||
|
||||
|
||||
#undef NCoef
|
||||
#define NCoef 2
|
||||
|
||||
/* fc=350Hz */
|
||||
static inline double low_iir(int c, int i, double NewSample) {
|
||||
double ACoef[NCoef+1] = {
|
||||
static inline double
|
||||
low_iir(int c, int i, double NewSample)
|
||||
{
|
||||
double ACoef[NCoef + 1] = {
|
||||
0.00049713569693400649,
|
||||
0.00099427139386801299,
|
||||
0.00049713569693400649
|
||||
};
|
||||
|
||||
double BCoef[NCoef+1] = {
|
||||
double BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.93522955470669530000,
|
||||
0.93726236021404663000
|
||||
};
|
||||
|
||||
static double y[2][2][NCoef+1]; /* output samples */
|
||||
static double x[2][2][NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static double y[2][2][NCoef + 1]; /* output samples */
|
||||
static double x[2][2][NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[c][i][n] = x[c][i][n-1];
|
||||
y[c][i][n] = y[c][i][n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[c][i][n] = x[c][i][n - 1];
|
||||
y[c][i][n] = y[c][i][n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[c][i][0] = NewSample;
|
||||
y[c][i][0] = ACoef[0] * x[c][i][0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n];
|
||||
|
||||
return y[c][i][0];
|
||||
}
|
||||
|
||||
/* fc=350Hz */
|
||||
static inline double low_cut_iir(int c, int i, double NewSample) {
|
||||
double ACoef[NCoef+1] = {
|
||||
static inline double
|
||||
low_cut_iir(int c, int i, double NewSample)
|
||||
{
|
||||
double ACoef[NCoef + 1] = {
|
||||
0.96839970114733542000,
|
||||
-1.93679940229467080000,
|
||||
0.96839970114733542000
|
||||
};
|
||||
|
||||
double BCoef[NCoef+1] = {
|
||||
double BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.93522955471202770000,
|
||||
0.93726236021916731000
|
||||
};
|
||||
|
||||
static double y[2][2][NCoef+1]; /* output samples */
|
||||
static double x[2][2][NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static double y[2][2][NCoef + 1]; /* output samples */
|
||||
static double x[2][2][NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[c][i][n] = x[c][i][n-1];
|
||||
y[c][i][n] = y[c][i][n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[c][i][n] = x[c][i][n - 1];
|
||||
y[c][i][n] = y[c][i][n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[c][i][0] = NewSample;
|
||||
y[c][i][0] = ACoef[0] * x[c][i][0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n];
|
||||
|
||||
return y[c][i][0];
|
||||
}
|
||||
|
||||
/* fc=3.5kHz */
|
||||
static inline double high_iir(int c, int i, double NewSample) {
|
||||
double ACoef[NCoef+1] = {
|
||||
static inline double
|
||||
high_iir(int c, int i, double NewSample)
|
||||
{
|
||||
double ACoef[NCoef + 1] = {
|
||||
0.72248704753064896000,
|
||||
-1.44497409506129790000,
|
||||
0.72248704753064896000
|
||||
};
|
||||
|
||||
double BCoef[NCoef+1] = {
|
||||
double BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.36640781670578510000,
|
||||
0.52352474706139873000
|
||||
};
|
||||
static double y[2][2][NCoef+1]; /* output samples */
|
||||
static double x[2][2][NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static double y[2][2][NCoef + 1]; /* output samples */
|
||||
static double x[2][2][NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[c][i][n] = x[c][i][n-1];
|
||||
y[c][i][n] = y[c][i][n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[c][i][n] = x[c][i][n - 1];
|
||||
y[c][i][n] = y[c][i][n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[c][i][0] = NewSample;
|
||||
y[c][i][0] = ACoef[0] * x[c][i][0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n];
|
||||
|
||||
return y[c][i][0];
|
||||
}
|
||||
|
||||
/* fc=3.5kHz */
|
||||
static inline double high_cut_iir(int c, int i, double NewSample) {
|
||||
double ACoef[NCoef+1] = {
|
||||
static inline double
|
||||
high_cut_iir(int c, int i, double NewSample)
|
||||
{
|
||||
double ACoef[NCoef + 1] = {
|
||||
0.03927726802250377400,
|
||||
0.07855453604500754700,
|
||||
0.03927726802250377400
|
||||
};
|
||||
|
||||
double BCoef[NCoef+1] = {
|
||||
double BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.36640781666419950000,
|
||||
0.52352474703279628000
|
||||
};
|
||||
static double y[2][2][NCoef+1]; /* output samples */
|
||||
static double x[2][2][NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static double y[2][2][NCoef + 1]; /* output samples */
|
||||
static double x[2][2][NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[c][i][n] = x[c][i][n-1];
|
||||
y[c][i][n] = y[c][i][n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[c][i][n] = x[c][i][n - 1];
|
||||
y[c][i][n] = y[c][i][n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[c][i][0] = NewSample;
|
||||
y[c][i][0] = ACoef[0] * x[c][i][0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n];
|
||||
|
||||
return y[c][i][0];
|
||||
}
|
||||
|
||||
/* fc=5.283kHz, gain=-9.477dB, width=0.4845 */
|
||||
static inline double deemph_iir(int i, double NewSample) {
|
||||
double ACoef[NCoef+1] = {
|
||||
static inline double
|
||||
deemph_iir(int i, double NewSample)
|
||||
{
|
||||
double ACoef[NCoef + 1] = {
|
||||
0.46035077886318842566,
|
||||
-0.28440821191249848754,
|
||||
0.03388877229118691936
|
||||
};
|
||||
|
||||
double BCoef[NCoef+1] = {
|
||||
double BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.05429146278569141337,
|
||||
0.26412280202756849290
|
||||
};
|
||||
static double y[2][NCoef+1]; /* output samples */
|
||||
static double x[2][NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static double y[2][NCoef + 1]; /* output samples */
|
||||
static double x[2][NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[i][n] = x[i][n-1];
|
||||
y[i][n] = y[i][n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[i][n] = x[i][n - 1];
|
||||
y[i][n] = y[i][n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[i][0] = NewSample;
|
||||
y[i][0] = ACoef[0] * x[i][0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[i][0] += ACoef[n] * x[i][n] - BCoef[n] * y[i][n];
|
||||
|
||||
return y[i][0];
|
||||
@@ -338,69 +357,69 @@ static inline double deemph_iir(int i, double NewSample) {
|
||||
#define NCoef 2
|
||||
|
||||
/* fc=3.2kHz */
|
||||
static inline double sb_iir(int c, int i, double NewSample) {
|
||||
double ACoef[NCoef+1] = {
|
||||
static inline double
|
||||
sb_iir(int c, int i, double NewSample)
|
||||
{
|
||||
double ACoef[NCoef + 1] = {
|
||||
0.03356837051492005100,
|
||||
0.06713674102984010200,
|
||||
0.03356837051492005100
|
||||
};
|
||||
|
||||
double BCoef[NCoef+1] = {
|
||||
double BCoef[NCoef + 1] = {
|
||||
1.00000000000000000000,
|
||||
-1.41898265221812010000,
|
||||
0.55326988968868285000
|
||||
};
|
||||
|
||||
static double y[2][2][NCoef+1]; /* output samples */
|
||||
static double x[2][2][NCoef+1]; /* input samples */
|
||||
int n;
|
||||
static double y[2][2][NCoef + 1]; /* output samples */
|
||||
static double x[2][2][NCoef + 1]; /* input samples */
|
||||
int n;
|
||||
|
||||
/* shift the old samples */
|
||||
for(n=NCoef; n>0; n--) {
|
||||
x[c][i][n] = x[c][i][n-1];
|
||||
y[c][i][n] = y[c][i][n-1];
|
||||
for (n = NCoef; n > 0; n--) {
|
||||
x[c][i][n] = x[c][i][n - 1];
|
||||
y[c][i][n] = y[c][i][n - 1];
|
||||
}
|
||||
|
||||
/* Calculate the new output */
|
||||
x[c][i][0] = NewSample;
|
||||
y[c][i][0] = ACoef[0] * x[c][i][0];
|
||||
for(n=1; n<=NCoef; n++)
|
||||
for (n = 1; n <= NCoef; n++)
|
||||
y[c][i][0] += ACoef[n] * x[c][i][n] - BCoef[n] * y[c][i][n];
|
||||
|
||||
return y[c][i][0];
|
||||
}
|
||||
|
||||
|
||||
|
||||
#undef NCoef
|
||||
#define NCoef 1
|
||||
#define NCoef 1
|
||||
#define SB16_NCoef 51
|
||||
|
||||
extern double low_fir_sb16_coef[2][SB16_NCoef];
|
||||
|
||||
static inline double low_fir_sb16(int c, int i, double NewSample)
|
||||
static inline double
|
||||
low_fir_sb16(int c, int i, double NewSample)
|
||||
{
|
||||
static double x[2][2][SB16_NCoef+1]; //input samples
|
||||
static int pos[2] = { 0, 0 };
|
||||
double out = 0.0;
|
||||
int n;
|
||||
static double x[2][2][SB16_NCoef + 1]; // input samples
|
||||
static int pos[2] = { 0, 0 };
|
||||
double out = 0.0;
|
||||
int n;
|
||||
|
||||
/* Calculate the new output */
|
||||
x[c][i][pos[c]] = NewSample;
|
||||
/* Calculate the new output */
|
||||
x[c][i][pos[c]] = NewSample;
|
||||
|
||||
for (n = 0; n < ((SB16_NCoef+1)-pos[c]) && n < SB16_NCoef; n++)
|
||||
out += low_fir_sb16_coef[c][n] * x[c][i][n+pos[c]];
|
||||
for (; n < SB16_NCoef; n++)
|
||||
out += low_fir_sb16_coef[c][n] * x[c][i][(n+pos[c]) - (SB16_NCoef+1)];
|
||||
for (n = 0; n < ((SB16_NCoef + 1) - pos[c]) && n < SB16_NCoef; n++)
|
||||
out += low_fir_sb16_coef[c][n] * x[c][i][n + pos[c]];
|
||||
for (; n < SB16_NCoef; n++)
|
||||
out += low_fir_sb16_coef[c][n] * x[c][i][(n + pos[c]) - (SB16_NCoef + 1)];
|
||||
|
||||
if (i == 1)
|
||||
{
|
||||
pos[c]++;
|
||||
if (pos[c] > SB16_NCoef)
|
||||
pos[c] = 0;
|
||||
}
|
||||
if (i == 1) {
|
||||
pos[c]++;
|
||||
if (pos[c] > SB16_NCoef)
|
||||
pos[c] = 0;
|
||||
}
|
||||
|
||||
return out;
|
||||
return out;
|
||||
}
|
||||
|
||||
#endif /*EMU_FILTERS_H*/
|
||||
|
||||
@@ -15,7 +15,7 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_FLASH_H
|
||||
# define EMU_FLASH_H
|
||||
#define EMU_FLASH_H
|
||||
|
||||
extern const device_t catalyst_flash_device;
|
||||
|
||||
|
||||
@@ -19,141 +19,138 @@
|
||||
* Copyright 2021 RichardG.
|
||||
*/
|
||||
#ifndef EMU_GAMEPORT_H
|
||||
# define EMU_GAMEPORT_H
|
||||
#define EMU_GAMEPORT_H
|
||||
|
||||
#define MAX_PLAT_JOYSTICKS 8
|
||||
#define MAX_JOYSTICKS 4
|
||||
|
||||
#define MAX_PLAT_JOYSTICKS 8
|
||||
#define MAX_JOYSTICKS 4
|
||||
#define POV_X 0x80000000
|
||||
#define POV_Y 0x40000000
|
||||
#define SLIDER 0x20000000
|
||||
|
||||
#define POV_X 0x80000000
|
||||
#define POV_Y 0x40000000
|
||||
#define SLIDER 0x20000000
|
||||
#define AXIS_NOT_PRESENT -99999
|
||||
|
||||
#define AXIS_NOT_PRESENT -99999
|
||||
#define JOYSTICK_PRESENT(n) (joystick_state[n].plat_joystick_nr != 0)
|
||||
|
||||
#define JOYSTICK_PRESENT(n) (joystick_state[n].plat_joystick_nr != 0)
|
||||
|
||||
#define GAMEPORT_SIO 0x1000000
|
||||
#define GAMEPORT_SIO 0x1000000
|
||||
|
||||
typedef struct {
|
||||
char name[260];
|
||||
char name[260];
|
||||
|
||||
int a[8];
|
||||
int b[32];
|
||||
int p[4];
|
||||
int s[2];
|
||||
int a[8];
|
||||
int b[32];
|
||||
int p[4];
|
||||
int s[2];
|
||||
|
||||
struct {
|
||||
char name[260];
|
||||
int id;
|
||||
} axis[8];
|
||||
char name[260];
|
||||
int id;
|
||||
} axis[8];
|
||||
|
||||
struct {
|
||||
char name[260];
|
||||
int id;
|
||||
} button[32];
|
||||
char name[260];
|
||||
int id;
|
||||
} button[32];
|
||||
|
||||
struct {
|
||||
char name[260];
|
||||
int id;
|
||||
} pov[4];
|
||||
char name[260];
|
||||
int id;
|
||||
} pov[4];
|
||||
|
||||
struct
|
||||
struct
|
||||
{
|
||||
char name[260];
|
||||
int id;
|
||||
} slider[2];
|
||||
char name[260];
|
||||
int id;
|
||||
} slider[2];
|
||||
|
||||
int nr_axes;
|
||||
int nr_buttons;
|
||||
int nr_povs;
|
||||
int nr_sliders;
|
||||
int nr_axes;
|
||||
int nr_buttons;
|
||||
int nr_povs;
|
||||
int nr_sliders;
|
||||
} plat_joystick_t;
|
||||
|
||||
typedef struct {
|
||||
int axis[8];
|
||||
int button[32];
|
||||
int pov[4];
|
||||
int axis[8];
|
||||
int button[32];
|
||||
int pov[4];
|
||||
|
||||
int plat_joystick_nr;
|
||||
int axis_mapping[8];
|
||||
int button_mapping[32];
|
||||
int pov_mapping[4][2];
|
||||
int plat_joystick_nr;
|
||||
int axis_mapping[8];
|
||||
int button_mapping[32];
|
||||
int pov_mapping[4][2];
|
||||
} joystick_t;
|
||||
|
||||
typedef struct {
|
||||
const char *name;
|
||||
const char *internal_name;
|
||||
|
||||
void *(*init)(void);
|
||||
void (*close)(void *p);
|
||||
uint8_t (*read)(void *p);
|
||||
void (*write)(void *p);
|
||||
int (*read_axis)(void *p, int axis);
|
||||
void (*a0_over)(void *p);
|
||||
void *(*init)(void);
|
||||
void (*close)(void *p);
|
||||
uint8_t (*read)(void *p);
|
||||
void (*write)(void *p);
|
||||
int (*read_axis)(void *p, int axis);
|
||||
void (*a0_over)(void *p);
|
||||
|
||||
int axis_count,
|
||||
button_count,
|
||||
pov_count;
|
||||
int max_joysticks;
|
||||
const char *axis_names[8];
|
||||
const char *button_names[32];
|
||||
const char *pov_names[4];
|
||||
int axis_count,
|
||||
button_count,
|
||||
pov_count;
|
||||
int max_joysticks;
|
||||
const char *axis_names[8];
|
||||
const char *button_names[32];
|
||||
const char *pov_names[4];
|
||||
} joystick_if_t;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t gameport_device;
|
||||
extern const device_t gameport_201_device;
|
||||
extern const device_t gameport_203_device;
|
||||
extern const device_t gameport_205_device;
|
||||
extern const device_t gameport_207_device;
|
||||
extern const device_t gameport_208_device;
|
||||
extern const device_t gameport_209_device;
|
||||
extern const device_t gameport_20b_device;
|
||||
extern const device_t gameport_20d_device;
|
||||
extern const device_t gameport_20f_device;
|
||||
extern const device_t gameport_tm_acm_device;
|
||||
extern const device_t gameport_pnp_device;
|
||||
extern const device_t gameport_pnp_6io_device;
|
||||
extern const device_t gameport_sio_device;
|
||||
extern const device_t gameport_device;
|
||||
extern const device_t gameport_201_device;
|
||||
extern const device_t gameport_203_device;
|
||||
extern const device_t gameport_205_device;
|
||||
extern const device_t gameport_207_device;
|
||||
extern const device_t gameport_208_device;
|
||||
extern const device_t gameport_209_device;
|
||||
extern const device_t gameport_20b_device;
|
||||
extern const device_t gameport_20d_device;
|
||||
extern const device_t gameport_20f_device;
|
||||
extern const device_t gameport_tm_acm_device;
|
||||
extern const device_t gameport_pnp_device;
|
||||
extern const device_t gameport_pnp_6io_device;
|
||||
extern const device_t gameport_sio_device;
|
||||
extern const device_t gameport_sio_1io_device;
|
||||
|
||||
extern const device_t *standalone_gameport_type;
|
||||
extern const device_t *standalone_gameport_type;
|
||||
#endif
|
||||
extern int gameport_instance_id;
|
||||
extern plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS];
|
||||
extern joystick_t joystick_state[MAX_JOYSTICKS];
|
||||
extern int joysticks_present;
|
||||
extern int gameport_instance_id;
|
||||
extern plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS];
|
||||
extern joystick_t joystick_state[MAX_JOYSTICKS];
|
||||
extern int joysticks_present;
|
||||
|
||||
extern int joystick_type;
|
||||
extern int joystick_type;
|
||||
|
||||
extern void joystick_init(void);
|
||||
extern void joystick_close(void);
|
||||
extern void joystick_process(void);
|
||||
|
||||
extern void joystick_init(void);
|
||||
extern void joystick_close(void);
|
||||
extern void joystick_process(void);
|
||||
extern char *joystick_get_name(int js);
|
||||
extern char *joystick_get_internal_name(int js);
|
||||
extern int joystick_get_from_internal_name(char *s);
|
||||
extern int joystick_get_max_joysticks(int js);
|
||||
extern int joystick_get_axis_count(int js);
|
||||
extern int joystick_get_button_count(int js);
|
||||
extern int joystick_get_pov_count(int js);
|
||||
extern char *joystick_get_axis_name(int js, int id);
|
||||
extern char *joystick_get_button_name(int js, int id);
|
||||
extern char *joystick_get_pov_name(int js, int id);
|
||||
|
||||
extern char *joystick_get_name(int js);
|
||||
extern char *joystick_get_internal_name(int js);
|
||||
extern int joystick_get_from_internal_name(char *s);
|
||||
extern int joystick_get_max_joysticks(int js);
|
||||
extern int joystick_get_axis_count(int js);
|
||||
extern int joystick_get_button_count(int js);
|
||||
extern int joystick_get_pov_count(int js);
|
||||
extern char *joystick_get_axis_name(int js, int id);
|
||||
extern char *joystick_get_button_name(int js, int id);
|
||||
extern char *joystick_get_pov_name(int js, int id);
|
||||
|
||||
extern void gameport_update_joystick_type(void);
|
||||
extern void gameport_remap(void *priv, uint16_t address);
|
||||
extern void *gameport_add(const device_t *gameport_type);
|
||||
extern void gameport_update_joystick_type(void);
|
||||
extern void gameport_remap(void *priv, uint16_t address);
|
||||
extern void *gameport_add(const device_t *gameport_type);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_GAMEPORT_H*/
|
||||
#endif /*EMU_GAMEPORT_H*/
|
||||
|
||||
@@ -17,78 +17,74 @@
|
||||
* Copyright 2017-2020 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_HDC_H
|
||||
# define EMU_HDC_H
|
||||
#define EMU_HDC_H
|
||||
|
||||
#define MFM_NUM 2 /* 2 drives per controller supported */
|
||||
#define ESDI_NUM 2 /* 2 drives per controller supported */
|
||||
#define XTA_NUM 2 /* 2 drives per controller supported */
|
||||
#define IDE_NUM 10 /* 8 drives per AT IDE + 2 for XT IDE */
|
||||
#define ATAPI_NUM 8 /* 8 drives per AT IDE */
|
||||
#define SCSI_NUM 16 /* theoretically the controller can have at \
|
||||
* least 7 devices, with each device being \
|
||||
* able to support 8 units, but hey... */
|
||||
|
||||
#define MFM_NUM 2 /* 2 drives per controller supported */
|
||||
#define ESDI_NUM 2 /* 2 drives per controller supported */
|
||||
#define XTA_NUM 2 /* 2 drives per controller supported */
|
||||
#define IDE_NUM 10 /* 8 drives per AT IDE + 2 for XT IDE */
|
||||
#define ATAPI_NUM 8 /* 8 drives per AT IDE */
|
||||
#define SCSI_NUM 16 /* theoretically the controller can have at
|
||||
* least 7 devices, with each device being
|
||||
* able to support 8 units, but hey... */
|
||||
extern int hdc_current;
|
||||
|
||||
extern int hdc_current;
|
||||
extern const device_t st506_xt_xebec_device; /* st506_xt_xebec */
|
||||
extern const device_t st506_xt_dtc5150x_device; /* st506_xt_dtc */
|
||||
extern const device_t st506_xt_st11_m_device; /* st506_xt_st11_m */
|
||||
extern const device_t st506_xt_st11_r_device; /* st506_xt_st11_m */
|
||||
extern const device_t st506_xt_wd1002a_wx1_device; /* st506_xt_wd1002a_wx1 */
|
||||
extern const device_t st506_xt_wd1002a_27x_device; /* st506_xt_wd1002a_27x */
|
||||
extern const device_t st506_at_wd1003_device; /* st506_at_wd1003 */
|
||||
extern const device_t st506_xt_wd1004a_wx1_device; /* st506_xt_wd1004a_wx1 */
|
||||
extern const device_t st506_xt_wd1004_27x_device; /* st506_xt_wd1004_27x */
|
||||
extern const device_t st506_xt_wd1004a_27x_device; /* st506_xt_wd1004a_27x */
|
||||
|
||||
extern const device_t esdi_at_wd1007vse1_device; /* esdi_at */
|
||||
extern const device_t esdi_ps2_device; /* esdi_mca */
|
||||
|
||||
extern const device_t st506_xt_xebec_device; /* st506_xt_xebec */
|
||||
extern const device_t st506_xt_dtc5150x_device; /* st506_xt_dtc */
|
||||
extern const device_t st506_xt_st11_m_device; /* st506_xt_st11_m */
|
||||
extern const device_t st506_xt_st11_r_device; /* st506_xt_st11_m */
|
||||
extern const device_t st506_xt_wd1002a_wx1_device; /* st506_xt_wd1002a_wx1 */
|
||||
extern const device_t st506_xt_wd1002a_27x_device; /* st506_xt_wd1002a_27x */
|
||||
extern const device_t st506_at_wd1003_device; /* st506_at_wd1003 */
|
||||
extern const device_t st506_xt_wd1004a_wx1_device; /* st506_xt_wd1004a_wx1 */
|
||||
extern const device_t st506_xt_wd1004_27x_device; /* st506_xt_wd1004_27x */
|
||||
extern const device_t st506_xt_wd1004a_27x_device; /* st506_xt_wd1004a_27x */
|
||||
extern const device_t ide_isa_device; /* isa_ide */
|
||||
extern const device_t ide_isa_2ch_device; /* isa_ide_2ch */
|
||||
extern const device_t ide_isa_2ch_opt_device; /* isa_ide_2ch_opt */
|
||||
extern const device_t ide_vlb_device; /* vlb_ide */
|
||||
extern const device_t ide_vlb_2ch_device; /* vlb_ide_2ch */
|
||||
extern const device_t ide_pci_device; /* pci_ide */
|
||||
extern const device_t ide_pci_2ch_device; /* pci_ide_2ch */
|
||||
|
||||
extern const device_t esdi_at_wd1007vse1_device; /* esdi_at */
|
||||
extern const device_t esdi_ps2_device; /* esdi_mca */
|
||||
extern const device_t ide_cmd640_vlb_device; /* CMD PCI-640B VLB */
|
||||
extern const device_t ide_cmd640_vlb_178_device; /* CMD PCI-640B VLB (Port 178h) */
|
||||
extern const device_t ide_cmd640_pci_device; /* CMD PCI-640B PCI */
|
||||
extern const device_t ide_cmd640_pci_legacy_only_device; /* CMD PCI-640B PCI (Legacy Mode Only) */
|
||||
extern const device_t ide_cmd640_pci_single_channel_device; /* CMD PCI-640B PCI (Only primary channel) */
|
||||
extern const device_t ide_cmd646_device; /* CMD PCI-646 */
|
||||
extern const device_t ide_cmd646_legacy_only_device; /* CMD PCI-646 (Legacy Mode Only) */
|
||||
extern const device_t ide_cmd646_single_channel_device; /* CMD PCI-646 (Only primary channel) */
|
||||
|
||||
extern const device_t ide_isa_device; /* isa_ide */
|
||||
extern const device_t ide_isa_2ch_device; /* isa_ide_2ch */
|
||||
extern const device_t ide_isa_2ch_opt_device; /* isa_ide_2ch_opt */
|
||||
extern const device_t ide_vlb_device; /* vlb_ide */
|
||||
extern const device_t ide_vlb_2ch_device; /* vlb_ide_2ch */
|
||||
extern const device_t ide_pci_device; /* pci_ide */
|
||||
extern const device_t ide_pci_2ch_device; /* pci_ide_2ch */
|
||||
extern const device_t ide_opti611_vlb_device; /* OPTi 82c611/611A VLB */
|
||||
|
||||
extern const device_t ide_cmd640_vlb_device; /* CMD PCI-640B VLB */
|
||||
extern const device_t ide_cmd640_vlb_178_device; /* CMD PCI-640B VLB (Port 178h) */
|
||||
extern const device_t ide_cmd640_pci_device; /* CMD PCI-640B PCI */
|
||||
extern const device_t ide_cmd640_pci_legacy_only_device; /* CMD PCI-640B PCI (Legacy Mode Only) */
|
||||
extern const device_t ide_cmd640_pci_single_channel_device; /* CMD PCI-640B PCI (Only primary channel) */
|
||||
extern const device_t ide_cmd646_device; /* CMD PCI-646 */
|
||||
extern const device_t ide_cmd646_legacy_only_device; /* CMD PCI-646 (Legacy Mode Only) */
|
||||
extern const device_t ide_cmd646_single_channel_device; /* CMD PCI-646 (Only primary channel) */
|
||||
extern const device_t ide_ter_device;
|
||||
extern const device_t ide_ter_pnp_device;
|
||||
extern const device_t ide_qua_device;
|
||||
extern const device_t ide_qua_pnp_device;
|
||||
|
||||
extern const device_t ide_opti611_vlb_device; /* OPTi 82c611/611A VLB */
|
||||
extern const device_t xta_wdxt150_device; /* xta_wdxt150 */
|
||||
extern const device_t xta_hd20_device; /* EuroPC internal */
|
||||
|
||||
extern const device_t ide_ter_device;
|
||||
extern const device_t ide_ter_pnp_device;
|
||||
extern const device_t ide_qua_device;
|
||||
extern const device_t ide_qua_pnp_device;
|
||||
extern const device_t xtide_device; /* xtide_xt */
|
||||
extern const device_t xtide_at_device; /* xtide_at */
|
||||
extern const device_t xtide_at_386_device; /* xtide_at_386 */
|
||||
extern const device_t xtide_acculogic_device; /* xtide_ps2 */
|
||||
extern const device_t xtide_at_ps2_device; /* xtide_at_ps2 */
|
||||
|
||||
extern const device_t xta_wdxt150_device; /* xta_wdxt150 */
|
||||
extern const device_t xta_hd20_device; /* EuroPC internal */
|
||||
extern void hdc_init(void);
|
||||
extern void hdc_reset(void);
|
||||
|
||||
extern const device_t xtide_device; /* xtide_xt */
|
||||
extern const device_t xtide_at_device; /* xtide_at */
|
||||
extern const device_t xtide_at_386_device; /* xtide_at_386 */
|
||||
extern const device_t xtide_acculogic_device; /* xtide_ps2 */
|
||||
extern const device_t xtide_at_ps2_device; /* xtide_at_ps2 */
|
||||
extern char *hdc_get_internal_name(int hdc);
|
||||
extern int hdc_get_from_internal_name(char *s);
|
||||
extern int hdc_has_config(int hdc);
|
||||
extern const device_t *hdc_get_device(int hdc);
|
||||
extern int hdc_get_flags(int hdc);
|
||||
extern int hdc_available(int hdc);
|
||||
|
||||
|
||||
extern void hdc_init(void);
|
||||
extern void hdc_reset(void);
|
||||
|
||||
extern char *hdc_get_internal_name(int hdc);
|
||||
extern int hdc_get_from_internal_name(char *s);
|
||||
extern int hdc_has_config(int hdc);
|
||||
extern const device_t *hdc_get_device(int hdc);
|
||||
extern int hdc_get_flags(int hdc);
|
||||
extern int hdc_available(int hdc);
|
||||
|
||||
|
||||
#endif /*EMU_HDC_H*/
|
||||
#endif /*EMU_HDC_H*/
|
||||
|
||||
@@ -17,11 +17,14 @@
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
*/
|
||||
#ifndef EMU_IDE_H
|
||||
# define EMU_IDE_H
|
||||
#define EMU_IDE_H
|
||||
|
||||
#define IDE_BUS_MAX 4
|
||||
#define IDE_CHAN_MAX 2
|
||||
|
||||
#define HDC_PRIMARY_BASE 0x01F0
|
||||
#define HDC_PRIMARY_SIDE 0x03F6
|
||||
#define HDC_PRIMARY_IRQ 14
|
||||
#define HDC_PRIMARY_IRQ 14
|
||||
#define HDC_SECONDARY_BASE 0x0170
|
||||
#define HDC_SECONDARY_SIDE 0x0376
|
||||
#define HDC_SECONDARY_IRQ 15
|
||||
@@ -32,8 +35,7 @@
|
||||
#define HDC_QUATERNARY_SIDE 0x03EE
|
||||
#define HDC_QUATERNARY_IRQ 11
|
||||
|
||||
enum
|
||||
{
|
||||
enum {
|
||||
IDE_NONE = 0,
|
||||
IDE_HDD,
|
||||
IDE_ATAPI
|
||||
@@ -42,55 +44,55 @@ enum
|
||||
#ifdef SCSI_DEVICE_H
|
||||
typedef struct ide_s {
|
||||
uint8_t selected,
|
||||
atastat, error,
|
||||
command, fdisk;
|
||||
atastat, error,
|
||||
command, fdisk;
|
||||
int type, board,
|
||||
irqstat, service,
|
||||
blocksize, blockcount,
|
||||
hdd_num, channel,
|
||||
pos, sector_pos,
|
||||
lba,
|
||||
reset, mdma_mode,
|
||||
do_initial_read;
|
||||
irqstat, service,
|
||||
blocksize, blockcount,
|
||||
hdd_num, channel,
|
||||
pos, sector_pos,
|
||||
lba,
|
||||
reset, mdma_mode,
|
||||
do_initial_read;
|
||||
uint32_t secount, sector,
|
||||
cylinder, head,
|
||||
drive, cylprecomp,
|
||||
cfg_spt, cfg_hpc,
|
||||
lba_addr, tracks,
|
||||
spt, hpc;
|
||||
cylinder, head,
|
||||
drive, cylprecomp,
|
||||
cfg_spt, cfg_hpc,
|
||||
lba_addr, tracks,
|
||||
spt, hpc;
|
||||
|
||||
uint16_t *buffer;
|
||||
uint8_t *sector_buffer;
|
||||
uint8_t *sector_buffer;
|
||||
|
||||
pc_timer_t timer;
|
||||
pc_timer_t timer;
|
||||
|
||||
/* Stuff mostly used by ATAPI */
|
||||
scsi_common_t *sc;
|
||||
int interrupt_drq;
|
||||
double pending_delay;
|
||||
scsi_common_t *sc;
|
||||
int interrupt_drq;
|
||||
double pending_delay;
|
||||
|
||||
int (*get_max)(int ide_has_dma, int type);
|
||||
int (*get_timings)(int ide_has_dma, int type);
|
||||
void (*identify)(struct ide_s *ide, int ide_has_dma);
|
||||
void (*stop)(scsi_common_t *sc);
|
||||
void (*packet_command)(scsi_common_t *sc, uint8_t *cdb);
|
||||
void (*device_reset)(scsi_common_t *sc);
|
||||
uint8_t (*phase_data_out)(scsi_common_t *sc);
|
||||
void (*command_stop)(scsi_common_t *sc);
|
||||
void (*bus_master_error)(scsi_common_t *sc);
|
||||
int (*get_max)(int ide_has_dma, int type);
|
||||
int (*get_timings)(int ide_has_dma, int type);
|
||||
void (*identify)(struct ide_s *ide, int ide_has_dma);
|
||||
void (*stop)(scsi_common_t *sc);
|
||||
void (*packet_command)(scsi_common_t *sc, uint8_t *cdb);
|
||||
void (*device_reset)(scsi_common_t *sc);
|
||||
uint8_t (*phase_data_out)(scsi_common_t *sc);
|
||||
void (*command_stop)(scsi_common_t *sc);
|
||||
void (*bus_master_error)(scsi_common_t *sc);
|
||||
} ide_t;
|
||||
|
||||
extern ide_t *ide_drives[IDE_NUM];
|
||||
extern ide_t *ide_drives[IDE_NUM];
|
||||
#endif
|
||||
|
||||
/* Type:
|
||||
0 = PIO,
|
||||
1 = SDMA,
|
||||
2 = MDMA,
|
||||
3 = UDMA
|
||||
0 = PIO,
|
||||
1 = SDMA,
|
||||
2 = MDMA,
|
||||
3 = UDMA
|
||||
Return:
|
||||
-1 = Not supported,
|
||||
Anything else = maximum mode
|
||||
-1 = Not supported,
|
||||
Anything else = maximum mode
|
||||
|
||||
This will eventually be hookable. */
|
||||
enum {
|
||||
@@ -101,8 +103,8 @@ enum {
|
||||
};
|
||||
|
||||
/* Return:
|
||||
0 = Not supported,
|
||||
Anything else = timings
|
||||
0 = Not supported,
|
||||
Anything else = timings
|
||||
|
||||
This will eventually be hookable. */
|
||||
enum {
|
||||
@@ -111,63 +113,63 @@ enum {
|
||||
TIMINGS_PIO_FC
|
||||
};
|
||||
|
||||
|
||||
extern int ide_ter_enabled, ide_qua_enabled;
|
||||
|
||||
|
||||
#ifdef SCSI_DEVICE_H
|
||||
extern ide_t * ide_get_drive(int ch);
|
||||
extern void ide_irq_raise(ide_t *ide);
|
||||
extern void ide_irq_lower(ide_t *ide);
|
||||
extern void ide_allocate_buffer(ide_t *dev);
|
||||
extern void ide_atapi_attach(ide_t *dev);
|
||||
extern ide_t *ide_get_drive(int ch);
|
||||
extern void ide_irq_raise(ide_t *ide);
|
||||
extern void ide_irq_lower(ide_t *ide);
|
||||
extern void ide_allocate_buffer(ide_t *dev);
|
||||
extern void ide_atapi_attach(ide_t *dev);
|
||||
#endif
|
||||
|
||||
extern void * ide_xtide_init(void);
|
||||
extern void ide_xtide_close(void);
|
||||
extern void *ide_xtide_init(void);
|
||||
extern void ide_xtide_close(void);
|
||||
|
||||
extern void ide_writew(uint16_t addr, uint16_t val, void *priv);
|
||||
extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv);
|
||||
extern void ide_writeb(uint16_t addr, uint8_t val, void *priv);
|
||||
extern uint8_t ide_readb(uint16_t addr, void *priv);
|
||||
extern uint8_t ide_read_alt_status(uint16_t addr, void *priv);
|
||||
extern uint16_t ide_readw(uint16_t addr, void *priv);
|
||||
extern void ide_writew(uint16_t addr, uint16_t val, void *priv);
|
||||
extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv);
|
||||
extern void ide_writeb(uint16_t addr, uint8_t val, void *priv);
|
||||
extern uint8_t ide_readb(uint16_t addr, void *priv);
|
||||
extern uint8_t ide_read_alt_status(uint16_t addr, void *priv);
|
||||
extern uint16_t ide_readw(uint16_t addr, void *priv);
|
||||
|
||||
extern void ide_set_bus_master(int board,
|
||||
int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv),
|
||||
void (*set_irq)(int channel, void *priv), void *priv);
|
||||
extern void ide_set_bus_master(int board,
|
||||
int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv),
|
||||
void (*set_irq)(int channel, void *priv), void *priv);
|
||||
|
||||
extern void win_cdrom_eject(uint8_t id);
|
||||
extern void win_cdrom_reload(uint8_t id);
|
||||
extern void win_cdrom_eject(uint8_t id);
|
||||
extern void win_cdrom_reload(uint8_t id);
|
||||
|
||||
extern void ide_set_base(int board, uint16_t port);
|
||||
extern void ide_set_side(int board, uint16_t port);
|
||||
extern void ide_set_base(int board, uint16_t port);
|
||||
extern void ide_set_side(int board, uint16_t port);
|
||||
|
||||
extern void ide_pri_enable(void);
|
||||
extern void ide_pri_disable(void);
|
||||
extern void ide_sec_enable(void);
|
||||
extern void ide_sec_disable(void);
|
||||
extern void ide_set_handlers(uint8_t board);
|
||||
extern void ide_remove_handlers(uint8_t board);
|
||||
|
||||
extern void ide_board_set_force_ata3(int board, int force_ata3);
|
||||
extern void ide_pri_enable(void);
|
||||
extern void ide_pri_disable(void);
|
||||
extern void ide_sec_enable(void);
|
||||
extern void ide_sec_disable(void);
|
||||
|
||||
extern void ide_board_set_force_ata3(int board, int force_ata3);
|
||||
#ifdef EMU_ISAPNP_H
|
||||
extern void ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv);
|
||||
extern void ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv);
|
||||
#endif
|
||||
|
||||
extern double ide_atapi_get_period(uint8_t channel);
|
||||
extern double ide_atapi_get_period(uint8_t channel);
|
||||
#ifdef SCSI_DEVICE_H
|
||||
extern void ide_set_callback(ide_t *ide, double callback);
|
||||
extern void ide_set_callback(ide_t *ide, double callback);
|
||||
#endif
|
||||
extern void ide_set_board_callback(uint8_t board, double callback);
|
||||
extern void ide_set_board_callback(uint8_t board, double callback);
|
||||
|
||||
extern void ide_padstr(char *str, const char *src, int len);
|
||||
extern void ide_padstr8(uint8_t *buf, int buf_size, const char *src);
|
||||
extern void ide_padstr(char *str, const char *src, int len);
|
||||
extern void ide_padstr8(uint8_t *buf, int buf_size, const char *src);
|
||||
|
||||
extern int (*ide_bus_master_dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv);
|
||||
extern void (*ide_bus_master_set_irq)(int channel, void *priv);
|
||||
extern void *ide_bus_master_priv[2];
|
||||
extern int (*ide_bus_master_dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv);
|
||||
extern void (*ide_bus_master_set_irq)(int channel, void *priv);
|
||||
extern void *ide_bus_master_priv[2];
|
||||
|
||||
extern uint8_t ide_read_ali_75(void);
|
||||
extern uint8_t ide_read_ali_76(void);
|
||||
extern uint8_t ide_read_ali_75(void);
|
||||
extern uint8_t ide_read_ali_76(void);
|
||||
|
||||
|
||||
#endif /*EMU_IDE_H*/
|
||||
#endif /*EMU_IDE_H*/
|
||||
|
||||
@@ -17,47 +17,46 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_HDC_IDE_SFF8038I_H
|
||||
# define EMU_HDC_IDE_SFF8038I_H
|
||||
#define EMU_HDC_IDE_SFF8038I_H
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t command, status,
|
||||
ptr0, enabled,
|
||||
dma_mode, pad,
|
||||
pad0, pad1;
|
||||
uint16_t base, pad2;
|
||||
uint32_t ptr, ptr_cur,
|
||||
addr;
|
||||
int count, eot,
|
||||
slot,
|
||||
irq_mode[2], irq_level[2],
|
||||
irq_pin, irq_line;
|
||||
uint8_t command, status,
|
||||
ptr0, enabled,
|
||||
dma_mode, pad,
|
||||
pad0, pad1;
|
||||
uint16_t base, pad2;
|
||||
uint32_t ptr, ptr_cur,
|
||||
addr;
|
||||
int count, eot,
|
||||
slot,
|
||||
irq_mode[2], irq_level[2],
|
||||
irq_pin, irq_line;
|
||||
} sff8038i_t;
|
||||
|
||||
|
||||
extern const device_t sff8038i_device;
|
||||
|
||||
extern void sff_bus_master_handler(sff8038i_t *dev, int enabled, uint16_t base);
|
||||
extern void sff_bus_master_handler(sff8038i_t *dev, int enabled, uint16_t base);
|
||||
|
||||
extern int sff_bus_master_dma_read(int channel, uint8_t *data, int transfer_length, void *priv);
|
||||
extern int sff_bus_master_dma_write(int channel, uint8_t *data, int transfer_length, void *priv);
|
||||
extern int sff_bus_master_dma_read(int channel, uint8_t *data, int transfer_length, void *priv);
|
||||
extern int sff_bus_master_dma_write(int channel, uint8_t *data, int transfer_length, void *priv);
|
||||
|
||||
extern void sff_bus_master_set_irq(int channel, void *priv);
|
||||
extern void sff_bus_master_set_irq(int channel, void *priv);
|
||||
|
||||
extern int sff_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, void *priv);
|
||||
extern int sff_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, void *priv);
|
||||
|
||||
extern void sff_bus_master_write(uint16_t port, uint8_t val, void *priv);
|
||||
extern uint8_t sff_bus_master_read(uint16_t port, void *priv);
|
||||
extern void sff_bus_master_write(uint16_t port, uint8_t val, void *priv);
|
||||
extern uint8_t sff_bus_master_read(uint16_t port, void *priv);
|
||||
|
||||
extern void sff_bus_master_reset(sff8038i_t *dev, uint16_t old_base);
|
||||
extern void sff_bus_master_reset(sff8038i_t *dev, uint16_t old_base);
|
||||
|
||||
extern void sff_set_slot(sff8038i_t *dev, int slot);
|
||||
extern void sff_set_slot(sff8038i_t *dev, int slot);
|
||||
|
||||
extern void sff_set_irq_line(sff8038i_t *dev, int irq_line);
|
||||
extern void sff_set_irq_line(sff8038i_t *dev, int irq_line);
|
||||
|
||||
extern void sff_set_irq_mode(sff8038i_t *dev, int channel, int irq_mode);
|
||||
extern void sff_set_irq_pin(sff8038i_t *dev, int irq_pin);
|
||||
extern void sff_set_irq_mode(sff8038i_t *dev, int channel, int irq_mode);
|
||||
extern void sff_set_irq_pin(sff8038i_t *dev, int irq_pin);
|
||||
|
||||
extern void sff_set_irq_level(sff8038i_t *dev, int channel, int irq_level);
|
||||
extern void sff_set_irq_level(sff8038i_t *dev, int channel, int irq_level);
|
||||
|
||||
#endif /*EMU_HDC_IDE_SFF8038I_H*/
|
||||
|
||||
@@ -16,11 +16,9 @@
|
||||
* Copyright 2017,2018 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_HDD_H
|
||||
# define EMU_HDD_H
|
||||
|
||||
|
||||
#define HDD_NUM 88 /* total of 88 images supported */
|
||||
#define EMU_HDD_H
|
||||
|
||||
#define HDD_NUM 88 /* total of 88 images supported */
|
||||
|
||||
/* Hard Disk bus types. */
|
||||
#if 0
|
||||
@@ -78,21 +76,21 @@ enum {
|
||||
HDD_OP_WRITE
|
||||
};
|
||||
|
||||
#define HDD_MAX_ZONES 16
|
||||
#define HDD_MAX_ZONES 16
|
||||
#define HDD_MAX_CACHE_SEG 16
|
||||
|
||||
typedef struct {
|
||||
uint32_t match_max_mbyte;
|
||||
uint32_t zones;
|
||||
uint32_t avg_spt;
|
||||
uint32_t heads;
|
||||
uint32_t rpm;
|
||||
uint32_t target_year;
|
||||
uint32_t rcache_num_seg;
|
||||
uint32_t rcache_seg_size;
|
||||
uint32_t max_multiple;
|
||||
double full_stroke_ms;
|
||||
double track_seek_ms;
|
||||
const char *name;
|
||||
const char *internal_name;
|
||||
uint32_t zones;
|
||||
uint32_t avg_spt;
|
||||
uint32_t heads;
|
||||
uint32_t rpm;
|
||||
uint32_t rcache_num_seg;
|
||||
uint32_t rcache_seg_size;
|
||||
uint32_t max_multiple;
|
||||
double full_stroke_ms;
|
||||
double track_seek_ms;
|
||||
} hdd_preset_t;
|
||||
|
||||
typedef struct {
|
||||
@@ -100,18 +98,18 @@ typedef struct {
|
||||
uint32_t lba_addr;
|
||||
uint32_t ra_addr;
|
||||
uint32_t host_addr;
|
||||
uint8_t lru;
|
||||
uint8_t valid;
|
||||
uint8_t lru;
|
||||
uint8_t valid;
|
||||
} hdd_cache_seg_t;
|
||||
|
||||
typedef struct {
|
||||
// Read cache
|
||||
hdd_cache_seg_t segments[HDD_MAX_CACHE_SEG];
|
||||
uint32_t num_segments;
|
||||
uint32_t segment_size;
|
||||
uint32_t ra_segment;
|
||||
uint8_t ra_ongoing;
|
||||
uint64_t ra_start_time;
|
||||
uint32_t num_segments;
|
||||
uint32_t segment_size;
|
||||
uint32_t ra_segment;
|
||||
uint8_t ra_ongoing;
|
||||
uint64_t ra_start_time;
|
||||
|
||||
// Write cache
|
||||
uint32_t write_addr;
|
||||
@@ -123,7 +121,7 @@ typedef struct {
|
||||
typedef struct {
|
||||
uint32_t cylinders;
|
||||
uint32_t sectors_per_track;
|
||||
double sector_time_usec;
|
||||
double sector_time_usec;
|
||||
uint32_t start_sector;
|
||||
uint32_t end_sector;
|
||||
uint32_t start_track;
|
||||
@@ -131,83 +129,87 @@ typedef struct {
|
||||
|
||||
/* Define the virtual Hard Disk. */
|
||||
typedef struct {
|
||||
uint8_t id;
|
||||
uint8_t id;
|
||||
union {
|
||||
uint8_t channel; /* Needed for Settings to reduce the number of if's */
|
||||
uint8_t channel; /* Needed for Settings to reduce the number of if's */
|
||||
|
||||
uint8_t mfm_channel; /* Should rename and/or unionize */
|
||||
uint8_t esdi_channel;
|
||||
uint8_t xta_channel;
|
||||
uint8_t ide_channel;
|
||||
uint8_t scsi_id;
|
||||
uint8_t mfm_channel; /* Should rename and/or unionize */
|
||||
uint8_t esdi_channel;
|
||||
uint8_t xta_channel;
|
||||
uint8_t ide_channel;
|
||||
uint8_t scsi_id;
|
||||
};
|
||||
uint8_t bus,
|
||||
res; /* Reserved for bus mode */
|
||||
uint8_t wp; /* Disk has been mounted READ-ONLY */
|
||||
uint8_t pad, pad0;
|
||||
uint8_t bus,
|
||||
res; /* Reserved for bus mode */
|
||||
uint8_t wp; /* Disk has been mounted READ-ONLY */
|
||||
uint8_t pad, pad0;
|
||||
|
||||
void *priv;
|
||||
void *priv;
|
||||
|
||||
char fn[1024], /* Name of current image file */
|
||||
prev_fn[1024]; /* Name of previous image file */
|
||||
char fn[1024], /* Name of current image file */
|
||||
prev_fn[1024]; /* Name of previous image file */
|
||||
|
||||
uint32_t res0, pad1,
|
||||
base,
|
||||
spt,
|
||||
hpc, /* Physical geometry parameters */
|
||||
tracks;
|
||||
uint32_t res0, pad1,
|
||||
base,
|
||||
spt,
|
||||
hpc, /* Physical geometry parameters */
|
||||
tracks;
|
||||
|
||||
hdd_zone_t zones[HDD_MAX_ZONES];
|
||||
uint32_t num_zones;
|
||||
hdd_zone_t zones[HDD_MAX_ZONES];
|
||||
uint32_t num_zones;
|
||||
hdd_cache_t cache;
|
||||
uint32_t phy_cyl;
|
||||
uint32_t phy_heads;
|
||||
uint32_t rpm;
|
||||
uint8_t max_multiple_block;
|
||||
uint32_t phy_cyl;
|
||||
uint32_t phy_heads;
|
||||
uint32_t rpm;
|
||||
uint8_t max_multiple_block;
|
||||
|
||||
uint32_t cur_cylinder;
|
||||
uint32_t cur_track;
|
||||
uint32_t cur_addr;
|
||||
|
||||
uint32_t speed_preset;
|
||||
|
||||
double avg_rotation_lat_usec;
|
||||
double full_stroke_usec;
|
||||
double head_switch_usec;
|
||||
double cyl_switch_usec;
|
||||
} hard_disk_t;
|
||||
|
||||
extern hard_disk_t hdd[HDD_NUM];
|
||||
extern unsigned int hdd_table[128][3];
|
||||
|
||||
extern hard_disk_t hdd[HDD_NUM];
|
||||
extern unsigned int hdd_table[128][3];
|
||||
extern int hdd_init(void);
|
||||
extern int hdd_string_to_bus(char *str, int cdrom);
|
||||
extern char *hdd_bus_to_string(int bus, int cdrom);
|
||||
extern int hdd_is_valid(int c);
|
||||
|
||||
extern int hdd_init(void);
|
||||
extern int hdd_string_to_bus(char *str, int cdrom);
|
||||
extern char *hdd_bus_to_string(int bus, int cdrom);
|
||||
extern int hdd_is_valid(int c);
|
||||
extern void hdd_image_init(void);
|
||||
extern int hdd_image_load(int id);
|
||||
extern void hdd_image_seek(uint8_t id, uint32_t sector);
|
||||
extern void hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer);
|
||||
extern int hdd_image_read_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer);
|
||||
extern void hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer);
|
||||
extern int hdd_image_write_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer);
|
||||
extern void hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count);
|
||||
extern int hdd_image_zero_ex(uint8_t id, uint32_t sector, uint32_t count);
|
||||
extern uint32_t hdd_image_get_last_sector(uint8_t id);
|
||||
extern uint32_t hdd_image_get_pos(uint8_t id);
|
||||
extern uint8_t hdd_image_get_type(uint8_t id);
|
||||
extern void hdd_image_unload(uint8_t id, int fn_preserve);
|
||||
extern void hdd_image_close(uint8_t id);
|
||||
extern void hdd_image_calc_chs(uint32_t *c, uint32_t *h, uint32_t *s, uint32_t size);
|
||||
|
||||
extern void hdd_image_init(void);
|
||||
extern int hdd_image_load(int id);
|
||||
extern void hdd_image_seek(uint8_t id, uint32_t sector);
|
||||
extern void hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer);
|
||||
extern int hdd_image_read_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer);
|
||||
extern void hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer);
|
||||
extern int hdd_image_write_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer);
|
||||
extern void hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count);
|
||||
extern int hdd_image_zero_ex(uint8_t id, uint32_t sector, uint32_t count);
|
||||
extern uint32_t hdd_image_get_last_sector(uint8_t id);
|
||||
extern uint32_t hdd_image_get_pos(uint8_t id);
|
||||
extern uint8_t hdd_image_get_type(uint8_t id);
|
||||
extern void hdd_image_unload(uint8_t id, int fn_preserve);
|
||||
extern void hdd_image_close(uint8_t id);
|
||||
extern void hdd_image_calc_chs(uint32_t *c, uint32_t *h, uint32_t *s, uint32_t size);
|
||||
extern int image_is_hdi(const char *s);
|
||||
extern int image_is_hdx(const char *s, int check_signature);
|
||||
extern int image_is_vhd(const char *s, int check_signature);
|
||||
|
||||
extern int image_is_hdi(const char *s);
|
||||
extern int image_is_hdx(const char *s, int check_signature);
|
||||
extern int image_is_vhd(const char *s, int check_signature);
|
||||
extern double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len);
|
||||
extern double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len);
|
||||
extern double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time);
|
||||
int hdd_preset_get_num();
|
||||
const char *hdd_preset_getname(int preset);
|
||||
extern const char *hdd_preset_get_internal_name(int preset);
|
||||
extern int hdd_preset_get_from_internal_name(char *s);
|
||||
extern void hdd_preset_apply(int hdd_id);
|
||||
|
||||
extern double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len);
|
||||
extern double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len);
|
||||
extern double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time);
|
||||
extern void hdd_preset_apply(hard_disk_t *hdd, hdd_preset_t *preset);
|
||||
extern void hdd_preset_auto(hard_disk_t *hdd);
|
||||
|
||||
#endif /*EMU_HDD_H*/
|
||||
#endif /*EMU_HDD_H*/
|
||||
|
||||
@@ -15,64 +15,59 @@
|
||||
* Copyright 2020 RichardG.
|
||||
*/
|
||||
#ifndef EMU_HWM_H
|
||||
# define EMU_HWM_H
|
||||
# include <stdint.h>
|
||||
|
||||
#define EMU_HWM_H
|
||||
#include <stdint.h>
|
||||
|
||||
#define RESISTOR_DIVIDER(v, r1, r2) (((v) * (r2)) / ((r1) + (r2)))
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint16_t fans[4];
|
||||
uint8_t temperatures[4];
|
||||
uint16_t voltages[13];
|
||||
uint16_t fans[4];
|
||||
uint8_t temperatures[4];
|
||||
uint16_t voltages[13];
|
||||
} hwm_values_t;
|
||||
|
||||
typedef struct {
|
||||
uint32_t local;
|
||||
uint32_t local;
|
||||
hwm_values_t *values;
|
||||
void *as99127f;
|
||||
void *as99127f;
|
||||
|
||||
uint8_t regs[8];
|
||||
uint8_t addr_register;
|
||||
uint8_t i2c_addr: 7, i2c_state: 2;
|
||||
uint8_t i2c_enabled: 1;
|
||||
uint8_t regs[8];
|
||||
uint8_t addr_register;
|
||||
uint8_t i2c_addr : 7, i2c_state : 2;
|
||||
uint8_t i2c_enabled : 1;
|
||||
} lm75_t;
|
||||
|
||||
|
||||
/* hwm.c */
|
||||
extern uint16_t hwm_get_vcore();
|
||||
extern uint16_t hwm_get_vcore();
|
||||
|
||||
/* hwm_lm75.c */
|
||||
extern void lm75_remap(lm75_t *dev, uint8_t addr);
|
||||
extern uint8_t lm75_read(lm75_t *dev, uint8_t reg);
|
||||
extern uint8_t lm75_write(lm75_t *dev, uint8_t reg, uint8_t val);
|
||||
extern void lm75_remap(lm75_t *dev, uint8_t addr);
|
||||
extern uint8_t lm75_read(lm75_t *dev, uint8_t reg);
|
||||
extern uint8_t lm75_write(lm75_t *dev, uint8_t reg, uint8_t val);
|
||||
|
||||
/* hwm_lm78.c */
|
||||
extern uint8_t lm78_as99127f_read(void *priv, uint8_t reg);
|
||||
extern uint8_t lm78_as99127f_write(void *priv, uint8_t reg, uint8_t val);
|
||||
extern uint8_t lm78_as99127f_read(void *priv, uint8_t reg);
|
||||
extern uint8_t lm78_as99127f_write(void *priv, uint8_t reg, uint8_t val);
|
||||
|
||||
/* hwm_vt82c686.c */
|
||||
extern void vt82c686_hwm_write(uint8_t addr, uint8_t val, void *priv);
|
||||
|
||||
extern void vt82c686_hwm_write(uint8_t addr, uint8_t val, void *priv);
|
||||
|
||||
/* Refer to specific hardware monitor implementations for the meaning of hwm_values. */
|
||||
extern hwm_values_t hwm_values;
|
||||
extern hwm_values_t hwm_values;
|
||||
|
||||
extern const device_t lm75_1_4a_device;
|
||||
extern const device_t lm75_w83781d_device;
|
||||
extern const device_t lm75_1_4a_device;
|
||||
extern const device_t lm75_w83781d_device;
|
||||
|
||||
extern const device_t lm78_device;
|
||||
extern const device_t w83781d_device;
|
||||
extern const device_t w83781d_p5a_device;
|
||||
extern const device_t as99127f_device;
|
||||
extern const device_t as99127f_rev2_device;
|
||||
extern const device_t w83782d_device;
|
||||
extern const device_t lm78_device;
|
||||
extern const device_t w83781d_device;
|
||||
extern const device_t w83781d_p5a_device;
|
||||
extern const device_t as99127f_device;
|
||||
extern const device_t as99127f_rev2_device;
|
||||
extern const device_t w83782d_device;
|
||||
|
||||
extern const device_t gl518sm_2c_device;
|
||||
extern const device_t gl518sm_2d_device;
|
||||
extern const device_t gl518sm_2c_device;
|
||||
extern const device_t gl518sm_2d_device;
|
||||
|
||||
extern const device_t via_vt82c686_hwm_device;
|
||||
extern const device_t via_vt82c686_hwm_device;
|
||||
|
||||
|
||||
#endif /*EMU_HWM_H*/
|
||||
#endif /*EMU_HWM_H*/
|
||||
|
||||
@@ -15,56 +15,53 @@
|
||||
* Copyright 2020 RichardG.
|
||||
*/
|
||||
#ifndef EMU_I2C_H
|
||||
# define EMU_I2C_H
|
||||
|
||||
#define EMU_I2C_H
|
||||
|
||||
/* i2c.c */
|
||||
extern void *i2c_smbus;
|
||||
|
||||
extern void *i2c_smbus;
|
||||
|
||||
/* i2c.c */
|
||||
extern void *i2c_addbus(char *name);
|
||||
extern void i2c_removebus(void *bus_handle);
|
||||
extern char *i2c_getbusname(void *bus_handle);
|
||||
extern void *i2c_addbus(char *name);
|
||||
extern void i2c_removebus(void *bus_handle);
|
||||
extern char *i2c_getbusname(void *bus_handle);
|
||||
|
||||
extern void i2c_sethandler(void *bus_handle, uint8_t base, int size,
|
||||
uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv),
|
||||
uint8_t (*read)(void *bus, uint8_t addr, void *priv),
|
||||
uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv),
|
||||
void (*stop)(void *bus, uint8_t addr, void *priv),
|
||||
void *priv);
|
||||
extern void i2c_sethandler(void *bus_handle, uint8_t base, int size,
|
||||
uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv),
|
||||
uint8_t (*read)(void *bus, uint8_t addr, void *priv),
|
||||
uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv),
|
||||
void (*stop)(void *bus, uint8_t addr, void *priv),
|
||||
void *priv);
|
||||
|
||||
extern void i2c_removehandler(void *bus_handle, uint8_t base, int size,
|
||||
uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv),
|
||||
uint8_t (*read)(void *bus, uint8_t addr, void *priv),
|
||||
uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv),
|
||||
void (*stop)(void *bus, uint8_t addr, void *priv),
|
||||
void *priv);
|
||||
extern void i2c_removehandler(void *bus_handle, uint8_t base, int size,
|
||||
uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv),
|
||||
uint8_t (*read)(void *bus, uint8_t addr, void *priv),
|
||||
uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv),
|
||||
void (*stop)(void *bus, uint8_t addr, void *priv),
|
||||
void *priv);
|
||||
|
||||
extern void i2c_handler(int set, void *bus_handle, uint8_t base, int size,
|
||||
uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv),
|
||||
uint8_t (*read)(void *bus, uint8_t addr, void *priv),
|
||||
uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv),
|
||||
void (*stop)(void *bus, uint8_t addr, void *priv),
|
||||
void *priv);
|
||||
extern void i2c_handler(int set, void *bus_handle, uint8_t base, int size,
|
||||
uint8_t (*start)(void *bus, uint8_t addr, uint8_t read, void *priv),
|
||||
uint8_t (*read)(void *bus, uint8_t addr, void *priv),
|
||||
uint8_t (*write)(void *bus, uint8_t addr, uint8_t data, void *priv),
|
||||
void (*stop)(void *bus, uint8_t addr, void *priv),
|
||||
void *priv);
|
||||
|
||||
extern uint8_t i2c_start(void *bus_handle, uint8_t addr, uint8_t read);
|
||||
extern uint8_t i2c_read(void *bus_handle, uint8_t addr);
|
||||
extern uint8_t i2c_write(void *bus_handle, uint8_t addr, uint8_t data);
|
||||
extern void i2c_stop(void *bus_handle, uint8_t addr);
|
||||
extern uint8_t i2c_start(void *bus_handle, uint8_t addr, uint8_t read);
|
||||
extern uint8_t i2c_read(void *bus_handle, uint8_t addr);
|
||||
extern uint8_t i2c_write(void *bus_handle, uint8_t addr, uint8_t data);
|
||||
extern void i2c_stop(void *bus_handle, uint8_t addr);
|
||||
|
||||
/* i2c_eeprom.c */
|
||||
extern uint8_t log2i(uint32_t i);
|
||||
extern void *i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t writable);
|
||||
extern void i2c_eeprom_close(void *dev_handle);
|
||||
extern uint8_t log2i(uint32_t i);
|
||||
extern void *i2c_eeprom_init(void *i2c, uint8_t addr, uint8_t *data, uint32_t size, uint8_t writable);
|
||||
extern void i2c_eeprom_close(void *dev_handle);
|
||||
|
||||
/* i2c_gpio.c */
|
||||
extern void *i2c_gpio_init(char *bus_name);
|
||||
extern void i2c_gpio_close(void *dev_handle);
|
||||
extern void i2c_gpio_set(void *dev_handle, uint8_t scl, uint8_t sda);
|
||||
extern uint8_t i2c_gpio_get_scl(void *dev_handle);
|
||||
extern uint8_t i2c_gpio_get_sda(void *dev_handle);
|
||||
extern void *i2c_gpio_get_bus();
|
||||
extern void *i2c_gpio_init(char *bus_name);
|
||||
extern void i2c_gpio_close(void *dev_handle);
|
||||
extern void i2c_gpio_set(void *dev_handle, uint8_t scl, uint8_t sda);
|
||||
extern uint8_t i2c_gpio_get_scl(void *dev_handle);
|
||||
extern uint8_t i2c_gpio_get_sda(void *dev_handle);
|
||||
extern void *i2c_gpio_get_bus();
|
||||
|
||||
|
||||
#endif /*EMU_I2C_H*/
|
||||
#endif /*EMU_I2C_H*/
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
#ifndef EMU_I82335_H
|
||||
# define EMU_I82335_H
|
||||
#define EMU_I82335_H
|
||||
|
||||
extern void i82335_init(void);
|
||||
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_IBM_5161_H
|
||||
# define EMU_IBM_5161_H
|
||||
#define EMU_IBM_5161_H
|
||||
|
||||
extern const device_t ibm_5161_device;
|
||||
|
||||
|
||||
81
src/include/86box/ini.h
Normal file
81
src/include/86box/ini.h
Normal file
@@ -0,0 +1,81 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* Configuration file handler header.
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker,
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Overdoze,
|
||||
*
|
||||
* Copyright 2008-2017 Sarah Walker.
|
||||
* Copyright 2016,2017 Miran Grca.
|
||||
*
|
||||
*/
|
||||
#ifndef EMU_INI_H
|
||||
#define EMU_INI_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef void *ini_t;
|
||||
typedef void *ini_section_t;
|
||||
|
||||
extern ini_t ini_new(void);
|
||||
extern ini_t ini_read(char *fn);
|
||||
extern void ini_write(ini_t ini, char *fn);
|
||||
extern void ini_dump(ini_t ini);
|
||||
extern void ini_close(ini_t ini);
|
||||
|
||||
extern void ini_section_delete_var(ini_section_t section, char *name);
|
||||
extern int ini_section_get_int(ini_section_t section, char *name, int def);
|
||||
extern double ini_section_get_double(ini_section_t section, char *name, double def);
|
||||
extern int ini_section_get_hex16(ini_section_t section, char *name, int def);
|
||||
extern int ini_section_get_hex20(ini_section_t section, char *name, int def);
|
||||
extern int ini_section_get_mac(ini_section_t section, char *name, int def);
|
||||
extern char *ini_section_get_string(ini_section_t section, char *name, char *def);
|
||||
extern wchar_t *ini_section_get_wstring(ini_section_t section, char *name, wchar_t *def);
|
||||
extern void ini_section_set_int(ini_section_t section, char *name, int val);
|
||||
extern void ini_section_set_double(ini_section_t section, char *name, double val);
|
||||
extern void ini_section_set_hex16(ini_section_t section, char *name, int val);
|
||||
extern void ini_section_set_hex20(ini_section_t section, char *name, int val);
|
||||
extern void ini_section_set_mac(ini_section_t section, char *name, int val);
|
||||
extern void ini_section_set_string(ini_section_t section, char *name, char *val);
|
||||
extern void ini_section_set_wstring(ini_section_t section, char *name, wchar_t *val);
|
||||
|
||||
#define ini_delete_var(ini, head, name) ini_section_delete_var(ini_find_section(ini, head), name)
|
||||
|
||||
#define ini_get_int(ini, head, name, def) ini_section_get_int(ini_find_section(ini, head), name, def)
|
||||
#define ini_get_double(ini, head, name, def) ini_section_get_double(ini_find_section(ini, head), name, def)
|
||||
#define ini_get_hex16(ini, head, name, def) ini_section_get_hex16(ini_find_section(ini, head), name, def)
|
||||
#define ini_get_hex20(ini, head, name, def) ini_section_get_hex20(ini_find_section(ini, head), name, def)
|
||||
#define ini_get_mac(ini, head, name, def) ini_section_get_mac(ini_find_section(ini, head), name, def)
|
||||
#define ini_get_string(ini, head, name, def) ini_section_get_string(ini_find_section(ini, head), name, def)
|
||||
#define ini_get_wstring(ini, head, name, def) ini_section_get_wstring(ini_find_section(ini, head), name, def)
|
||||
|
||||
#define ini_set_int(ini, head, name, val) ini_section_set_int(ini_find_or_create_section(ini, head), name, val)
|
||||
#define ini_set_double(ini, head, name, val) ini_section_set_double(ini_find_or_create_section(ini, head), name, val)
|
||||
#define ini_set_hex16(ini, head, name, val) ini_section_set_hex16(ini_find_or_create_section(ini, head), name, val)
|
||||
#define ini_set_hex20(ini, head, name, val) ini_section_set_hex20(ini_find_or_create_section(ini, head), name, val)
|
||||
#define ini_set_mac(ini, head, name, val) ini_section_set_mac(ini_find_or_create_section(ini, head), name, val)
|
||||
#define ini_set_string(ini, head, name, val) ini_section_set_string(ini_find_or_create_section(ini, head), name, val)
|
||||
#define ini_set_wstring(ini, head, name, val) ini_section_set_wstring(ini_find_or_create_section(ini, head), name, val)
|
||||
|
||||
extern ini_section_t ini_find_section(ini_t ini, char *name);
|
||||
extern ini_section_t ini_find_or_create_section(ini_t ini, char *name);
|
||||
extern void ini_rename_section(ini_section_t section, char *name);
|
||||
extern void ini_delete_section_if_empty(ini_t ini, ini_section_t section);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -18,103 +18,101 @@
|
||||
* Copyright 2016,2017 Miran Grca.
|
||||
*/
|
||||
#ifndef EMU_IO_H
|
||||
# define EMU_IO_H
|
||||
#define EMU_IO_H
|
||||
|
||||
extern void io_init(void);
|
||||
|
||||
extern void io_init(void);
|
||||
extern void io_sethandler_common(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv, int step);
|
||||
|
||||
extern void io_sethandler_common(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv, int step);
|
||||
extern void io_removehandler_common(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv, int step);
|
||||
|
||||
extern void io_removehandler_common(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv, int step);
|
||||
extern void io_handler_common(int set, uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv, int step);
|
||||
|
||||
extern void io_handler_common(int set, uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv, int step);
|
||||
extern void io_sethandler(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
|
||||
extern void io_sethandler(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
extern void io_removehandler(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
|
||||
extern void io_removehandler(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
extern void io_handler(int set, uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
|
||||
extern void io_handler(int set, uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
extern void io_sethandler_interleaved(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
|
||||
extern void io_sethandler_interleaved(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
extern void io_removehandler_interleaved(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
|
||||
extern void io_removehandler_interleaved(uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
extern void io_handler_interleaved(int set, uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
|
||||
extern void io_handler_interleaved(int set, uint16_t base, int size,
|
||||
uint8_t (*inb)(uint16_t addr, void *priv),
|
||||
uint16_t (*inw)(uint16_t addr, void *priv),
|
||||
uint32_t (*inl)(uint16_t addr, void *priv),
|
||||
void (*outb)(uint16_t addr, uint8_t val, void *priv),
|
||||
void (*outw)(uint16_t addr, uint16_t val, void *priv),
|
||||
void (*outl)(uint16_t addr, uint32_t val, void *priv),
|
||||
void *priv);
|
||||
extern uint8_t inb(uint16_t port);
|
||||
extern void outb(uint16_t port, uint8_t val);
|
||||
extern uint16_t inw(uint16_t port);
|
||||
extern void outw(uint16_t port, uint16_t val);
|
||||
extern uint32_t inl(uint16_t port);
|
||||
extern void outl(uint16_t port, uint32_t val);
|
||||
|
||||
extern uint8_t inb(uint16_t port);
|
||||
extern void outb(uint16_t port, uint8_t val);
|
||||
extern uint16_t inw(uint16_t port);
|
||||
extern void outw(uint16_t port, uint16_t val);
|
||||
extern uint32_t inl(uint16_t port);
|
||||
extern void outl(uint16_t port, uint32_t val);
|
||||
extern void *io_trap_add(void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv),
|
||||
void *priv);
|
||||
extern void io_trap_remap(void *handle, int enable, uint16_t addr, uint16_t size);
|
||||
extern void io_trap_remove(void *handle);
|
||||
|
||||
extern void *io_trap_add(void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv),
|
||||
void *priv);
|
||||
extern void io_trap_remap(void *handle, int enable, uint16_t addr, uint16_t size);
|
||||
extern void io_trap_remove(void *handle);
|
||||
|
||||
|
||||
#endif /*EMU_IO_H*/
|
||||
#endif /*EMU_IO_H*/
|
||||
|
||||
@@ -46,11 +46,9 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_ISAMEM_H
|
||||
# define EMU_ISAMEM_H
|
||||
|
||||
|
||||
#define ISAMEM_MAX 4 /* max #cards in system */
|
||||
#define EMU_ISAMEM_H
|
||||
|
||||
#define ISAMEM_MAX 4 /* max #cards in system */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -61,18 +59,16 @@ extern const device_t isamem_device;
|
||||
extern const device_t isamem_brat80_device;
|
||||
extern const device_t isamem_ev159_device;
|
||||
|
||||
|
||||
/* Functions. */
|
||||
extern void isamem_reset(void);
|
||||
extern void isamem_reset(void);
|
||||
|
||||
extern const char *isamem_get_name(int t);
|
||||
extern const char *isamem_get_internal_name(int t);
|
||||
extern int isamem_get_from_internal_name(const char *s);
|
||||
extern const device_t *isamem_get_device(int t);
|
||||
extern const char *isamem_get_name(int t);
|
||||
extern const char *isamem_get_internal_name(int t);
|
||||
extern int isamem_get_from_internal_name(const char *s);
|
||||
extern const device_t *isamem_get_device(int t);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_ISAMEM_H*/
|
||||
#endif /*EMU_ISAMEM_H*/
|
||||
|
||||
@@ -16,56 +16,51 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_ISAPNP_H
|
||||
# define EMU_ISAPNP_H
|
||||
# include <stdint.h>
|
||||
|
||||
|
||||
#define ISAPNP_MEM_DISABLED 0
|
||||
#define ISAPNP_IO_DISABLED 0
|
||||
#define ISAPNP_IRQ_DISABLED 0
|
||||
#define ISAPNP_DMA_DISABLED 4
|
||||
#define EMU_ISAPNP_H
|
||||
#include <stdint.h>
|
||||
|
||||
#define ISAPNP_MEM_DISABLED 0
|
||||
#define ISAPNP_IO_DISABLED 0
|
||||
#define ISAPNP_IRQ_DISABLED 0
|
||||
#define ISAPNP_DMA_DISABLED 4
|
||||
|
||||
enum {
|
||||
ISAPNP_CARD_DISABLE = 0,
|
||||
ISAPNP_CARD_ENABLE = 1,
|
||||
ISAPNP_CARD_ENABLE = 1,
|
||||
ISAPNP_CARD_FORCE_CONFIG, /* cheat code for UMC UM8669F */
|
||||
ISAPNP_CARD_NO_KEY /* cheat code for Crystal CS423x */
|
||||
ISAPNP_CARD_NO_KEY /* cheat code for Crystal CS423x */
|
||||
};
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint8_t activate;
|
||||
uint8_t activate;
|
||||
struct {
|
||||
uint32_t base: 24, size: 24;
|
||||
uint32_t base : 24, size : 24;
|
||||
} mem[4];
|
||||
struct {
|
||||
uint32_t base, size;
|
||||
uint32_t base, size;
|
||||
} mem32[4];
|
||||
struct {
|
||||
uint16_t base;
|
||||
uint16_t base;
|
||||
} io[8];
|
||||
struct {
|
||||
uint8_t irq: 4, level: 1, type: 1;
|
||||
uint8_t irq : 4, level : 1, type : 1;
|
||||
} irq[2];
|
||||
struct {
|
||||
uint8_t dma: 3;
|
||||
uint8_t dma : 3;
|
||||
} dma[2];
|
||||
} isapnp_device_config_t;
|
||||
|
||||
void *isapnp_add_card(uint8_t *rom, uint16_t rom_size,
|
||||
void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv),
|
||||
void (*csn_changed)(uint8_t csn, void *priv),
|
||||
uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv),
|
||||
void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv),
|
||||
void *priv);
|
||||
void isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size);
|
||||
void isapnp_enable_card(void *priv, uint8_t enable);
|
||||
void isapnp_set_csn(void *priv, uint8_t csn);
|
||||
void isapnp_set_device_defaults(void *priv, uint8_t ldn, const isapnp_device_config_t *config);
|
||||
void isapnp_reset_card(void *priv);
|
||||
void isapnp_reset_device(void *priv, uint8_t ld);
|
||||
|
||||
void *isapnp_add_card(uint8_t *rom, uint16_t rom_size,
|
||||
void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv),
|
||||
void (*csn_changed)(uint8_t csn, void *priv),
|
||||
uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv),
|
||||
void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv),
|
||||
void *priv);
|
||||
void isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size);
|
||||
void isapnp_enable_card(void *priv, uint8_t enable);
|
||||
void isapnp_set_csn(void *priv, uint8_t csn);
|
||||
void isapnp_set_device_defaults(void *priv, uint8_t ldn, const isapnp_device_config_t *config);
|
||||
void isapnp_reset_card(void *priv);
|
||||
void isapnp_reset_device(void *priv, uint8_t ld);
|
||||
|
||||
|
||||
#endif /*EMU_ISAPNP_H*/
|
||||
#endif /*EMU_ISAPNP_H*/
|
||||
|
||||
@@ -46,8 +46,7 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_ISARTC_H
|
||||
# define EMU_ISARTC_H
|
||||
|
||||
#define EMU_ISARTC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -55,17 +54,15 @@ extern "C" {
|
||||
|
||||
/* Global variables. */
|
||||
|
||||
|
||||
/* Functions. */
|
||||
extern void isartc_reset(void);
|
||||
extern void isartc_reset(void);
|
||||
|
||||
extern char *isartc_get_internal_name(int t);
|
||||
extern int isartc_get_from_internal_name(char *s);
|
||||
extern const device_t *isartc_get_device(int t);
|
||||
extern char *isartc_get_internal_name(int t);
|
||||
extern int isartc_get_from_internal_name(char *s);
|
||||
extern const device_t *isartc_get_device(int t);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_ISARTC_H*/
|
||||
#endif /*EMU_ISARTC_H*/
|
||||
|
||||
@@ -36,7 +36,7 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_JOYSTICK_CH_FLIGHTSTICK_PRO_H
|
||||
# define EMU_JOYSTICK_CH_FLIGHTSTICK_PRO_H
|
||||
#define EMU_JOYSTICK_CH_FLIGHTSTICK_PRO_H
|
||||
|
||||
extern const joystick_if_t joystick_ch_flightstick_pro;
|
||||
|
||||
|
||||
@@ -36,7 +36,7 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_JOYSTICK_STANDARD_H
|
||||
# define EMU_JOYSTICK_STANDARD_H
|
||||
#define EMU_JOYSTICK_STANDARD_H
|
||||
|
||||
extern const joystick_if_t joystick_2axis_2button;
|
||||
extern const joystick_if_t joystick_2axis_4button;
|
||||
|
||||
@@ -36,7 +36,7 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_JOYSTICK_SW_PAD_H
|
||||
# define EMU_JOYSTICK_SW_PAD_H
|
||||
#define EMU_JOYSTICK_SW_PAD_H
|
||||
|
||||
extern const joystick_if_t joystick_sw_pad;
|
||||
|
||||
|
||||
@@ -36,7 +36,7 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_JOYSTICK_TM_FCS_H
|
||||
# define EMU_JOYSTICK_TM_FCS_H
|
||||
#define EMU_JOYSTICK_TM_FCS_H
|
||||
|
||||
extern const joystick_if_t joystick_tm_fcs;
|
||||
|
||||
|
||||
@@ -20,110 +20,194 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_KEYBOARD_H
|
||||
# define EMU_KEYBOARD_H
|
||||
|
||||
#define EMU_KEYBOARD_H
|
||||
|
||||
typedef struct {
|
||||
const uint8_t mk[4];
|
||||
const uint8_t brk[4];
|
||||
const uint8_t mk[4];
|
||||
const uint8_t brk[4];
|
||||
} scancode;
|
||||
|
||||
#define STATE_SHIFT_MASK 0x22
|
||||
#define STATE_RSHIFT 0x20
|
||||
#define STATE_LSHIFT 0x02
|
||||
|
||||
#define STATE_SHIFT_MASK 0x22
|
||||
#define STATE_RSHIFT 0x20
|
||||
#define STATE_LSHIFT 0x02
|
||||
#define FAKE_LSHIFT_ON 0x100
|
||||
#define FAKE_LSHIFT_OFF 0x101
|
||||
#define LSHIFT_ON 0x102
|
||||
#define LSHIFT_OFF 0x103
|
||||
#define RSHIFT_ON 0x104
|
||||
#define RSHIFT_OFF 0x105
|
||||
|
||||
#define FAKE_LSHIFT_ON 0x100
|
||||
#define FAKE_LSHIFT_OFF 0x101
|
||||
#define LSHIFT_ON 0x102
|
||||
#define LSHIFT_OFF 0x103
|
||||
#define RSHIFT_ON 0x104
|
||||
#define RSHIFT_OFF 0x105
|
||||
/* KBC #define's */
|
||||
#define KBC_UNKNOWN 0x0000 /* As yet unknown keyboard */
|
||||
|
||||
/* IBM-style controllers */
|
||||
#define KBC_IBM_PC_XT 0x0000 /* IBM PC/XT */
|
||||
#define KBC_IBM_PCJR 0x0001 /* IBM PCjr */
|
||||
#define KBC_IBM_TYPE_1 0x0002 /* IBM AT / PS/2 Type 1 */
|
||||
#define KBC_IBM_TYPE_2 0x0003 /* IBM PS/2 Type 2 */
|
||||
#define KBC_AMI_ACCESS_METHODS 0x0004 /* Access Methods AMI */
|
||||
#define KBC_JU_JET 0x0005 /* Ju-Jet */
|
||||
/* OEM proprietary */
|
||||
#define KBC_TANDY 0x0011 /* Tandy 1000/1000HX */
|
||||
#define KBC_TANDY_SL2 0x0012 /* Tandy 1000SL2 */
|
||||
#define KBC_AMSTRAD 0x0013 /* Amstrad */
|
||||
#define KBC_OLIVETTI_XT 0x0014 /* Olivetti XT */
|
||||
#define KBC_OLIVETTI 0x0015 /* Olivetti AT */
|
||||
#define KBC_TOSHIBA 0x0016 /* Toshiba AT */
|
||||
#define KBC_COMPAQ 0x0017 /* Compaq */
|
||||
#define KBC_NCR 0x0018 /* NCR */
|
||||
#define KBC_QUADTEL 0x0019 /* Quadtel */
|
||||
#define KBC_SIEMENS 0x001A /* Siemens */
|
||||
/* Phoenix MultiKey/42 */
|
||||
#define PHOENIX_MK42_105 0x0521 /* Phoenix MultiKey/42 1.05 */
|
||||
#define PHOENIX_MK42_129 0x2921 /* Phoenix MultiKey/42 1.29 */
|
||||
#define PHOENIX_MK42_138 0x3821 /* Phoenix MultiKey/42 1.38 */
|
||||
#define PHOENIX_MK42_140 0x3821 /* Phoenix MultiKey/42 1.40 */
|
||||
#define PHOENIX_MKC42_214 0x1422 /* Phoenix MultiKey/C42 2.14 */
|
||||
#define PHOENIX_MK42I_416 0x1624 /* Phoenix MultiKey/42i 4.16 */
|
||||
#define PHOENIX_MK42I_419 0x1924 /* Phoenix MultiKey/42i 4.19 */
|
||||
/* AMI 0x3x */
|
||||
#define KBC_ACER_V30 0x0030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */
|
||||
#define KBC_AMI_MEGAKEY_SUPER_IO 0x0035 /* AMI '5' MegaKey 1994 NSC (and SM(S)C?) */
|
||||
#define KBC_AMI_8 0x0038 /* AMI '8' */
|
||||
/* AMI 0x4x */
|
||||
#define KBC_AMI_B 0x0042 /* AMI 'B' */
|
||||
#define KBC_AMI_D 0x0044 /* AMI 'D' */
|
||||
#define KBC_AMI_E 0x0045 /* AMI 'E' */
|
||||
#define KBC_AMIKEY 0x0046 /* AMI 'F'/AMIKEY */
|
||||
#define KBC_AMIKEY_2 0x0048 /* AMI 'H'/AMIEY-2 */
|
||||
#define KBC_MR 0x004D /* MR 'M' - Temporary classification until we get a dump */
|
||||
/* AMI 0x5x */
|
||||
#define KBC_AMI_MEGAKEY_1993 0x0050 /* AMI 'P' MegaKey 1993 */
|
||||
#define KBC_AMI_MEGAKEY_1994 0x0052 /* AMI 'R' MegaKey 1994 - 0xA0 returns 1993 copyright */
|
||||
#define KBC_AMI_TRIGEM 0x005A /* TriGem AMI 'Z' (1990 AMI copyright) */
|
||||
/* AMI 0x6x */
|
||||
#define KBC_TANDON 0x0061 /* Tandon 'a' - Temporary classification until we get a dump */
|
||||
/* Holtek */
|
||||
#define KBC_HT_REGIONAL_6542 0x1046 /* Holtek 'F' (Regional 6542) */
|
||||
#define KBC_HT_HT6542B_BESTKEY 0x1048 /* Holtek 'H' (Holtek HT6542B, BestKey) */
|
||||
/* AMI 0x0x clone without command 0xA0 */
|
||||
#define KBC_UNK_00 0x2000 /* Unknown 0x00 */
|
||||
#define KBC_UNK_01 0x2001 /* Unknown 0x01 */
|
||||
/* AMI 0x3x clone without command 0xA0 */
|
||||
#define KBC_UNK_7 0x2037 /* Unknown '7' - Temporary classification until we get a dump */
|
||||
#define KBC_UNK_9 0x2037 /* Unknown '9' - Temporary classification until we get a dump */
|
||||
#define KBC_JETKEY_NO_VER 0x2038 /* No-version JetKey '8' */
|
||||
/* AMI 0x4x clone without command 0xA0 */
|
||||
#define KBC_UNK_A 0x2041 /* Unknown 'A' - Temporary classification until we get a dump */
|
||||
#define KBC_JETKEY_5_W83C42 0x2046 /* JetKey 5.0 'F' and Winbond W83C42 */
|
||||
#define KBC_UNK_G 0x2047 /* Unknown 'G' - Temporary classification until we get a dump */
|
||||
#define KBC_MB_300E_SIS 0x2048 /* MB-300E Non-VIA 'H' and SiS 5582/559x */
|
||||
#define KBC_UNK_L 0x204C /* Unknown 'L' - Temporary classification until we get a dump */
|
||||
/* AMI 0x0x clone with command 0xA0 (Get Copyright String) only returning 0x00 */
|
||||
#define KBC_VPC_2007 0x3000 /* Microsoft Virtual PC 2007 - everything returns 0x00 */
|
||||
/* AMI 0x4x clone with command 0xA0 (Get Copyright String) only returning 0x00 */
|
||||
#define KBC_ALI_M148X 0x3045 /* ALi M148x 'E'/'U' (0xA1 actually returns 'F' but BIOS shows 'E' or 'U') */
|
||||
#define KBC_LANCE_UTRON 0x3046 /* Lance LT38C41 'F', Utron */
|
||||
/* AMI 0x5x clone with command 0xA0 (Get Copyright String) only returning 0x00 */
|
||||
#define KBC_SARC_6042 0x3055 /* SARC 6042 'U' */
|
||||
/* Award and clones */
|
||||
#define KBC_AWARD 0x4200 /* Award (0xA1 returns 0x00) - Temporary classification until we get \
|
||||
the real 0xAF return */
|
||||
#define KBC_VIA_VT82C4XN 0x4246 /* VIA VT82C41N, VT82C4N (0xA1 returns 'F') */
|
||||
#define KBC_VIA_VT82C586A 0x4346 /* VIA VT82C586A (0xA1 returns 'F') */
|
||||
#define KBC_VIA_VT82C586B 0x4446 /* VIA VT82C586B (0xA1 returns 'F') */
|
||||
#define KBC_VIA_VT82C686B 0x4546 /* VIA VT82C686B (0xA1 returns 'F') */
|
||||
/* UMC */
|
||||
#define KBC_UMC_UM8886 0x5048 /* UMC UM8886 'H' */
|
||||
/* IBM-style controllers with inverted P1 video type bit polarity */
|
||||
#define KBC_IBM_TYPE_1_XI8088 0x8000 /* Xi8088: IBM Type 1 */
|
||||
/* AMI (this is the 0xA1 revision byte) with inverted P1 video type bit polarity */
|
||||
#define KBC_ACER_V30_INV 0x8030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */
|
||||
/* Holtek with inverted P1 video type bit polarity */
|
||||
#define KBC_HT_HT6542B_XI8088 0x9048 /* Xi8088: Holtek 'H' (Holtek HT6542B, BestKey) */
|
||||
/* Award and clones with inverted P1 video type bit polarity */
|
||||
#define KBC_VIA_VT82C4XN_XI8088 0xC246 /* Xi8088: VIA VT82C41N, VT82C4N (0xA1 returns 'F') */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern uint8_t keyboard_mode;
|
||||
extern int keyboard_scan;
|
||||
extern uint8_t keyboard_mode;
|
||||
extern int keyboard_scan;
|
||||
|
||||
extern void (*keyboard_send)(uint16_t val);
|
||||
extern void kbd_adddata_process(uint16_t val, void (*adddata)(uint16_t val));
|
||||
extern void (*keyboard_send)(uint16_t val);
|
||||
extern void kbd_adddata_process(uint16_t val, void (*adddata)(uint16_t val));
|
||||
|
||||
extern const scancode scancode_xt[512];
|
||||
extern const scancode scancode_xt[512];
|
||||
|
||||
extern uint8_t keyboard_set3_flags[512];
|
||||
extern uint8_t keyboard_set3_all_repeat;
|
||||
extern uint8_t keyboard_set3_all_break;
|
||||
extern int mouse_queue_start, mouse_queue_end;
|
||||
extern int mouse_scan;
|
||||
extern uint8_t keyboard_set3_flags[512];
|
||||
extern uint8_t keyboard_set3_all_repeat;
|
||||
extern uint8_t keyboard_set3_all_break;
|
||||
extern int mouse_queue_start, mouse_queue_end;
|
||||
extern int mouse_scan;
|
||||
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t keyboard_pc_device;
|
||||
extern const device_t keyboard_pc82_device;
|
||||
extern const device_t keyboard_xt_device;
|
||||
extern const device_t keyboard_xt86_device;
|
||||
extern const device_t keyboard_xt_compaq_device;
|
||||
extern const device_t keyboard_tandy_device;
|
||||
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
|
||||
extern const device_t keyboard_xt_lxt3_device;
|
||||
#endif
|
||||
extern const device_t keyboard_xt_olivetti_device;
|
||||
extern const device_t keyboard_xt_zenith_device;
|
||||
extern const device_t keyboard_at_device;
|
||||
extern const device_t keyboard_at_ami_device;
|
||||
extern const device_t keyboard_at_samsung_device;
|
||||
extern const device_t keyboard_at_toshiba_device;
|
||||
extern const device_t keyboard_at_olivetti_device;
|
||||
extern const device_t keyboard_at_ncr_device;
|
||||
extern const device_t keyboard_ps2_device;
|
||||
extern const device_t keyboard_ps2_ps1_device;
|
||||
extern const device_t keyboard_ps2_ps1_pci_device;
|
||||
extern const device_t keyboard_ps2_xi8088_device;
|
||||
extern const device_t keyboard_ps2_ami_device;
|
||||
extern const device_t keyboard_ps2_olivetti_device;
|
||||
extern const device_t keyboard_ps2_mca_device;
|
||||
extern const device_t keyboard_ps2_mca_2_device;
|
||||
extern const device_t keyboard_ps2_quadtel_device;
|
||||
extern const device_t keyboard_ps2_pci_device;
|
||||
extern const device_t keyboard_ps2_ami_pci_device;
|
||||
extern const device_t keyboard_ps2_intel_ami_pci_device;
|
||||
extern const device_t keyboard_ps2_acer_pci_device;
|
||||
extern const device_t keyboard_pc_device;
|
||||
extern const device_t keyboard_pc82_device;
|
||||
extern const device_t keyboard_xt_device;
|
||||
extern const device_t keyboard_xt86_device;
|
||||
extern const device_t keyboard_xt_compaq_device;
|
||||
extern const device_t keyboard_tandy_device;
|
||||
# if defined(DEV_BRANCH) && defined(USE_LASERXT)
|
||||
extern const device_t keyboard_xt_lxt3_device;
|
||||
# endif
|
||||
extern const device_t keyboard_xt_olivetti_device;
|
||||
extern const device_t keyboard_xt_zenith_device;
|
||||
extern const device_t keyboard_at_device;
|
||||
extern const device_t keyboard_at_ami_device;
|
||||
extern const device_t keyboard_at_samsung_device;
|
||||
extern const device_t keyboard_at_toshiba_device;
|
||||
extern const device_t keyboard_at_olivetti_device;
|
||||
extern const device_t keyboard_at_ncr_device;
|
||||
extern const device_t keyboard_ps2_device;
|
||||
extern const device_t keyboard_ps2_ps1_device;
|
||||
extern const device_t keyboard_ps2_ps1_pci_device;
|
||||
extern const device_t keyboard_ps2_xi8088_device;
|
||||
extern const device_t keyboard_ps2_ami_device;
|
||||
extern const device_t keyboard_ps2_olivetti_device;
|
||||
extern const device_t keyboard_ps2_mca_device;
|
||||
extern const device_t keyboard_ps2_mca_2_device;
|
||||
extern const device_t keyboard_ps2_quadtel_device;
|
||||
extern const device_t keyboard_ps2_pci_device;
|
||||
extern const device_t keyboard_ps2_ami_pci_device;
|
||||
extern const device_t keyboard_ps2_intel_ami_pci_device;
|
||||
extern const device_t keyboard_ps2_acer_pci_device;
|
||||
extern const device_t keyboard_ps2_ali_pci_device;
|
||||
#endif
|
||||
|
||||
extern void keyboard_init(void);
|
||||
extern void keyboard_close(void);
|
||||
extern void keyboard_set_table(const scancode *ptr);
|
||||
extern void keyboard_poll_host(void);
|
||||
extern void keyboard_process(void);
|
||||
extern uint16_t keyboard_convert(int ch);
|
||||
extern void keyboard_input(int down, uint16_t scan);
|
||||
extern void keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl);
|
||||
extern uint8_t keyboard_get_shift(void);
|
||||
extern void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl);
|
||||
extern void keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl);
|
||||
extern int keyboard_recv(uint16_t key);
|
||||
extern int keyboard_isfsexit(void);
|
||||
extern int keyboard_ismsexit(void);
|
||||
extern void keyboard_set_is_amstrad(int ams);
|
||||
extern void keyboard_init(void);
|
||||
extern void keyboard_close(void);
|
||||
extern void keyboard_set_table(const scancode *ptr);
|
||||
extern void keyboard_poll_host(void);
|
||||
extern void keyboard_process(void);
|
||||
extern uint16_t keyboard_convert(int ch);
|
||||
extern void keyboard_input(int down, uint16_t scan);
|
||||
extern void keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl);
|
||||
extern uint8_t keyboard_get_shift(void);
|
||||
extern void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl);
|
||||
extern void keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl);
|
||||
extern int keyboard_recv(uint16_t key);
|
||||
extern int keyboard_isfsexit(void);
|
||||
extern int keyboard_ismsexit(void);
|
||||
extern void keyboard_set_is_amstrad(int ams);
|
||||
|
||||
extern void keyboard_at_adddata_mouse(uint8_t val);
|
||||
extern void keyboard_at_adddata_mouse_direct(uint8_t val);
|
||||
extern void keyboard_at_adddata_mouse_cmd(uint8_t val);
|
||||
extern void keyboard_at_mouse_reset(void);
|
||||
extern uint8_t keyboard_at_mouse_pos(void);
|
||||
extern int keyboard_at_fixed_channel(void);
|
||||
extern void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val,void *), void *);
|
||||
extern void keyboard_at_set_a20_key(int state);
|
||||
extern void keyboard_at_set_mode(int ps2);
|
||||
extern uint8_t keyboard_at_get_mouse_scan(void);
|
||||
extern void keyboard_at_set_mouse_scan(uint8_t val);
|
||||
extern void keyboard_at_reset(void);
|
||||
extern void keyboard_at_adddata_mouse(uint8_t val);
|
||||
extern void keyboard_at_adddata_mouse_direct(uint8_t val);
|
||||
extern void keyboard_at_adddata_mouse_cmd(uint8_t val);
|
||||
extern void keyboard_at_mouse_reset(void);
|
||||
extern uint8_t keyboard_at_mouse_pos(void);
|
||||
extern int keyboard_at_fixed_channel(void);
|
||||
extern void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val, void *), void *);
|
||||
extern void keyboard_at_set_a20_key(int state);
|
||||
extern void keyboard_at_set_mode(int ps2);
|
||||
extern uint8_t keyboard_at_get_mouse_scan(void);
|
||||
extern void keyboard_at_set_mouse_scan(uint8_t val);
|
||||
extern void keyboard_at_reset(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_KEYBOARD_H*/
|
||||
#endif /*EMU_KEYBOARD_H*/
|
||||
|
||||
@@ -18,242 +18,240 @@
|
||||
*/
|
||||
|
||||
#ifndef LANG_UAGE_H
|
||||
# define LANG_UAGE_H
|
||||
|
||||
#define LANG_UAGE_H
|
||||
|
||||
/* String IDs. */
|
||||
#define IDS_STRINGS 2048 // "86Box"
|
||||
#define IDS_2049 2049 // "Error"
|
||||
#define IDS_2050 2050 // "Fatal error"
|
||||
#define IDS_2051 2051 // " - PAUSED"
|
||||
#define IDS_2052 2052 // "Press Ctrl+Alt+PgDn..."
|
||||
#define IDS_2053 2053 // "Speed"
|
||||
#define IDS_2054 2054 // "ZIP %i (%03i): %ls"
|
||||
#define IDS_2055 2055 // "ZIP images (*.IM?)\0*.IM..."
|
||||
#define IDS_2056 2056 // "No usable ROM images found!"
|
||||
#define IDS_2057 2057 // "(empty)"
|
||||
#define IDS_2058 2058 // "ZIP images (*.IM?)\0*.IM..."
|
||||
#define IDS_2059 2059 // "(Turbo)"
|
||||
#define IDS_2060 2060 // "On"
|
||||
#define IDS_2061 2061 // "Off"
|
||||
#define IDS_2062 2062 // "All floppy images (*.DSK..."
|
||||
#define IDS_2063 2063 // "Machine ""%hs"" is not..."
|
||||
#define IDS_2064 2064 // "Video card ""%hs"" is not..."
|
||||
#define IDS_2065 2065 // "Machine"
|
||||
#define IDS_2066 2066 // "Display"
|
||||
#define IDS_2067 2067 // "Input devices"
|
||||
#define IDS_2068 2068 // "Sound"
|
||||
#define IDS_2069 2069 // "Network"
|
||||
#define IDS_2070 2070 // "Ports (COM & LPT)"
|
||||
#define IDS_2071 2071 // "Storage controllers"
|
||||
#define IDS_2072 2072 // "Hard disks"
|
||||
#define IDS_2073 2073 // "Floppy and CD-ROM drives"
|
||||
#define IDS_2074 2074 // "Other removable devices"
|
||||
#define IDS_2075 2075 // "Other peripherals"
|
||||
#define IDS_2076 2076 // "Surface-based images (*.8.."
|
||||
#define IDS_2077 2077 // "Click to capture mouse"
|
||||
#define IDS_2078 2078 // "Press F12-F8 to release mouse"
|
||||
#define IDS_2079 2079 // "Press F12-F8 or middle button.."
|
||||
#define IDS_2080 2080 // "Unable to initialize Flui.."
|
||||
#define IDS_2081 2081 // "Bus"
|
||||
#define IDS_2082 2082 // "File"
|
||||
#define IDS_2083 2083 // "C"
|
||||
#define IDS_2084 2084 // "H"
|
||||
#define IDS_2085 2085 // "S"
|
||||
#define IDS_2086 2086 // "MB"
|
||||
#define IDS_2087 2087 // "Check BPB"
|
||||
#define IDS_2088 2088 // "KB"
|
||||
#define IDS_2089 2089 // "Could not initialize the video..."
|
||||
#define IDS_2090 2090 // "Default"
|
||||
#define IDS_2091 2091 // "%i Wait state(s)"
|
||||
#define IDS_2092 2092 // "Type"
|
||||
#define IDS_2093 2093 // "PCap failed to set up.."
|
||||
#define IDS_2094 2094 // "No PCap devices found"
|
||||
#define IDS_2095 2095 // "Invalid PCap device"
|
||||
#define IDS_2096 2096 // "Standard 2-button joystick(s)"
|
||||
#define IDS_2097 2097 // "Standard 4-button joystick"
|
||||
#define IDS_2098 2098 // "Standard 6-button joystick"
|
||||
#define IDS_2099 2099 // "Standard 8-button joystick"
|
||||
#define IDS_2100 2100 // "CH Flightstick Pro"
|
||||
#define IDS_2101 2101 // "Microsoft SideWinder Pad"
|
||||
#define IDS_2102 2102 // "Thrustmaster Flight Cont.."
|
||||
#define IDS_2103 2103 // "None"
|
||||
#define IDS_2104 2104 // "Unable to load keyboard..."
|
||||
#define IDS_2105 2105 // "Unable to register raw input."
|
||||
#define IDS_2106 2106 // "%u"
|
||||
#define IDS_2107 2107 // "%u MB (CHS: %i, %i, %i)"
|
||||
#define IDS_2108 2108 // "Floppy %i (%s): %ls"
|
||||
#define IDS_2109 2109 // "All floppy images (*.0??;*.."
|
||||
#define IDS_2110 2110 // "Unable to initialize Free.."
|
||||
#define IDS_2111 2111 // "Unable to initialize SDL..."
|
||||
#define IDS_2112 2112 // "Are you sure you want to..."
|
||||
#define IDS_2113 2113 // "Are you sure you want to..."
|
||||
#define IDS_2114 2114 // "Unable to initialize Ghostscript..."
|
||||
#define IDS_2115 2115 // "MO %i (%03i): %ls"
|
||||
#define IDS_2116 2116 // "MO images (*.IM?)\0*.IM..."
|
||||
#define IDS_2117 2117 // "Welcome to 86Box!"
|
||||
#define IDS_2118 2118 // "Internal controller"
|
||||
#define IDS_2119 2119 // "Exit"
|
||||
#define IDS_2120 2120 // "No ROMs found"
|
||||
#define IDS_2121 2121 // "Do you want to save the settings?"
|
||||
#define IDS_2122 2122 // "This will hard reset the emulated..."
|
||||
#define IDS_2123 2123 // "Save"
|
||||
#define IDS_2124 2124 // "About 86Box"
|
||||
#define IDS_2125 2125 // "86Box v" EMU_VERSION
|
||||
#define IDS_2126 2126 // "An emulator of old computers..."
|
||||
#define IDS_2127 2127 // "OK"
|
||||
#define IDS_2128 2128 // "Hardware not available"
|
||||
#define IDS_2129 2129 // "Make sure " LIB_NAME_PCAP "..."
|
||||
#define IDS_2130 2130 // "Invalid configuration"
|
||||
#define IDS_2131 2131 // LIB_NAME_FREETYPE " is required..."
|
||||
#define IDS_2132 2132 // LIB_NAME_GS " is required for...
|
||||
#define IDS_2133 2133 // LIB_NAME_FLUIDSYNTH " is required..."
|
||||
#define IDS_2134 2134 // "Entering fullscreen mode"
|
||||
#define IDS_2135 2135 // "Don't show this message again"
|
||||
#define IDS_2136 2136 // "Don't exit"
|
||||
#define IDS_2137 2137 // "Reset"
|
||||
#define IDS_2138 2138 // "Don't reset"
|
||||
#define IDS_2139 2139 // "MO images (*.IM?)\0*.IM?..."
|
||||
#define IDS_2140 2140 // "CD-ROM images (*.ISO;*.CU.."
|
||||
#define IDS_2141 2141 // "%hs Device Configuration"
|
||||
#define IDS_2142 2142 // "Monitor in sleep mode"
|
||||
#define IDS_2143 2143 // "OpenGL Shaders (*.GLSL)..."
|
||||
#define IDS_2144 2144 // "OpenGL options"
|
||||
#define IDS_2145 2145 // "You are loading an unsupported..."
|
||||
#define IDS_2146 2146 // "CPU type filtering based on..."
|
||||
#define IDS_2147 2147 // "Continue"
|
||||
#define IDS_2148 2148 // "Cassette: %s"
|
||||
#define IDS_2149 2149 // "Cassette images (*.PCM;*.RAW;*..."
|
||||
#define IDS_2150 2150 // "Cartridge %i: %ls"
|
||||
#define IDS_2151 2151 // "Cartridge images (*.JRC)\0*.JRC\0..."
|
||||
#define IDS_2152 2152 // "Error initializing renderer"
|
||||
#define IDS_2153 2153 // "OpenGL (3.0 Core) renderer could not be initialized. Use another renderer."
|
||||
#define IDS_2154 2154 // "Resume execution"
|
||||
#define IDS_2155 2155 // "Pause execution"
|
||||
#define IDS_2156 2156 // "Press Ctrl+Alt+Del"
|
||||
#define IDS_2157 2157 // "Press Ctrl+Alt+Esc"
|
||||
#define IDS_2158 2158 // "Hard reset"
|
||||
#define IDS_2159 2159 // "ACPI shutdown"
|
||||
#define IDS_2160 2160 // "Settings"
|
||||
#define IDS_STRINGS 2048 // "86Box"
|
||||
#define IDS_2049 2049 // "Error"
|
||||
#define IDS_2050 2050 // "Fatal error"
|
||||
#define IDS_2051 2051 // " - PAUSED"
|
||||
#define IDS_2052 2052 // "Press Ctrl+Alt+PgDn..."
|
||||
#define IDS_2053 2053 // "Speed"
|
||||
#define IDS_2054 2054 // "ZIP %i (%03i): %ls"
|
||||
#define IDS_2055 2055 // "ZIP images (*.IM?)\0*.IM..."
|
||||
#define IDS_2056 2056 // "No usable ROM images found!"
|
||||
#define IDS_2057 2057 // "(empty)"
|
||||
#define IDS_2058 2058 // "ZIP images (*.IM?)\0*.IM..."
|
||||
#define IDS_2059 2059 // "(Turbo)"
|
||||
#define IDS_2060 2060 // "On"
|
||||
#define IDS_2061 2061 // "Off"
|
||||
#define IDS_2062 2062 // "All floppy images (*.DSK..."
|
||||
#define IDS_2063 2063 // "Machine ""%hs"" is not..."
|
||||
#define IDS_2064 2064 // "Video card ""%hs"" is not..."
|
||||
#define IDS_2065 2065 // "Machine"
|
||||
#define IDS_2066 2066 // "Display"
|
||||
#define IDS_2067 2067 // "Input devices"
|
||||
#define IDS_2068 2068 // "Sound"
|
||||
#define IDS_2069 2069 // "Network"
|
||||
#define IDS_2070 2070 // "Ports (COM & LPT)"
|
||||
#define IDS_2071 2071 // "Storage controllers"
|
||||
#define IDS_2072 2072 // "Hard disks"
|
||||
#define IDS_2073 2073 // "Floppy and CD-ROM drives"
|
||||
#define IDS_2074 2074 // "Other removable devices"
|
||||
#define IDS_2075 2075 // "Other peripherals"
|
||||
#define IDS_2076 2076 // "Surface-based images (*.8.."
|
||||
#define IDS_2077 2077 // "Click to capture mouse"
|
||||
#define IDS_2078 2078 // "Press F12-F8 to release mouse"
|
||||
#define IDS_2079 2079 // "Press F12-F8 or middle button.."
|
||||
#define IDS_2080 2080 // "Unable to initialize Flui.."
|
||||
#define IDS_2081 2081 // "Bus"
|
||||
#define IDS_2082 2082 // "File"
|
||||
#define IDS_2083 2083 // "C"
|
||||
#define IDS_2084 2084 // "H"
|
||||
#define IDS_2085 2085 // "S"
|
||||
#define IDS_2086 2086 // "MB"
|
||||
#define IDS_2087 2087 // "Check BPB"
|
||||
#define IDS_2088 2088 // "KB"
|
||||
#define IDS_2089 2089 // "Could not initialize the video..."
|
||||
#define IDS_2090 2090 // "Default"
|
||||
#define IDS_2091 2091 // "%i Wait state(s)"
|
||||
#define IDS_2092 2092 // "Type"
|
||||
#define IDS_2093 2093 // "PCap failed to set up.."
|
||||
#define IDS_2094 2094 // "No PCap devices found"
|
||||
#define IDS_2095 2095 // "Invalid PCap device"
|
||||
#define IDS_2096 2096 // "Standard 2-button joystick(s)"
|
||||
#define IDS_2097 2097 // "Standard 4-button joystick"
|
||||
#define IDS_2098 2098 // "Standard 6-button joystick"
|
||||
#define IDS_2099 2099 // "Standard 8-button joystick"
|
||||
#define IDS_2100 2100 // "CH Flightstick Pro"
|
||||
#define IDS_2101 2101 // "Microsoft SideWinder Pad"
|
||||
#define IDS_2102 2102 // "Thrustmaster Flight Cont.."
|
||||
#define IDS_2103 2103 // "None"
|
||||
#define IDS_2104 2104 // "Unable to load keyboard..."
|
||||
#define IDS_2105 2105 // "Unable to register raw input."
|
||||
#define IDS_2106 2106 // "%u"
|
||||
#define IDS_2107 2107 // "%u MB (CHS: %i, %i, %i)"
|
||||
#define IDS_2108 2108 // "Floppy %i (%s): %ls"
|
||||
#define IDS_2109 2109 // "All floppy images (*.0??;*.."
|
||||
#define IDS_2110 2110 // "Unable to initialize Free.."
|
||||
#define IDS_2111 2111 // "Unable to initialize SDL..."
|
||||
#define IDS_2112 2112 // "Are you sure you want to..."
|
||||
#define IDS_2113 2113 // "Are you sure you want to..."
|
||||
#define IDS_2114 2114 // "Unable to initialize Ghostscript..."
|
||||
#define IDS_2115 2115 // "MO %i (%03i): %ls"
|
||||
#define IDS_2116 2116 // "MO images (*.IM?)\0*.IM..."
|
||||
#define IDS_2117 2117 // "Welcome to 86Box!"
|
||||
#define IDS_2118 2118 // "Internal controller"
|
||||
#define IDS_2119 2119 // "Exit"
|
||||
#define IDS_2120 2120 // "No ROMs found"
|
||||
#define IDS_2121 2121 // "Do you want to save the settings?"
|
||||
#define IDS_2122 2122 // "This will hard reset the emulated..."
|
||||
#define IDS_2123 2123 // "Save"
|
||||
#define IDS_2124 2124 // "About 86Box"
|
||||
#define IDS_2125 2125 // "86Box v" EMU_VERSION
|
||||
#define IDS_2126 2126 // "An emulator of old computers..."
|
||||
#define IDS_2127 2127 // "OK"
|
||||
#define IDS_2128 2128 // "Hardware not available"
|
||||
#define IDS_2129 2129 // "Make sure " LIB_NAME_PCAP "..."
|
||||
#define IDS_2130 2130 // "Invalid configuration"
|
||||
#define IDS_2131 2131 // LIB_NAME_FREETYPE " is required..."
|
||||
#define IDS_2132 2132 // LIB_NAME_GS " is required for...
|
||||
#define IDS_2133 2133 // LIB_NAME_FLUIDSYNTH " is required..."
|
||||
#define IDS_2134 2134 // "Entering fullscreen mode"
|
||||
#define IDS_2135 2135 // "Don't show this message again"
|
||||
#define IDS_2136 2136 // "Don't exit"
|
||||
#define IDS_2137 2137 // "Reset"
|
||||
#define IDS_2138 2138 // "Don't reset"
|
||||
#define IDS_2139 2139 // "MO images (*.IM?)\0*.IM?..."
|
||||
#define IDS_2140 2140 // "CD-ROM images (*.ISO;*.CU.."
|
||||
#define IDS_2141 2141 // "%hs Device Configuration"
|
||||
#define IDS_2142 2142 // "Monitor in sleep mode"
|
||||
#define IDS_2143 2143 // "OpenGL Shaders (*.GLSL)..."
|
||||
#define IDS_2144 2144 // "OpenGL options"
|
||||
#define IDS_2145 2145 // "You are loading an unsupported..."
|
||||
#define IDS_2146 2146 // "CPU type filtering based on..."
|
||||
#define IDS_2147 2147 // "Continue"
|
||||
#define IDS_2148 2148 // "Cassette: %s"
|
||||
#define IDS_2149 2149 // "Cassette images (*.PCM;*.RAW;*..."
|
||||
#define IDS_2150 2150 // "Cartridge %i: %ls"
|
||||
#define IDS_2151 2151 // "Cartridge images (*.JRC)\0*.JRC\0..."
|
||||
#define IDS_2152 2152 // "Error initializing renderer"
|
||||
#define IDS_2153 2153 // "OpenGL (3.0 Core) renderer could not be initialized. Use another renderer."
|
||||
#define IDS_2154 2154 // "Resume execution"
|
||||
#define IDS_2155 2155 // "Pause execution"
|
||||
#define IDS_2156 2156 // "Press Ctrl+Alt+Del"
|
||||
#define IDS_2157 2157 // "Press Ctrl+Alt+Esc"
|
||||
#define IDS_2158 2158 // "Hard reset"
|
||||
#define IDS_2159 2159 // "ACPI shutdown"
|
||||
#define IDS_2160 2160 // "Settings"
|
||||
|
||||
#define IDS_4096 4096 // "Hard disk (%s)"
|
||||
#define IDS_4097 4097 // "%01i:%01i"
|
||||
#define IDS_4098 4098 // "%i"
|
||||
#define IDS_4099 4099 // "MFM/RLL or ESDI CD-ROM driv.."
|
||||
#define IDS_4100 4100 // "Custom..."
|
||||
#define IDS_4101 4101 // "Custom (large)..."
|
||||
#define IDS_4102 4102 // "Add New Hard Disk"
|
||||
#define IDS_4103 4103 // "Add Existing Hard Disk"
|
||||
#define IDS_4104 4104 // "HDI disk images cannot be..."
|
||||
#define IDS_4105 4105 // "Disk images cannot be larger..."
|
||||
#define IDS_4106 4106 // "Hard disk images (*.HDI;*.HD.."
|
||||
#define IDS_4107 4107 // "Unable to open the file for read"
|
||||
#define IDS_4108 4108 // "Unable to open the file for write"
|
||||
#define IDS_4109 4109 // "HDI or HDX image with a sect.."
|
||||
#define IDS_4110 4110 // "USB is not yet supported"
|
||||
#define IDS_4111 4111 // "Disk image file already exists"
|
||||
#define IDS_4112 4112 // "Please specify a valid file name."
|
||||
#define IDS_4113 4113 // "Remember to partition and fo.."
|
||||
#define IDS_4114 4114 // "Make sure the file exists and..."
|
||||
#define IDS_4115 4115 // "Make sure the file is being..."
|
||||
#define IDS_4116 4116 // "Disk image too large"
|
||||
#define IDS_4117 4117 // "Remember to partition and format..."
|
||||
#define IDS_4118 4118 // "The selected file will be..."
|
||||
#define IDS_4119 4119 // "Unsupported disk image"
|
||||
#define IDS_4120 4120 // "Overwrite"
|
||||
#define IDS_4121 4121 // "Don't overwrite"
|
||||
#define IDS_4122 4122 // "Raw image (.img)"
|
||||
#define IDS_4123 4123 // "HDI image (.hdi)"
|
||||
#define IDS_4124 4124 // "HDX image (.hdx)"
|
||||
#define IDS_4125 4125 // "Fixed-size VHD (.vhd)"
|
||||
#define IDS_4126 4126 // "Dynamic-size VHD (.vhd)"
|
||||
#define IDS_4127 4127 // "Differencing VHD (.vhd)"
|
||||
#define IDS_4128 4128 // "Large blocks (2 MB)"
|
||||
#define IDS_4129 4129 // "Small blocks (512 KB)"
|
||||
#define IDS_4130 4130 // "VHD files (*.VHD)\0*.VHD\0All..."
|
||||
#define IDS_4131 4131 // "Select the parent VHD"
|
||||
#define IDS_4132 4132 // "This could mean that the parent..."
|
||||
#define IDS_4133 4133 // "Parent and child disk timestamps..."
|
||||
#define IDS_4134 4134 // "Could not fix VHD timestamp."
|
||||
#define IDS_4135 4135 // "%01i:%02i"
|
||||
#define IDS_4096 4096 // "Hard disk (%s)"
|
||||
#define IDS_4097 4097 // "%01i:%01i"
|
||||
#define IDS_4098 4098 // "%i"
|
||||
#define IDS_4099 4099 // "MFM/RLL or ESDI CD-ROM driv.."
|
||||
#define IDS_4100 4100 // "Custom..."
|
||||
#define IDS_4101 4101 // "Custom (large)..."
|
||||
#define IDS_4102 4102 // "Add New Hard Disk"
|
||||
#define IDS_4103 4103 // "Add Existing Hard Disk"
|
||||
#define IDS_4104 4104 // "HDI disk images cannot be..."
|
||||
#define IDS_4105 4105 // "Disk images cannot be larger..."
|
||||
#define IDS_4106 4106 // "Hard disk images (*.HDI;*.HD.."
|
||||
#define IDS_4107 4107 // "Unable to open the file for read"
|
||||
#define IDS_4108 4108 // "Unable to open the file for write"
|
||||
#define IDS_4109 4109 // "HDI or HDX image with a sect.."
|
||||
#define IDS_4110 4110 // "USB is not yet supported"
|
||||
#define IDS_4111 4111 // "Disk image file already exists"
|
||||
#define IDS_4112 4112 // "Please specify a valid file name."
|
||||
#define IDS_4113 4113 // "Remember to partition and fo.."
|
||||
#define IDS_4114 4114 // "Make sure the file exists and..."
|
||||
#define IDS_4115 4115 // "Make sure the file is being..."
|
||||
#define IDS_4116 4116 // "Disk image too large"
|
||||
#define IDS_4117 4117 // "Remember to partition and format..."
|
||||
#define IDS_4118 4118 // "The selected file will be..."
|
||||
#define IDS_4119 4119 // "Unsupported disk image"
|
||||
#define IDS_4120 4120 // "Overwrite"
|
||||
#define IDS_4121 4121 // "Don't overwrite"
|
||||
#define IDS_4122 4122 // "Raw image (.img)"
|
||||
#define IDS_4123 4123 // "HDI image (.hdi)"
|
||||
#define IDS_4124 4124 // "HDX image (.hdx)"
|
||||
#define IDS_4125 4125 // "Fixed-size VHD (.vhd)"
|
||||
#define IDS_4126 4126 // "Dynamic-size VHD (.vhd)"
|
||||
#define IDS_4127 4127 // "Differencing VHD (.vhd)"
|
||||
#define IDS_4128 4128 // "Large blocks (2 MB)"
|
||||
#define IDS_4129 4129 // "Small blocks (512 KB)"
|
||||
#define IDS_4130 4130 // "VHD files (*.VHD)\0*.VHD\0All..."
|
||||
#define IDS_4131 4131 // "Select the parent VHD"
|
||||
#define IDS_4132 4132 // "This could mean that the parent..."
|
||||
#define IDS_4133 4133 // "Parent and child disk timestamps..."
|
||||
#define IDS_4134 4134 // "Could not fix VHD timestamp."
|
||||
#define IDS_4135 4135 // "%01i:%02i"
|
||||
|
||||
#define IDS_4352 4352 // "MFM/RLL"
|
||||
#define IDS_4353 4353 // "XT IDE"
|
||||
#define IDS_4354 4354 // "ESDI"
|
||||
#define IDS_4355 4355 // "IDE"
|
||||
#define IDS_4356 4356 // "ATAPI"
|
||||
#define IDS_4357 4357 // "SCSI"
|
||||
#define IDS_4352 4352 // "MFM/RLL"
|
||||
#define IDS_4353 4353 // "XT IDE"
|
||||
#define IDS_4354 4354 // "ESDI"
|
||||
#define IDS_4355 4355 // "IDE"
|
||||
#define IDS_4356 4356 // "ATAPI"
|
||||
#define IDS_4357 4357 // "SCSI"
|
||||
|
||||
#define IDS_4608 4608 // "MFM/RLL (%01i:%01i)"
|
||||
#define IDS_4609 4609 // "XT IDE (%01i:%01i)"
|
||||
#define IDS_4610 4610 // "ESDI (%01i:%01i)"
|
||||
#define IDS_4611 4611 // "IDE (%01i:%01i)"
|
||||
#define IDS_4612 4612 // "ATAPI (%01i:%01i)"
|
||||
#define IDS_4613 4613 // "SCSI (%02i:%02i)"
|
||||
#define IDS_4608 4608 // "MFM/RLL (%01i:%01i)"
|
||||
#define IDS_4609 4609 // "XT IDE (%01i:%01i)"
|
||||
#define IDS_4610 4610 // "ESDI (%01i:%01i)"
|
||||
#define IDS_4611 4611 // "IDE (%01i:%01i)"
|
||||
#define IDS_4612 4612 // "ATAPI (%01i:%01i)"
|
||||
#define IDS_4613 4613 // "SCSI (%02i:%02i)"
|
||||
|
||||
#define IDS_5120 5120 // "CD-ROM %i (%s): %s"
|
||||
#define IDS_5120 5120 // "CD-ROM %i (%s): %s"
|
||||
|
||||
#define IDS_5376 5376 // "Disabled"
|
||||
#define IDS_5377 5377 // <Reserved>
|
||||
#define IDS_5378 5378 // <Reserved>
|
||||
#define IDS_5379 5379 // <Reserved>
|
||||
#define IDS_5380 5380 // <Reserved>
|
||||
#define IDS_5381 5381 // "ATAPI"
|
||||
#define IDS_5382 5382 // "SCSI"
|
||||
#define IDS_5376 5376 // "Disabled"
|
||||
#define IDS_5377 5377 // <Reserved>
|
||||
#define IDS_5378 5378 // <Reserved>
|
||||
#define IDS_5379 5379 // <Reserved>
|
||||
#define IDS_5380 5380 // <Reserved>
|
||||
#define IDS_5381 5381 // "ATAPI"
|
||||
#define IDS_5382 5382 // "SCSI"
|
||||
|
||||
#define IDS_5632 5632 // "Disabled"
|
||||
#define IDS_5633 5633 // <Reserved>
|
||||
#define IDS_5634 5634 // <Reserved>
|
||||
#define IDS_5635 5635 // <Reserved>
|
||||
#define IDS_5636 5636 // <Reserved>
|
||||
#define IDS_5637 5637 // "ATAPI (%01i:%01i)"
|
||||
#define IDS_5638 5638 // "SCSI (%02i:%02i)"
|
||||
#define IDS_5632 5632 // "Disabled"
|
||||
#define IDS_5633 5633 // <Reserved>
|
||||
#define IDS_5634 5634 // <Reserved>
|
||||
#define IDS_5635 5635 // <Reserved>
|
||||
#define IDS_5636 5636 // <Reserved>
|
||||
#define IDS_5637 5637 // "ATAPI (%01i:%01i)"
|
||||
#define IDS_5638 5638 // "SCSI (%02i:%02i)"
|
||||
|
||||
#define IDS_5888 5888 // "160 kB"
|
||||
#define IDS_5889 5889 // "180 kB"
|
||||
#define IDS_5890 5890 // "320 kB"
|
||||
#define IDS_5891 5891 // "360 kB"
|
||||
#define IDS_5892 5892 // "640 kB"
|
||||
#define IDS_5893 5893 // "720 kB"
|
||||
#define IDS_5894 5894 // "1.2 MB"
|
||||
#define IDS_5895 5895 // "1.25 MB"
|
||||
#define IDS_5896 5896 // "1.44 MB"
|
||||
#define IDS_5897 5897 // "DMF (cluster 1024)"
|
||||
#define IDS_5898 5898 // "DMF (cluster 2048)"
|
||||
#define IDS_5899 5899 // "2.88 MB"
|
||||
#define IDS_5900 5900 // "ZIP 100"
|
||||
#define IDS_5901 5901 // "ZIP 250"
|
||||
#define IDS_5902 5902 // "3.5\" 128 MB (ISO 10090)"
|
||||
#define IDS_5903 5903 // "3.5\" 230 MB (ISO 13963)"
|
||||
#define IDS_5904 5904 // "3.5\" 540 MB (ISO 15498)"
|
||||
#define IDS_5905 5905 // "3.5\" 640 MB (ISO 15498)"
|
||||
#define IDS_5906 5906 // "3.5\" 1.3 GB (GigaMO)"
|
||||
#define IDS_5907 5907 // "3.5\" 2.3 GB (GigaMO 2)"
|
||||
#define IDS_5908 5908 // "5.25\" 600 MB"
|
||||
#define IDS_5909 5909 // "5.25\" 650 MB"
|
||||
#define IDS_5910 5910 // "5.25\" 1 GB"
|
||||
#define IDS_5911 5911 // "5.25\" 1.3 GB"
|
||||
#define IDS_5888 5888 // "160 kB"
|
||||
#define IDS_5889 5889 // "180 kB"
|
||||
#define IDS_5890 5890 // "320 kB"
|
||||
#define IDS_5891 5891 // "360 kB"
|
||||
#define IDS_5892 5892 // "640 kB"
|
||||
#define IDS_5893 5893 // "720 kB"
|
||||
#define IDS_5894 5894 // "1.2 MB"
|
||||
#define IDS_5895 5895 // "1.25 MB"
|
||||
#define IDS_5896 5896 // "1.44 MB"
|
||||
#define IDS_5897 5897 // "DMF (cluster 1024)"
|
||||
#define IDS_5898 5898 // "DMF (cluster 2048)"
|
||||
#define IDS_5899 5899 // "2.88 MB"
|
||||
#define IDS_5900 5900 // "ZIP 100"
|
||||
#define IDS_5901 5901 // "ZIP 250"
|
||||
#define IDS_5902 5902 // "3.5\" 128 MB (ISO 10090)"
|
||||
#define IDS_5903 5903 // "3.5\" 230 MB (ISO 13963)"
|
||||
#define IDS_5904 5904 // "3.5\" 540 MB (ISO 15498)"
|
||||
#define IDS_5905 5905 // "3.5\" 640 MB (ISO 15498)"
|
||||
#define IDS_5906 5906 // "3.5\" 1.3 GB (GigaMO)"
|
||||
#define IDS_5907 5907 // "3.5\" 2.3 GB (GigaMO 2)"
|
||||
#define IDS_5908 5908 // "5.25\" 600 MB"
|
||||
#define IDS_5909 5909 // "5.25\" 650 MB"
|
||||
#define IDS_5910 5910 // "5.25\" 1 GB"
|
||||
#define IDS_5911 5911 // "5.25\" 1.3 GB"
|
||||
|
||||
#define IDS_6144 6144 // "Perfect RPM"
|
||||
#define IDS_6145 6145 // "1%% below perfect RPM"
|
||||
#define IDS_6146 6146 // "1.5%% below perfect RPM"
|
||||
#define IDS_6147 6147 // "2%% below perfect RPM"
|
||||
#define IDS_6144 6144 // "Perfect RPM"
|
||||
#define IDS_6145 6145 // "1%% below perfect RPM"
|
||||
#define IDS_6146 6146 // "1.5%% below perfect RPM"
|
||||
#define IDS_6147 6147 // "2%% below perfect RPM"
|
||||
|
||||
#define IDS_7168 7168 // "(System Default)"
|
||||
#define IDS_7168 7168 // "(System Default)"
|
||||
|
||||
#define IDS_LANG_ENUS IDS_7168
|
||||
#define IDS_LANG_ENUS IDS_7168
|
||||
|
||||
#define STR_NUM_2048 106
|
||||
#define STR_NUM_3072 11
|
||||
#define STR_NUM_4096 40
|
||||
#define STR_NUM_4352 6
|
||||
#define STR_NUM_4608 6
|
||||
#define STR_NUM_5120 1
|
||||
#define STR_NUM_5376 7
|
||||
#define STR_NUM_5632 7
|
||||
#define STR_NUM_5888 24
|
||||
#define STR_NUM_6144 4
|
||||
#define STR_NUM_7168 1
|
||||
#define STR_NUM_2048 106
|
||||
#define STR_NUM_3072 11
|
||||
#define STR_NUM_4096 40
|
||||
#define STR_NUM_4352 6
|
||||
#define STR_NUM_4608 6
|
||||
#define STR_NUM_5120 1
|
||||
#define STR_NUM_5376 7
|
||||
#define STR_NUM_5632 7
|
||||
#define STR_NUM_5888 24
|
||||
#define STR_NUM_6144 4
|
||||
#define STR_NUM_7168 1
|
||||
|
||||
|
||||
#endif /*LANG_UAGE_H*/
|
||||
#endif /*LANG_UAGE_H*/
|
||||
|
||||
@@ -18,30 +18,30 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_LOG_H
|
||||
# define EMU_LOG_H
|
||||
#define EMU_LOG_H
|
||||
|
||||
#ifndef RELEASE_BUILD
|
||||
|
||||
#ifdef __cplusplus
|
||||
# ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
# endif
|
||||
|
||||
/* Function prototypes. */
|
||||
extern void log_set_suppr_seen(void *priv, int suppr_seen);
|
||||
extern void log_set_dev_name(void *priv, char *dev_name);
|
||||
#ifdef HAVE_STDARG_H
|
||||
extern void log_out(void *priv, const char *fmt, va_list);
|
||||
extern void log_fatal(void *priv, const char *fmt, ...);
|
||||
#endif
|
||||
extern void * log_open(char *dev_name);
|
||||
extern void log_close(void *priv);
|
||||
extern void log_set_suppr_seen(void *priv, int suppr_seen);
|
||||
extern void log_set_dev_name(void *priv, char *dev_name);
|
||||
# ifdef HAVE_STDARG_H
|
||||
extern void log_out(void *priv, const char *fmt, va_list);
|
||||
extern void log_fatal(void *priv, const char *fmt, ...);
|
||||
# endif
|
||||
extern void *log_open(char *dev_name);
|
||||
extern void log_close(void *priv);
|
||||
|
||||
#ifdef __cplusplus
|
||||
# ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
# endif
|
||||
|
||||
#else
|
||||
#define log_fatal(priv, fmt, ...) fatal(fmt, ...)
|
||||
#endif /*RELEASE_BUILD*/
|
||||
# define log_fatal(priv, fmt, ...) fatal(fmt, ...)
|
||||
#endif /*RELEASE_BUILD*/
|
||||
|
||||
#endif /*EMU_LOG_H*/
|
||||
#endif /*EMU_LOG_H*/
|
||||
|
||||
@@ -1,15 +1,15 @@
|
||||
#ifndef EMU_LPT_H
|
||||
# define EMU_LPT_H
|
||||
#define EMU_LPT_H
|
||||
|
||||
#define LPT1_ADDR 0x0378
|
||||
#define LPT1_IRQ 7
|
||||
#define LPT2_ADDR 0x0278
|
||||
#define LPT2_IRQ 5
|
||||
#define LPT1_ADDR 0x0378
|
||||
#define LPT1_IRQ 7
|
||||
#define LPT2_ADDR 0x0278
|
||||
#define LPT2_IRQ 5
|
||||
// LPT 1 on machines when installed
|
||||
#define LPT_MDA_ADDR 0x03bc
|
||||
#define LPT_MDA_IRQ 7
|
||||
#define LPT4_ADDR 0x0268
|
||||
#define LPT4_IRQ 5
|
||||
#define LPT_MDA_ADDR 0x03bc
|
||||
#define LPT_MDA_IRQ 7
|
||||
#define LPT4_ADDR 0x0268
|
||||
#define LPT4_IRQ 5
|
||||
/*
|
||||
#define LPT5_ADDR 0x027c
|
||||
#define LPT5_IRQ 7
|
||||
@@ -22,37 +22,36 @@ typedef struct
|
||||
const char *name;
|
||||
const char *internal_name;
|
||||
|
||||
void * (*init)(void *lpt);
|
||||
void (*close)(void *p);
|
||||
void (*write_data)(uint8_t val, void *p);
|
||||
void (*write_ctrl)(uint8_t val, void *p);
|
||||
uint8_t (*read_data)(void *p);
|
||||
uint8_t (*read_status)(void *p);
|
||||
uint8_t (*read_ctrl)(void *p);
|
||||
void *(*init)(void *lpt);
|
||||
void (*close)(void *p);
|
||||
void (*write_data)(uint8_t val, void *p);
|
||||
void (*write_ctrl)(uint8_t val, void *p);
|
||||
uint8_t (*read_data)(void *p);
|
||||
uint8_t (*read_status)(void *p);
|
||||
uint8_t (*read_ctrl)(void *p);
|
||||
} lpt_device_t;
|
||||
|
||||
|
||||
extern void lpt_init(void);
|
||||
extern void lpt_port_init(int i, uint16_t port);
|
||||
extern void lpt_port_irq(int i, uint8_t irq);
|
||||
extern void lpt_port_remove(int i);
|
||||
extern void lpt1_remove_ams(void);
|
||||
|
||||
#define lpt1_init(a) lpt_port_init(0, a)
|
||||
#define lpt1_irq(a) lpt_port_irq(0, a)
|
||||
#define lpt1_remove() lpt_port_remove(0)
|
||||
#define lpt1_init(a) lpt_port_init(0, a)
|
||||
#define lpt1_irq(a) lpt_port_irq(0, a)
|
||||
#define lpt1_remove() lpt_port_remove(0)
|
||||
|
||||
#define lpt2_init(a) lpt_port_init(1, a)
|
||||
#define lpt2_irq(a) lpt_port_irq(1, a)
|
||||
#define lpt2_remove() lpt_port_remove(1)
|
||||
#define lpt2_init(a) lpt_port_init(1, a)
|
||||
#define lpt2_irq(a) lpt_port_irq(1, a)
|
||||
#define lpt2_remove() lpt_port_remove(1)
|
||||
|
||||
#define lpt3_init(a) lpt_port_init(2, a)
|
||||
#define lpt3_irq(a) lpt_port_irq(2, a)
|
||||
#define lpt3_remove() lpt_port_remove(2)
|
||||
#define lpt3_init(a) lpt_port_init(2, a)
|
||||
#define lpt3_irq(a) lpt_port_irq(2, a)
|
||||
#define lpt3_remove() lpt_port_remove(2)
|
||||
|
||||
#define lpt4_init(a) lpt_port_init(3, a)
|
||||
#define lpt4_irq(a) lpt_port_irq(3, a)
|
||||
#define lpt4_remove() lpt_port_remove(3)
|
||||
#define lpt4_init(a) lpt_port_init(3, a)
|
||||
#define lpt4_irq(a) lpt_port_irq(3, a)
|
||||
#define lpt4_remove() lpt_port_remove(3)
|
||||
|
||||
/*
|
||||
#define lpt5_init(a) lpt_port_init(4, a)
|
||||
@@ -64,31 +63,29 @@ extern void lpt1_remove_ams(void);
|
||||
#define lpt6_remove() lpt_port_remove(5)
|
||||
*/
|
||||
|
||||
|
||||
void lpt_devices_init(void);
|
||||
void lpt_devices_close(void);
|
||||
|
||||
|
||||
typedef struct {
|
||||
uint8_t enabled, irq,
|
||||
dat, ctrl;
|
||||
uint16_t addr, pad0;
|
||||
int device, enable_irq;
|
||||
lpt_device_t * dt;
|
||||
void * priv;
|
||||
uint8_t enabled, irq,
|
||||
dat, ctrl;
|
||||
uint16_t addr, pad0;
|
||||
int device, enable_irq;
|
||||
lpt_device_t *dt;
|
||||
void *priv;
|
||||
} lpt_port_t;
|
||||
|
||||
extern lpt_port_t lpt_ports[PARALLEL_MAX];
|
||||
extern lpt_port_t lpt_ports[PARALLEL_MAX];
|
||||
|
||||
extern void lpt_write(uint16_t port, uint8_t val, void *priv);
|
||||
extern uint8_t lpt_read(uint16_t port, void *priv);
|
||||
extern void lpt_write(uint16_t port, uint8_t val, void *priv);
|
||||
extern uint8_t lpt_read(uint16_t port, void *priv);
|
||||
|
||||
extern void lpt_irq(void *priv, int raise);
|
||||
extern void lpt_irq(void *priv, int raise);
|
||||
|
||||
extern char * lpt_device_get_name(int id);
|
||||
extern char * lpt_device_get_internal_name(int id);
|
||||
extern char *lpt_device_get_name(int id);
|
||||
extern char *lpt_device_get_internal_name(int id);
|
||||
|
||||
extern int lpt_device_get_from_internal_name(char *s);
|
||||
extern int lpt_device_get_from_internal_name(char *s);
|
||||
|
||||
extern const lpt_device_t lpt_dac_device;
|
||||
extern const lpt_device_t lpt_dac_stereo_device;
|
||||
|
||||
@@ -18,12 +18,11 @@
|
||||
*/
|
||||
|
||||
#ifndef MACHINE_AMSTRAD_H
|
||||
# define MACHINE_AMSTRAD_H
|
||||
#define MACHINE_AMSTRAD_H
|
||||
|
||||
extern int amstrad_latch;
|
||||
extern uint32_t amstrad_latch;
|
||||
|
||||
enum
|
||||
{
|
||||
enum {
|
||||
AMSTRAD_NOLATCH,
|
||||
AMSTRAD_SW9,
|
||||
AMSTRAD_SW10
|
||||
|
||||
@@ -38,22 +38,19 @@
|
||||
*/
|
||||
|
||||
#ifndef MACHINE_T3100E_H
|
||||
# define MACHINE_T3100E_H
|
||||
|
||||
#define MACHINE_T3100E_H
|
||||
|
||||
extern const device_t t3100e_device;
|
||||
|
||||
extern void t3100e_notify_set(uint8_t value);
|
||||
extern void t3100e_display_set(uint8_t value);
|
||||
extern uint8_t t3100e_display_get(void);
|
||||
extern uint8_t t3100e_config_get(void);
|
||||
extern void t3100e_turbo_set(uint8_t value);
|
||||
extern uint8_t t3100e_mono_get(void);
|
||||
extern void t3100e_mono_set(uint8_t value);
|
||||
|
||||
extern void t3100e_notify_set(uint8_t value);
|
||||
extern void t3100e_display_set(uint8_t value);
|
||||
extern uint8_t t3100e_display_get(void);
|
||||
extern uint8_t t3100e_config_get(void);
|
||||
extern void t3100e_turbo_set(uint8_t value);
|
||||
extern uint8_t t3100e_mono_get(void);
|
||||
extern void t3100e_mono_set(uint8_t value);
|
||||
extern void t3100e_video_options_set(uint8_t options);
|
||||
extern void t3100e_display_set(uint8_t internal);
|
||||
|
||||
extern void t3100e_video_options_set(uint8_t options);
|
||||
extern void t3100e_display_set(uint8_t internal);
|
||||
|
||||
|
||||
#endif /*MACHINE_T3100E_H*/
|
||||
#endif /*MACHINE_T3100E_H*/
|
||||
|
||||
@@ -38,24 +38,21 @@
|
||||
*/
|
||||
|
||||
#ifndef MACHINE_T1000_H
|
||||
# define MACHINE_T1000_H
|
||||
|
||||
#define MACHINE_T1000_H
|
||||
|
||||
extern const device_t t1000_video_device;
|
||||
extern const device_t t1200_video_device;
|
||||
|
||||
|
||||
extern void t1000_video_options_set(uint8_t options);
|
||||
extern void t1000_video_options_set(uint8_t options);
|
||||
extern void t1000_video_enable(uint8_t enabled);
|
||||
extern void t1000_display_set(uint8_t internal);
|
||||
extern void t1000_display_set(uint8_t internal);
|
||||
|
||||
extern void t1000_syskey(uint8_t amask, uint8_t omask, uint8_t xmask);
|
||||
extern void t1000_syskey(uint8_t amask, uint8_t omask, uint8_t xmask);
|
||||
|
||||
extern void t1000_nvr_load(void);
|
||||
extern void t1000_nvr_save(void);
|
||||
extern void t1000_nvr_load(void);
|
||||
extern void t1000_nvr_save(void);
|
||||
|
||||
extern void t1200_nvr_load(void);
|
||||
extern void t1200_nvr_save(void);
|
||||
extern void t1200_nvr_load(void);
|
||||
extern void t1200_nvr_save(void);
|
||||
|
||||
|
||||
#endif /*MACHINE_T1000_H*/
|
||||
#endif /*MACHINE_T1000_H*/
|
||||
|
||||
@@ -1,13 +1,13 @@
|
||||
#ifndef MACHINE_XI80888_H
|
||||
# define MACHINE_XI80888_H
|
||||
#define MACHINE_XI80888_H
|
||||
|
||||
#include <86box/device.h>
|
||||
|
||||
extern const device_t xi8088_device;
|
||||
|
||||
uint8_t xi8088_turbo_get();
|
||||
void xi8088_turbo_set(uint8_t value);
|
||||
void xi8088_bios_128kb_set(int val);
|
||||
int xi8088_bios_128kb();
|
||||
void xi8088_turbo_set(uint8_t value);
|
||||
void xi8088_bios_128kb_set(int val);
|
||||
int xi8088_bios_128kb();
|
||||
|
||||
#endif /*MACHINE_XI80888_H*/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
32
src/include/86box/machine_status.h
Normal file
32
src/include/86box/machine_status.h
Normal file
@@ -0,0 +1,32 @@
|
||||
#ifndef EMU_MACHINE_STATUS_H
|
||||
#define EMU_MACHINE_STATUS_H
|
||||
|
||||
typedef struct {
|
||||
atomic_bool_t empty;
|
||||
atomic_bool_t active;
|
||||
} dev_status_empty_active_t;
|
||||
|
||||
typedef struct {
|
||||
atomic_bool_t active;
|
||||
} dev_status_active_t;
|
||||
|
||||
typedef struct {
|
||||
atomic_bool_t empty;
|
||||
} dev_status_empty_t;
|
||||
|
||||
typedef struct {
|
||||
dev_status_empty_active_t fdd[FDD_NUM];
|
||||
dev_status_empty_active_t cdrom[CDROM_NUM];
|
||||
dev_status_empty_active_t zip[ZIP_NUM];
|
||||
dev_status_empty_active_t mo[MO_NUM];
|
||||
dev_status_empty_active_t cassette;
|
||||
dev_status_active_t hdd[HDD_BUS_USB];
|
||||
dev_status_empty_active_t net[NET_CARD_MAX];
|
||||
dev_status_empty_t cartridge[2];
|
||||
} machine_status_t;
|
||||
|
||||
extern machine_status_t machine_status;
|
||||
|
||||
extern void machine_status_init();
|
||||
|
||||
#endif /*EMU_MACHINE_STATUS_H*/
|
||||
@@ -1,15 +1,15 @@
|
||||
#ifndef EMU_MCA_H
|
||||
# define EMU_MCA_H
|
||||
#define EMU_MCA_H
|
||||
|
||||
extern void mca_init(int nr_cards);
|
||||
extern void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), uint8_t (*feedb)(void *priv), void (*reset)(void *priv), void *priv);
|
||||
extern void mca_set_index(int index);
|
||||
extern void mca_init(int nr_cards);
|
||||
extern void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), uint8_t (*feedb)(void *priv), void (*reset)(void *priv), void *priv);
|
||||
extern void mca_set_index(int index);
|
||||
extern uint8_t mca_read(uint16_t port);
|
||||
extern uint8_t mca_read_index(uint16_t port, int index);
|
||||
extern void mca_write(uint16_t port, uint8_t val);
|
||||
extern void mca_write(uint16_t port, uint8_t val);
|
||||
extern uint8_t mca_feedb(void);
|
||||
extern int mca_get_nr_cards(void);
|
||||
extern void mca_reset(void);
|
||||
extern int mca_get_nr_cards(void);
|
||||
extern void mca_reset(void);
|
||||
|
||||
extern void ps2_cache_clean(void);
|
||||
|
||||
|
||||
@@ -20,59 +20,58 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_MEM_H
|
||||
# define EMU_MEM_H
|
||||
|
||||
#define EMU_MEM_H
|
||||
|
||||
#define MEM_MAP_TO_SHADOW_RAM_MASK 1
|
||||
#define MEM_MAP_TO_RAM_ADDR_MASK 2
|
||||
|
||||
#define STATE_CPU 0
|
||||
#define STATE_BUS 2
|
||||
#define STATE_CPU 0
|
||||
#define STATE_BUS 2
|
||||
|
||||
#define ACCESS_CPU 1 /* Update CPU non-SMM access. */
|
||||
#define ACCESS_CPU_SMM 2 /* Update CPU SMM access. */
|
||||
#define ACCESS_BUS 4 /* Update bus access. */
|
||||
#define ACCESS_BUS_SMM 8 /* Update bus SMM access. */
|
||||
#define ACCESS_NORMAL 5 /* Update CPU and bus non-SMM accesses. */
|
||||
#define ACCESS_SMM 10 /* Update CPU and bus SMM accesses. */
|
||||
#define ACCESS_CPU_BOTH 3 /* Update CPU non-SMM and SMM accesses. */
|
||||
#define ACCESS_BUS_BOTH 12 /* Update bus non-SMM and SMM accesses. */
|
||||
#define ACCESS_ALL 15 /* Update all accesses. */
|
||||
#define ACCESS_CPU 1 /* Update CPU non-SMM access. */
|
||||
#define ACCESS_CPU_SMM 2 /* Update CPU SMM access. */
|
||||
#define ACCESS_BUS 4 /* Update bus access. */
|
||||
#define ACCESS_BUS_SMM 8 /* Update bus SMM access. */
|
||||
#define ACCESS_NORMAL 5 /* Update CPU and bus non-SMM accesses. */
|
||||
#define ACCESS_SMM 10 /* Update CPU and bus SMM accesses. */
|
||||
#define ACCESS_CPU_BOTH 3 /* Update CPU non-SMM and SMM accesses. */
|
||||
#define ACCESS_BUS_BOTH 12 /* Update bus non-SMM and SMM accesses. */
|
||||
#define ACCESS_ALL 15 /* Update all accesses. */
|
||||
|
||||
#define ACCESS_INTERNAL 1
|
||||
#define ACCESS_ROMCS 2
|
||||
#define ACCESS_SMRAM 4
|
||||
#define ACCESS_CACHE 8
|
||||
#define ACCESS_DISABLED 16
|
||||
#define ACCESS_INTERNAL 1
|
||||
#define ACCESS_ROMCS 2
|
||||
#define ACCESS_SMRAM 4
|
||||
#define ACCESS_CACHE 8
|
||||
#define ACCESS_DISABLED 16
|
||||
|
||||
#define ACCESS_X_INTERNAL 1
|
||||
#define ACCESS_X_ROMCS 2
|
||||
#define ACCESS_X_SMRAM 4
|
||||
#define ACCESS_X_CACHE 8
|
||||
#define ACCESS_X_DISABLED 16
|
||||
#define ACCESS_W_INTERNAL 32
|
||||
#define ACCESS_W_ROMCS 64
|
||||
#define ACCESS_W_SMRAM 128
|
||||
#define ACCESS_W_CACHE 256
|
||||
#define ACCESS_W_DISABLED 512
|
||||
#define ACCESS_R_INTERNAL 1024
|
||||
#define ACCESS_R_ROMCS 2048
|
||||
#define ACCESS_R_SMRAM 4096
|
||||
#define ACCESS_R_CACHE 8192
|
||||
#define ACCESS_R_DISABLED 16384
|
||||
#define ACCESS_X_INTERNAL 1
|
||||
#define ACCESS_X_ROMCS 2
|
||||
#define ACCESS_X_SMRAM 4
|
||||
#define ACCESS_X_CACHE 8
|
||||
#define ACCESS_X_DISABLED 16
|
||||
#define ACCESS_W_INTERNAL 32
|
||||
#define ACCESS_W_ROMCS 64
|
||||
#define ACCESS_W_SMRAM 128
|
||||
#define ACCESS_W_CACHE 256
|
||||
#define ACCESS_W_DISABLED 512
|
||||
#define ACCESS_R_INTERNAL 1024
|
||||
#define ACCESS_R_ROMCS 2048
|
||||
#define ACCESS_R_SMRAM 4096
|
||||
#define ACCESS_R_CACHE 8192
|
||||
#define ACCESS_R_DISABLED 16384
|
||||
|
||||
#define ACCESS_EXECUTE 0
|
||||
#define ACCESS_READ 1
|
||||
#define ACCESS_WRITE 2
|
||||
#define ACCESS_EXECUTE 0
|
||||
#define ACCESS_READ 1
|
||||
#define ACCESS_WRITE 2
|
||||
|
||||
#define ACCESS_SMRAM_OFF 0
|
||||
#define ACCESS_SMRAM_X 1
|
||||
#define ACCESS_SMRAM_W 2
|
||||
#define ACCESS_SMRAM_WX 3
|
||||
#define ACCESS_SMRAM_R 4
|
||||
#define ACCESS_SMRAM_RX 5
|
||||
#define ACCESS_SMRAM_RW 6
|
||||
#define ACCESS_SMRAM_RWX 7
|
||||
#define ACCESS_SMRAM_OFF 0
|
||||
#define ACCESS_SMRAM_X 1
|
||||
#define ACCESS_SMRAM_W 2
|
||||
#define ACCESS_SMRAM_WX 3
|
||||
#define ACCESS_SMRAM_R 4
|
||||
#define ACCESS_SMRAM_RX 5
|
||||
#define ACCESS_SMRAM_RW 6
|
||||
#define ACCESS_SMRAM_RWX 7
|
||||
|
||||
/* Conversion #define's - we need these to seamlessly convert the old mem_set_mem_state() calls to
|
||||
the new stuff in order to make this a drop in replacement.
|
||||
@@ -80,142 +79,142 @@
|
||||
Read here includes execute access since the old code also used read access for execute access,
|
||||
with some exceptions. */
|
||||
|
||||
#define MEM_READ_DISABLED (ACCESS_X_DISABLED | ACCESS_R_DISABLED)
|
||||
#define MEM_READ_INTERNAL (ACCESS_X_INTERNAL | ACCESS_R_INTERNAL)
|
||||
#define MEM_READ_EXTERNAL 0
|
||||
#define MEM_READ_DISABLED (ACCESS_X_DISABLED | ACCESS_R_DISABLED)
|
||||
#define MEM_READ_INTERNAL (ACCESS_X_INTERNAL | ACCESS_R_INTERNAL)
|
||||
#define MEM_READ_EXTERNAL 0
|
||||
/* These two are going to be identical - on real hardware, chips that don't care about ROMCS#,
|
||||
are not magically disabled. */
|
||||
#define MEM_READ_ROMCS (ACCESS_X_ROMCS | ACCESS_R_ROMCS)
|
||||
#define MEM_READ_EXTANY MEM_READ_ROMCS
|
||||
#define MEM_READ_ROMCS (ACCESS_X_ROMCS | ACCESS_R_ROMCS)
|
||||
#define MEM_READ_EXTANY MEM_READ_ROMCS
|
||||
/* Internal execute access, external read access. */
|
||||
#define MEM_READ_EXTERNAL_EX 0
|
||||
#define MEM_READ_SMRAM (ACCESS_X_SMRAM | ACCESS_R_SMRAM)
|
||||
#define MEM_READ_CACHE (ACCESS_X_CACHE | ACCESS_R_CACHE)
|
||||
#define MEM_READ_SMRAM_EX (ACCESS_X_SMRAM)
|
||||
#define MEM_EXEC_SMRAM MEM_READ_SMRAM_EX
|
||||
#define MEM_READ_SMRAM_2 (ACCESS_R_SMRAM)
|
||||
#define MEM_READ_EXTERNAL_EX 0
|
||||
#define MEM_READ_SMRAM (ACCESS_X_SMRAM | ACCESS_R_SMRAM)
|
||||
#define MEM_READ_CACHE (ACCESS_X_CACHE | ACCESS_R_CACHE)
|
||||
#define MEM_READ_SMRAM_EX (ACCESS_X_SMRAM)
|
||||
#define MEM_EXEC_SMRAM MEM_READ_SMRAM_EX
|
||||
#define MEM_READ_SMRAM_2 (ACCESS_R_SMRAM)
|
||||
/* Theese two are going to be identical. */
|
||||
#define MEM_READ_DISABLED_EX MEM_READ_DISABLED
|
||||
#define MEM_READ_MASK 0x7c1f
|
||||
#define MEM_READ_DISABLED_EX MEM_READ_DISABLED
|
||||
#define MEM_READ_MASK 0x7c1f
|
||||
|
||||
#define MEM_WRITE_DISABLED (ACCESS_W_DISABLED)
|
||||
#define MEM_WRITE_INTERNAL (ACCESS_W_INTERNAL)
|
||||
#define MEM_WRITE_EXTERNAL 0
|
||||
#define MEM_WRITE_DISABLED (ACCESS_W_DISABLED)
|
||||
#define MEM_WRITE_INTERNAL (ACCESS_W_INTERNAL)
|
||||
#define MEM_WRITE_EXTERNAL 0
|
||||
/* These two are going to be identical - on real hardware, chips that don't care about ROMCS#,
|
||||
are not magically disabled. */
|
||||
#define MEM_WRITE_ROMCS (ACCESS_W_ROMCS)
|
||||
#define MEM_WRITE_EXTANY (ACCESS_W_ROMCS)
|
||||
#define MEM_WRITE_SMRAM (ACCESS_W_SMRAM)
|
||||
#define MEM_WRITE_CACHE (ACCESS_W_CACHE)
|
||||
#define MEM_WRITE_ROMCS (ACCESS_W_ROMCS)
|
||||
#define MEM_WRITE_EXTANY (ACCESS_W_ROMCS)
|
||||
#define MEM_WRITE_SMRAM (ACCESS_W_SMRAM)
|
||||
#define MEM_WRITE_CACHE (ACCESS_W_CACHE)
|
||||
/* Theese two are going to be identical. */
|
||||
#define MEM_WRITE_DISABLED_EX MEM_READ_DISABLED
|
||||
#define MEM_WRITE_MASK 0x03e0
|
||||
#define MEM_WRITE_DISABLED_EX MEM_READ_DISABLED
|
||||
#define MEM_WRITE_MASK 0x03e0
|
||||
|
||||
#define MEM_MAPPING_EXTERNAL 1 /* On external bus (ISA/PCI). */
|
||||
#define MEM_MAPPING_INTERNAL 2 /* On internal bus (RAM). */
|
||||
#define MEM_MAPPING_ROM_WS 4 /* Executing from ROM may involve additional wait states. */
|
||||
#define MEM_MAPPING_IS_ROM 8 /* Responds to ROMCS#. */
|
||||
#define MEM_MAPPING_ROM (MEM_MAPPING_ROM_WS | MEM_MAPPING_IS_ROM)
|
||||
#define MEM_MAPPING_ROMCS 16 /* If it responds to ROMCS#, it requires ROMCS# asserted. */
|
||||
#define MEM_MAPPING_SMRAM 32 /* On internal bus (RAM) but SMRAM. */
|
||||
#define MEM_MAPPING_CACHE 64 /* Cache or MTRR - please avoid such mappings unless
|
||||
stricly necessary (eg. for CoreBoot). */
|
||||
#define MEM_MAPPING_EXTERNAL 1 /* On external bus (ISA/PCI). */
|
||||
#define MEM_MAPPING_INTERNAL 2 /* On internal bus (RAM). */
|
||||
#define MEM_MAPPING_ROM_WS 4 /* Executing from ROM may involve additional wait states. */
|
||||
#define MEM_MAPPING_IS_ROM 8 /* Responds to ROMCS#. */
|
||||
#define MEM_MAPPING_ROM (MEM_MAPPING_ROM_WS | MEM_MAPPING_IS_ROM)
|
||||
#define MEM_MAPPING_ROMCS 16 /* If it responds to ROMCS#, it requires ROMCS# asserted. */
|
||||
#define MEM_MAPPING_SMRAM 32 /* On internal bus (RAM) but SMRAM. */
|
||||
#define MEM_MAPPING_CACHE 64 /* Cache or MTRR - please avoid such mappings unless \
|
||||
stricly necessary (eg. for CoreBoot). */
|
||||
|
||||
/* #define's for memory granularity, currently 4k, less does
|
||||
not work because of internal 4k pages. */
|
||||
#define MEM_GRANULARITY_BITS 12
|
||||
#define MEM_GRANULARITY_SIZE (1 << MEM_GRANULARITY_BITS)
|
||||
#define MEM_GRANULARITY_HBOUND (MEM_GRANULARITY_SIZE - 2)
|
||||
#define MEM_GRANULARITY_QBOUND (MEM_GRANULARITY_SIZE - 4)
|
||||
#define MEM_GRANULARITY_MASK (MEM_GRANULARITY_SIZE - 1)
|
||||
#define MEM_GRANULARITY_HMASK ((1 << (MEM_GRANULARITY_BITS - 1)) - 1)
|
||||
#define MEM_GRANULARITY_QMASK ((1 << (MEM_GRANULARITY_BITS - 2)) - 1)
|
||||
#define MEM_GRANULARITY_PMASK ((1 << (MEM_GRANULARITY_BITS - 3)) - 1)
|
||||
#define MEM_MAPPINGS_NO ((0x100000 >> MEM_GRANULARITY_BITS) << 12)
|
||||
#define MEM_GRANULARITY_PAGE (MEM_GRANULARITY_MASK & ~0xfff)
|
||||
#define MEM_GRANULARITY_BASE (~MEM_GRANULARITY_MASK)
|
||||
#define MEM_GRANULARITY_BITS 12
|
||||
#define MEM_GRANULARITY_SIZE (1 << MEM_GRANULARITY_BITS)
|
||||
#define MEM_GRANULARITY_HBOUND (MEM_GRANULARITY_SIZE - 2)
|
||||
#define MEM_GRANULARITY_QBOUND (MEM_GRANULARITY_SIZE - 4)
|
||||
#define MEM_GRANULARITY_MASK (MEM_GRANULARITY_SIZE - 1)
|
||||
#define MEM_GRANULARITY_HMASK ((1 << (MEM_GRANULARITY_BITS - 1)) - 1)
|
||||
#define MEM_GRANULARITY_QMASK ((1 << (MEM_GRANULARITY_BITS - 2)) - 1)
|
||||
#define MEM_GRANULARITY_PMASK ((1 << (MEM_GRANULARITY_BITS - 3)) - 1)
|
||||
#define MEM_MAPPINGS_NO ((0x100000 >> MEM_GRANULARITY_BITS) << 12)
|
||||
#define MEM_GRANULARITY_PAGE (MEM_GRANULARITY_MASK & ~0xfff)
|
||||
#define MEM_GRANULARITY_BASE (~MEM_GRANULARITY_MASK)
|
||||
|
||||
/* Compatibility #defines. */
|
||||
#define mem_set_state(smm, mode, base, size, access) \
|
||||
mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), mode, base, size, access)
|
||||
mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), mode, base, size, access)
|
||||
#define mem_set_mem_state_common(smm, base, size, access) \
|
||||
mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 0, base, size, access)
|
||||
mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 0, base, size, access)
|
||||
#define mem_set_mem_state(base, size, access) \
|
||||
mem_set_access(ACCESS_NORMAL, 0, base, size, access)
|
||||
mem_set_access(ACCESS_NORMAL, 0, base, size, access)
|
||||
#define mem_set_mem_state_smm(base, size, access) \
|
||||
mem_set_access(ACCESS_SMM, 0, base, size, access)
|
||||
mem_set_access(ACCESS_SMM, 0, base, size, access)
|
||||
#define mem_set_mem_state_both(base, size, access) \
|
||||
mem_set_access(ACCESS_ALL, 0, base, size, access)
|
||||
mem_set_access(ACCESS_ALL, 0, base, size, access)
|
||||
#define mem_set_mem_state_cpu_both(base, size, access) \
|
||||
mem_set_access(ACCESS_CPU_BOTH, 0, base, size, access)
|
||||
mem_set_access(ACCESS_CPU_BOTH, 0, base, size, access)
|
||||
#define mem_set_mem_state_bus_both(base, size, access) \
|
||||
mem_set_access(ACCESS_BUS_BOTH, 0, base, size, access)
|
||||
mem_set_access(ACCESS_BUS_BOTH, 0, base, size, access)
|
||||
#define mem_set_mem_state_smram(smm, base, size, is_smram) \
|
||||
mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 1, base, size, is_smram)
|
||||
mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 1, base, size, is_smram)
|
||||
#define mem_set_mem_state_smram_ex(smm, base, size, is_smram) \
|
||||
mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 2, base, size, is_smram)
|
||||
mem_set_access((smm ? ACCESS_SMM : ACCESS_NORMAL), 2, base, size, is_smram)
|
||||
#define mem_set_access_smram_cpu(smm, base, size, is_smram) \
|
||||
mem_set_access((smm ? ACCESS_CPU_SMM : ACCESS_CPU), 1, base, size, is_smram)
|
||||
mem_set_access((smm ? ACCESS_CPU_SMM : ACCESS_CPU), 1, base, size, is_smram)
|
||||
#define mem_set_access_smram_bus(smm, base, size, is_smram) \
|
||||
mem_set_access((smm ? ACCESS_BUS_SMM : ACCESS_BUS), 1, base, size, is_smram)
|
||||
mem_set_access((smm ? ACCESS_BUS_SMM : ACCESS_BUS), 1, base, size, is_smram)
|
||||
#define flushmmucache_cr3 \
|
||||
flushmmucache_nopc
|
||||
|
||||
flushmmucache_nopc
|
||||
|
||||
typedef struct {
|
||||
uint16_t x :5,
|
||||
w :5,
|
||||
r :5,
|
||||
pad :1;
|
||||
uint16_t x : 5,
|
||||
w : 5,
|
||||
r : 5,
|
||||
pad : 1;
|
||||
} state_t;
|
||||
|
||||
typedef union {
|
||||
uint16_t vals[4];
|
||||
state_t states[4];
|
||||
uint16_t vals[4];
|
||||
state_t states[4];
|
||||
} mem_state_t;
|
||||
|
||||
typedef struct _mem_mapping_ {
|
||||
struct _mem_mapping_ *prev, *next;
|
||||
|
||||
int enable;
|
||||
int enable;
|
||||
|
||||
uint32_t base;
|
||||
uint32_t size;
|
||||
uint32_t base;
|
||||
uint32_t size;
|
||||
|
||||
uint8_t (*read_b)(uint32_t addr, void *priv);
|
||||
uint16_t (*read_w)(uint32_t addr, void *priv);
|
||||
uint32_t (*read_l)(uint32_t addr, void *priv);
|
||||
void (*write_b)(uint32_t addr, uint8_t val, void *priv);
|
||||
void (*write_w)(uint32_t addr, uint16_t val, void *priv);
|
||||
void (*write_l)(uint32_t addr, uint32_t val, void *priv);
|
||||
uint32_t mask;
|
||||
|
||||
uint8_t *exec;
|
||||
uint8_t (*read_b)(uint32_t addr, void *priv);
|
||||
uint16_t (*read_w)(uint32_t addr, void *priv);
|
||||
uint32_t (*read_l)(uint32_t addr, void *priv);
|
||||
void (*write_b)(uint32_t addr, uint8_t val, void *priv);
|
||||
void (*write_w)(uint32_t addr, uint16_t val, void *priv);
|
||||
void (*write_l)(uint32_t addr, uint32_t val, void *priv);
|
||||
|
||||
uint32_t flags;
|
||||
uint8_t *exec;
|
||||
|
||||
uint32_t flags;
|
||||
|
||||
/* There is never a needed to pass a pointer to the mapping itself, it is much preferable to
|
||||
prepare a structure with the requires data (usually, the base address and mask) instead. */
|
||||
void *p; /* backpointer to device */
|
||||
void *p; /* backpointer to device */
|
||||
} mem_mapping_t;
|
||||
|
||||
#ifdef USE_NEW_DYNAREC
|
||||
extern uint64_t *byte_dirty_mask;
|
||||
extern uint64_t *byte_code_present_mask;
|
||||
|
||||
#define PAGE_BYTE_MASK_SHIFT 6
|
||||
#define PAGE_BYTE_MASK_OFFSET_MASK 63
|
||||
#define PAGE_BYTE_MASK_MASK 63
|
||||
# define PAGE_BYTE_MASK_SHIFT 6
|
||||
# define PAGE_BYTE_MASK_OFFSET_MASK 63
|
||||
# define PAGE_BYTE_MASK_MASK 63
|
||||
|
||||
#define EVICT_NOT_IN_LIST ((uint32_t)-1)
|
||||
typedef struct page_t
|
||||
{
|
||||
void (*write_b)(uint32_t addr, uint8_t val, struct page_t *p);
|
||||
void (*write_w)(uint32_t addr, uint16_t val, struct page_t *p);
|
||||
void (*write_l)(uint32_t addr, uint32_t val, struct page_t *p);
|
||||
# define EVICT_NOT_IN_LIST ((uint32_t) -1)
|
||||
typedef struct page_t {
|
||||
void (*write_b)(uint32_t addr, uint8_t val, struct page_t *p);
|
||||
void (*write_w)(uint32_t addr, uint16_t val, struct page_t *p);
|
||||
void (*write_l)(uint32_t addr, uint32_t val, struct page_t *p);
|
||||
|
||||
uint8_t *mem;
|
||||
uint8_t *mem;
|
||||
|
||||
uint16_t block, block_2;
|
||||
uint16_t block, block_2;
|
||||
|
||||
/*Head of codeblock tree associated with this page*/
|
||||
uint16_t head;
|
||||
@@ -238,14 +237,14 @@ void page_remove_from_evict_list(page_t *p);
|
||||
void page_add_to_evict_list(page_t *p);
|
||||
#else
|
||||
typedef struct _page_ {
|
||||
void (*write_b)(uint32_t addr, uint8_t val, struct _page_ *p);
|
||||
void (*write_w)(uint32_t addr, uint16_t val, struct _page_ *p);
|
||||
void (*write_l)(uint32_t addr, uint32_t val, struct _page_ *p);
|
||||
void (*write_b)(uint32_t addr, uint8_t val, struct _page_ *p);
|
||||
void (*write_w)(uint32_t addr, uint16_t val, struct _page_ *p);
|
||||
void (*write_l)(uint32_t addr, uint32_t val, struct _page_ *p);
|
||||
|
||||
uint8_t *mem;
|
||||
uint8_t *mem;
|
||||
|
||||
uint64_t code_present_mask[4],
|
||||
dirty_mask[4];
|
||||
uint64_t code_present_mask[4],
|
||||
dirty_mask[4];
|
||||
|
||||
struct codeblock_t *block[4], *block_2[4];
|
||||
|
||||
@@ -254,232 +253,232 @@ typedef struct _page_ {
|
||||
} page_t;
|
||||
#endif
|
||||
|
||||
extern uint8_t *ram, *ram2;
|
||||
extern uint32_t rammask;
|
||||
|
||||
extern uint8_t *ram, *ram2;
|
||||
extern uint32_t rammask;
|
||||
extern uint8_t *rom;
|
||||
extern uint32_t biosmask, biosaddr;
|
||||
|
||||
extern uint8_t *rom;
|
||||
extern uint32_t biosmask, biosaddr;
|
||||
extern int readlookup[256];
|
||||
extern uintptr_t *readlookup2;
|
||||
extern uintptr_t old_rl2;
|
||||
extern uint8_t uncached;
|
||||
extern int readlnext;
|
||||
extern int writelookup[256];
|
||||
extern uintptr_t *writelookup2;
|
||||
extern int writelnext;
|
||||
extern uint32_t ram_mapped_addr[64];
|
||||
extern uint8_t page_ff[4096];
|
||||
|
||||
extern int readlookup[256];
|
||||
extern uintptr_t * readlookup2;
|
||||
extern uintptr_t old_rl2;
|
||||
extern uint8_t uncached;
|
||||
extern int readlnext;
|
||||
extern int writelookup[256];
|
||||
extern uintptr_t * writelookup2;
|
||||
extern int writelnext;
|
||||
extern uint32_t ram_mapped_addr[64];
|
||||
|
||||
extern mem_mapping_t ram_low_mapping,
|
||||
extern mem_mapping_t ram_low_mapping,
|
||||
#if 1
|
||||
ram_mid_mapping,
|
||||
ram_mid_mapping,
|
||||
#endif
|
||||
ram_remapped_mapping,
|
||||
ram_high_mapping,
|
||||
ram_2gb_mapping,
|
||||
bios_mapping,
|
||||
bios_high_mapping;
|
||||
ram_remapped_mapping,
|
||||
ram_high_mapping,
|
||||
ram_2gb_mapping,
|
||||
bios_mapping,
|
||||
bios_high_mapping;
|
||||
|
||||
extern uint32_t mem_logical_addr;
|
||||
extern uint32_t mem_logical_addr;
|
||||
|
||||
extern page_t *pages,
|
||||
**page_lookup;
|
||||
extern page_t *pages,
|
||||
**page_lookup;
|
||||
|
||||
extern uint32_t get_phys_virt, get_phys_phys;
|
||||
extern uint32_t get_phys_virt, get_phys_phys;
|
||||
|
||||
extern int shadowbios,
|
||||
shadowbios_write;
|
||||
extern int readlnum,
|
||||
writelnum;
|
||||
extern int shadowbios,
|
||||
shadowbios_write;
|
||||
extern int readlnum,
|
||||
writelnum;
|
||||
|
||||
extern int memspeed[11];
|
||||
extern int memspeed[11];
|
||||
|
||||
extern int mmu_perm;
|
||||
extern uint8_t high_page; /* if a high (> 4 gb) page was detected */
|
||||
extern int mmu_perm;
|
||||
extern uint8_t high_page; /* if a high (> 4 gb) page was detected */
|
||||
|
||||
extern int mem_a20_state,
|
||||
mem_a20_alt,
|
||||
mem_a20_key;
|
||||
extern uint32_t pages_sz; /* #pages in table */
|
||||
|
||||
extern int mem_a20_state,
|
||||
mem_a20_alt,
|
||||
mem_a20_key;
|
||||
|
||||
extern uint8_t read_mem_b(uint32_t addr);
|
||||
extern uint16_t read_mem_w(uint32_t addr);
|
||||
extern void write_mem_b(uint32_t addr, uint8_t val);
|
||||
extern void write_mem_w(uint32_t addr, uint16_t val);
|
||||
extern uint8_t read_mem_b(uint32_t addr);
|
||||
extern uint16_t read_mem_w(uint32_t addr);
|
||||
extern void write_mem_b(uint32_t addr, uint8_t val);
|
||||
extern void write_mem_w(uint32_t addr, uint16_t val);
|
||||
|
||||
extern uint8_t readmembl(uint32_t addr);
|
||||
extern void writemembl(uint32_t addr, uint8_t val);
|
||||
extern uint16_t readmemwl(uint32_t addr);
|
||||
extern void writememwl(uint32_t addr, uint16_t val);
|
||||
extern uint32_t readmemll(uint32_t addr);
|
||||
extern void writememll(uint32_t addr, uint32_t val);
|
||||
extern uint64_t readmemql(uint32_t addr);
|
||||
extern void writememql(uint32_t addr, uint64_t val);
|
||||
extern uint8_t readmembl(uint32_t addr);
|
||||
extern void writemembl(uint32_t addr, uint8_t val);
|
||||
extern uint16_t readmemwl(uint32_t addr);
|
||||
extern void writememwl(uint32_t addr, uint16_t val);
|
||||
extern uint32_t readmemll(uint32_t addr);
|
||||
extern void writememll(uint32_t addr, uint32_t val);
|
||||
extern uint64_t readmemql(uint32_t addr);
|
||||
extern void writememql(uint32_t addr, uint64_t val);
|
||||
|
||||
extern uint8_t readmembl_no_mmut(uint32_t addr, uint32_t a64);
|
||||
extern void writemembl_no_mmut(uint32_t addr, uint32_t a64, uint8_t val);
|
||||
extern uint16_t readmemwl_no_mmut(uint32_t addr, uint32_t *a64);
|
||||
extern void writememwl_no_mmut(uint32_t addr, uint32_t *a64, uint16_t val);
|
||||
extern uint32_t readmemll_no_mmut(uint32_t addr, uint32_t *a64);
|
||||
extern void writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val);
|
||||
extern uint8_t readmembl_no_mmut(uint32_t addr, uint32_t a64);
|
||||
extern void writemembl_no_mmut(uint32_t addr, uint32_t a64, uint8_t val);
|
||||
extern uint16_t readmemwl_no_mmut(uint32_t addr, uint32_t *a64);
|
||||
extern void writememwl_no_mmut(uint32_t addr, uint32_t *a64, uint16_t val);
|
||||
extern uint32_t readmemll_no_mmut(uint32_t addr, uint32_t *a64);
|
||||
extern void writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val);
|
||||
|
||||
extern void do_mmutranslate(uint32_t addr, uint32_t *a64, int num, int write);
|
||||
extern void do_mmutranslate(uint32_t addr, uint32_t *a64, int num, int write);
|
||||
|
||||
extern uint8_t *getpccache(uint32_t a);
|
||||
extern uint64_t mmutranslatereal(uint32_t addr, int rw);
|
||||
extern uint32_t mmutranslatereal32(uint32_t addr, int rw);
|
||||
extern void addreadlookup(uint32_t virt, uint32_t phys);
|
||||
extern void addwritelookup(uint32_t virt, uint32_t phys);
|
||||
extern uint8_t *getpccache(uint32_t a);
|
||||
extern uint64_t mmutranslatereal(uint32_t addr, int rw);
|
||||
extern uint32_t mmutranslatereal32(uint32_t addr, int rw);
|
||||
extern void addreadlookup(uint32_t virt, uint32_t phys);
|
||||
extern void addwritelookup(uint32_t virt, uint32_t phys);
|
||||
|
||||
extern void mem_mapping_set(mem_mapping_t *,
|
||||
uint32_t base,
|
||||
uint32_t size,
|
||||
uint8_t (*read_b)(uint32_t addr, void *p),
|
||||
uint16_t (*read_w)(uint32_t addr, void *p),
|
||||
uint32_t (*read_l)(uint32_t addr, void *p),
|
||||
void (*write_b)(uint32_t addr, uint8_t val, void *p),
|
||||
void (*write_w)(uint32_t addr, uint16_t val, void *p),
|
||||
void (*write_l)(uint32_t addr, uint32_t val, void *p),
|
||||
uint8_t *exec,
|
||||
uint32_t flags,
|
||||
void *p);
|
||||
extern void mem_mapping_add(mem_mapping_t *,
|
||||
uint32_t base,
|
||||
uint32_t size,
|
||||
uint8_t (*read_b)(uint32_t addr, void *p),
|
||||
uint16_t (*read_w)(uint32_t addr, void *p),
|
||||
uint32_t (*read_l)(uint32_t addr, void *p),
|
||||
void (*write_b)(uint32_t addr, uint8_t val, void *p),
|
||||
void (*write_w)(uint32_t addr, uint16_t val, void *p),
|
||||
void (*write_l)(uint32_t addr, uint32_t val, void *p),
|
||||
uint8_t *exec,
|
||||
uint32_t flags,
|
||||
void *p);
|
||||
extern void mem_mapping_set(mem_mapping_t *,
|
||||
uint32_t base,
|
||||
uint32_t size,
|
||||
uint8_t (*read_b)(uint32_t addr, void *p),
|
||||
uint16_t (*read_w)(uint32_t addr, void *p),
|
||||
uint32_t (*read_l)(uint32_t addr, void *p),
|
||||
void (*write_b)(uint32_t addr, uint8_t val, void *p),
|
||||
void (*write_w)(uint32_t addr, uint16_t val, void *p),
|
||||
void (*write_l)(uint32_t addr, uint32_t val, void *p),
|
||||
uint8_t *exec,
|
||||
uint32_t flags,
|
||||
void *p);
|
||||
extern void mem_mapping_add(mem_mapping_t *,
|
||||
uint32_t base,
|
||||
uint32_t size,
|
||||
uint8_t (*read_b)(uint32_t addr, void *p),
|
||||
uint16_t (*read_w)(uint32_t addr, void *p),
|
||||
uint32_t (*read_l)(uint32_t addr, void *p),
|
||||
void (*write_b)(uint32_t addr, uint8_t val, void *p),
|
||||
void (*write_w)(uint32_t addr, uint16_t val, void *p),
|
||||
void (*write_l)(uint32_t addr, uint32_t val, void *p),
|
||||
uint8_t *exec,
|
||||
uint32_t flags,
|
||||
void *p);
|
||||
|
||||
extern void mem_mapping_set_handler(mem_mapping_t *,
|
||||
uint8_t (*read_b)(uint32_t addr, void *p),
|
||||
uint16_t (*read_w)(uint32_t addr, void *p),
|
||||
uint32_t (*read_l)(uint32_t addr, void *p),
|
||||
void (*write_b)(uint32_t addr, uint8_t val, void *p),
|
||||
void (*write_w)(uint32_t addr, uint16_t val, void *p),
|
||||
void (*write_l)(uint32_t addr, uint32_t val, void *p));
|
||||
extern void mem_mapping_set_handler(mem_mapping_t *,
|
||||
uint8_t (*read_b)(uint32_t addr, void *p),
|
||||
uint16_t (*read_w)(uint32_t addr, void *p),
|
||||
uint32_t (*read_l)(uint32_t addr, void *p),
|
||||
void (*write_b)(uint32_t addr, uint8_t val, void *p),
|
||||
void (*write_w)(uint32_t addr, uint16_t val, void *p),
|
||||
void (*write_l)(uint32_t addr, uint32_t val, void *p));
|
||||
|
||||
extern void mem_mapping_set_p(mem_mapping_t *, void *p);
|
||||
extern void mem_mapping_set_p(mem_mapping_t *, void *p);
|
||||
|
||||
extern void mem_mapping_set_addr(mem_mapping_t *,
|
||||
uint32_t base, uint32_t size);
|
||||
extern void mem_mapping_set_exec(mem_mapping_t *, uint8_t *exec);
|
||||
extern void mem_mapping_disable(mem_mapping_t *);
|
||||
extern void mem_mapping_enable(mem_mapping_t *);
|
||||
extern void mem_mapping_recalc(uint64_t base, uint64_t size);
|
||||
extern void mem_mapping_set_addr(mem_mapping_t *,
|
||||
uint32_t base, uint32_t size);
|
||||
extern void mem_mapping_set_exec(mem_mapping_t *, uint8_t *exec);
|
||||
extern void mem_mapping_set_mask(mem_mapping_t *, uint32_t mask);
|
||||
extern void mem_mapping_disable(mem_mapping_t *);
|
||||
extern void mem_mapping_enable(mem_mapping_t *);
|
||||
extern void mem_mapping_recalc(uint64_t base, uint64_t size);
|
||||
|
||||
extern void mem_set_access(uint8_t bitmap, int mode, uint32_t base, uint32_t size, uint16_t access);
|
||||
extern void mem_set_access(uint8_t bitmap, int mode, uint32_t base, uint32_t size, uint16_t access);
|
||||
|
||||
extern uint8_t mem_readb_phys(uint32_t addr);
|
||||
extern uint16_t mem_readw_phys(uint32_t addr);
|
||||
extern uint32_t mem_readl_phys(uint32_t addr);
|
||||
extern void mem_read_phys(void *dest, uint32_t addr, int tranfer_size);
|
||||
extern void mem_writeb_phys(uint32_t addr, uint8_t val);
|
||||
extern void mem_writew_phys(uint32_t addr, uint16_t val);
|
||||
extern void mem_writel_phys(uint32_t addr, uint32_t val);
|
||||
extern void mem_write_phys(void *src, uint32_t addr, int tranfer_size);
|
||||
extern uint8_t mem_readb_phys(uint32_t addr);
|
||||
extern uint16_t mem_readw_phys(uint32_t addr);
|
||||
extern uint32_t mem_readl_phys(uint32_t addr);
|
||||
extern void mem_read_phys(void *dest, uint32_t addr, int tranfer_size);
|
||||
extern void mem_writeb_phys(uint32_t addr, uint8_t val);
|
||||
extern void mem_writew_phys(uint32_t addr, uint16_t val);
|
||||
extern void mem_writel_phys(uint32_t addr, uint32_t val);
|
||||
extern void mem_write_phys(void *src, uint32_t addr, int tranfer_size);
|
||||
|
||||
extern uint8_t mem_read_ram(uint32_t addr, void *priv);
|
||||
extern uint16_t mem_read_ramw(uint32_t addr, void *priv);
|
||||
extern uint32_t mem_read_raml(uint32_t addr, void *priv);
|
||||
extern void mem_write_ram(uint32_t addr, uint8_t val, void *priv);
|
||||
extern void mem_write_ramw(uint32_t addr, uint16_t val, void *priv);
|
||||
extern void mem_write_raml(uint32_t addr, uint32_t val, void *priv);
|
||||
extern uint8_t mem_read_ram(uint32_t addr, void *priv);
|
||||
extern uint16_t mem_read_ramw(uint32_t addr, void *priv);
|
||||
extern uint32_t mem_read_raml(uint32_t addr, void *priv);
|
||||
extern void mem_write_ram(uint32_t addr, uint8_t val, void *priv);
|
||||
extern void mem_write_ramw(uint32_t addr, uint16_t val, void *priv);
|
||||
extern void mem_write_raml(uint32_t addr, uint32_t val, void *priv);
|
||||
|
||||
extern uint8_t mem_read_ram_2gb(uint32_t addr, void *priv);
|
||||
extern uint16_t mem_read_ram_2gbw(uint32_t addr, void *priv);
|
||||
extern uint32_t mem_read_ram_2gbl(uint32_t addr, void *priv);
|
||||
extern void mem_write_ram_2gb(uint32_t addr, uint8_t val, void *priv);
|
||||
extern void mem_write_ram_2gbw(uint32_t addr, uint16_t val, void *priv);
|
||||
extern void mem_write_ram_2gbl(uint32_t addr, uint32_t val, void *priv);
|
||||
extern uint8_t mem_read_ram_2gb(uint32_t addr, void *priv);
|
||||
extern uint16_t mem_read_ram_2gbw(uint32_t addr, void *priv);
|
||||
extern uint32_t mem_read_ram_2gbl(uint32_t addr, void *priv);
|
||||
extern void mem_write_ram_2gb(uint32_t addr, uint8_t val, void *priv);
|
||||
extern void mem_write_ram_2gbw(uint32_t addr, uint16_t val, void *priv);
|
||||
extern void mem_write_ram_2gbl(uint32_t addr, uint32_t val, void *priv);
|
||||
|
||||
extern int mem_addr_is_ram(uint32_t addr);
|
||||
extern int mem_addr_is_ram(uint32_t addr);
|
||||
|
||||
extern uint64_t mmutranslate_noabrt(uint32_t addr, int rw);
|
||||
extern uint64_t mmutranslate_noabrt(uint32_t addr, int rw);
|
||||
|
||||
extern void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr);
|
||||
extern void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr);
|
||||
|
||||
extern void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p);
|
||||
extern void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p);
|
||||
extern void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p);
|
||||
extern void mem_flush_write_page(uint32_t addr, uint32_t virt);
|
||||
extern void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p);
|
||||
extern void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p);
|
||||
extern void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p);
|
||||
extern void mem_flush_write_page(uint32_t addr, uint32_t virt);
|
||||
|
||||
extern void mem_reset_page_blocks(void);
|
||||
extern void mem_reset_page_blocks(void);
|
||||
|
||||
extern void flushmmucache(void);
|
||||
extern void flushmmucache_nopc(void);
|
||||
extern void mmu_invalidate(uint32_t addr);
|
||||
extern void flushmmucache(void);
|
||||
extern void flushmmucache_nopc(void);
|
||||
extern void mmu_invalidate(uint32_t addr);
|
||||
|
||||
extern void mem_a20_init(void);
|
||||
extern void mem_a20_recalc(void);
|
||||
|
||||
extern void mem_init(void);
|
||||
extern void mem_close(void);
|
||||
extern void mem_reset(void);
|
||||
extern void mem_remap_top(int kb);
|
||||
extern void mem_a20_init(void);
|
||||
extern void mem_a20_recalc(void);
|
||||
|
||||
extern void mem_init(void);
|
||||
extern void mem_close(void);
|
||||
extern void mem_reset(void);
|
||||
extern void mem_remap_top(int kb);
|
||||
|
||||
#ifdef EMU_CPU_H
|
||||
static __inline uint32_t get_phys(uint32_t addr)
|
||||
static __inline uint32_t
|
||||
get_phys(uint32_t addr)
|
||||
{
|
||||
uint64_t pa64;
|
||||
|
||||
if (!((addr ^ get_phys_virt) & ~0xfff))
|
||||
return get_phys_phys | (addr & 0xfff);
|
||||
return get_phys_phys | (addr & 0xfff);
|
||||
|
||||
get_phys_virt = addr;
|
||||
|
||||
if (!(cr0 >> 31)) {
|
||||
get_phys_phys = (addr & rammask) & ~0xfff;
|
||||
return addr & rammask;
|
||||
get_phys_phys = (addr & rammask) & ~0xfff;
|
||||
return addr & rammask;
|
||||
}
|
||||
|
||||
if (((int) (readlookup2[addr >> 12])) != -1)
|
||||
get_phys_phys = ((uintptr_t)readlookup2[addr >> 12] + (addr & ~0xfff)) - (uintptr_t)ram;
|
||||
get_phys_phys = ((uintptr_t) readlookup2[addr >> 12] + (addr & ~0xfff)) - (uintptr_t) ram;
|
||||
else {
|
||||
pa64 = mmutranslatereal(addr, 0);
|
||||
if (pa64 > 0xffffffffULL)
|
||||
get_phys_phys = 0xffffffff;
|
||||
else
|
||||
get_phys_phys = (uint32_t) pa64;
|
||||
get_phys_phys = (get_phys_phys & rammask) & ~0xfff;
|
||||
if (!cpu_state.abrt && mem_addr_is_ram(get_phys_phys))
|
||||
addreadlookup(get_phys_virt, get_phys_phys);
|
||||
pa64 = mmutranslatereal(addr, 0);
|
||||
if (pa64 > 0xffffffffULL)
|
||||
get_phys_phys = 0xffffffff;
|
||||
else
|
||||
get_phys_phys = (uint32_t) pa64;
|
||||
get_phys_phys = (get_phys_phys & rammask) & ~0xfff;
|
||||
if (!cpu_state.abrt && mem_addr_is_ram(get_phys_phys))
|
||||
addreadlookup(get_phys_virt, get_phys_phys);
|
||||
}
|
||||
|
||||
return get_phys_phys | (addr & 0xfff);
|
||||
}
|
||||
|
||||
|
||||
static __inline uint32_t get_phys_noabrt(uint32_t addr)
|
||||
static __inline uint32_t
|
||||
get_phys_noabrt(uint32_t addr)
|
||||
{
|
||||
uint64_t phys_addr;
|
||||
uint32_t phys_addr32;
|
||||
|
||||
if (!(cr0 >> 31))
|
||||
return addr & rammask;
|
||||
return addr & rammask;
|
||||
|
||||
if (((int) (readlookup2[addr >> 12])) != -1)
|
||||
return ((uintptr_t)readlookup2[addr >> 12] + addr) - (uintptr_t)ram;
|
||||
return ((uintptr_t) readlookup2[addr >> 12] + addr) - (uintptr_t) ram;
|
||||
|
||||
phys_addr = mmutranslate_noabrt(addr, 0);
|
||||
phys_addr = mmutranslate_noabrt(addr, 0);
|
||||
phys_addr32 = (uint32_t) phys_addr;
|
||||
if ((phys_addr != 0xffffffffffffffffULL) && (phys_addr <= 0xffffffffULL) &&
|
||||
mem_addr_is_ram(phys_addr32 & rammask))
|
||||
addreadlookup(addr, phys_addr32 & rammask);
|
||||
if ((phys_addr != 0xffffffffffffffffULL) && (phys_addr <= 0xffffffffULL) && mem_addr_is_ram(phys_addr32 & rammask))
|
||||
addreadlookup(addr, phys_addr32 & rammask);
|
||||
|
||||
if (phys_addr > 0xffffffffULL)
|
||||
phys_addr32 = 0xffffffff;
|
||||
phys_addr32 = 0xffffffff;
|
||||
|
||||
return phys_addr32;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_MEM_H*/
|
||||
#endif /*EMU_MEM_H*/
|
||||
|
||||
@@ -96,8 +96,10 @@ extern const device_t rtmidi_input_device;
|
||||
extern const device_t fluidsynth_device;
|
||||
# endif
|
||||
# ifdef USE_MUNT
|
||||
extern const device_t mt32_device;
|
||||
extern const device_t mt32_old_device;
|
||||
extern const device_t mt32_new_device;
|
||||
extern const device_t cm32l_device;
|
||||
extern const device_t cm32ln_device;
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
||||
@@ -19,34 +19,33 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_MO_H
|
||||
# define EMU_MO_H
|
||||
#define EMU_MO_H
|
||||
|
||||
#define MO_NUM 4
|
||||
#define MO_NUM 4
|
||||
|
||||
#define BUF_SIZE 32768
|
||||
|
||||
#define MO_TIME 10.0
|
||||
|
||||
#define MO_TIME 10.0
|
||||
|
||||
typedef struct {
|
||||
uint32_t sectors;
|
||||
uint16_t bytes_per_sector;
|
||||
uint32_t sectors;
|
||||
uint16_t bytes_per_sector;
|
||||
} mo_type_t;
|
||||
|
||||
#define KNOWN_MO_TYPES 10
|
||||
static const mo_type_t mo_types[KNOWN_MO_TYPES] = {
|
||||
// 3.5" standard M.O. disks
|
||||
{ 248826, 512 },
|
||||
{ 446325, 512 },
|
||||
{ 1041500, 512 },
|
||||
{ 310352, 2048 },
|
||||
{ 605846, 2048 },
|
||||
{ 1063146, 2048 },
|
||||
// 5.25" M.O. disks
|
||||
{573624, 512 },
|
||||
{314568, 1024 },
|
||||
{904995, 512 },
|
||||
{637041, 1024 },
|
||||
// 3.5" standard M.O. disks
|
||||
{248826, 512 },
|
||||
{ 446325, 512 },
|
||||
{ 1041500, 512 },
|
||||
{ 310352, 2048},
|
||||
{ 605846, 2048},
|
||||
{ 1063146, 2048},
|
||||
// 5.25" M.O. disks
|
||||
{ 573624, 512 },
|
||||
{ 314568, 1024},
|
||||
{ 904995, 512 },
|
||||
{ 637041, 1024},
|
||||
};
|
||||
|
||||
typedef struct
|
||||
@@ -54,128 +53,125 @@ typedef struct
|
||||
const char vendor[9];
|
||||
const char model[16];
|
||||
const char revision[5];
|
||||
int8_t supported_media[KNOWN_MO_TYPES];
|
||||
int8_t supported_media[KNOWN_MO_TYPES];
|
||||
} mo_drive_type_t;
|
||||
|
||||
#define KNOWN_MO_DRIVE_TYPES 22
|
||||
static const mo_drive_type_t mo_drive_types[KNOWN_MO_DRIVE_TYPES] = {
|
||||
{"86BOX", "MAGNETO OPTICAL", "1.00",{1, 1, 1, 1, 1, 1, 1, 1, 1, 1}},
|
||||
{"FUJITSU", "M2512A", "1314",{1, 1, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"FUJITSU", "M2513-MCC3064SS", "1.00",{1, 1, 1, 1, 0, 0, 0, 0, 0, 0}},
|
||||
{"FUJITSU", "MCE3130SS", "0070",{1, 1, 1, 1, 1, 0, 0, 0, 0, 0}},
|
||||
{"FUJITSU", "MCF3064SS", "0030",{1, 1, 1, 1, 0, 0, 0, 0, 0, 0}},
|
||||
{"FUJITSU", "MCJ3230UB-S", "0040",{1, 1, 1, 1, 1, 1, 0, 0, 0, 0}},
|
||||
{"HP", "S6300.65", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 0}},
|
||||
{"HP", "C1716C", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 1}},
|
||||
{"IBM", "0632AAA", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 0}},
|
||||
{"IBM", "0632CHC", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 1}},
|
||||
{"IBM", "0632CHX", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 1}},
|
||||
{"IBM", "MD3125A", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"IBM", "MD3125B", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"IBM", "MTA-3127", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"IBM", "MTA-3230", "1.00",{1, 1, 0, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"MATSHITA", "LF-3000", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"MOST", "RMD-5100", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"RICOH", "RO-5031E", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 0}},
|
||||
{"SONY", "SMO-C301", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"SONY", "SMO-C501", "1.00",{0, 0, 0, 0, 0, 0, 1, 1, 0, 0}},
|
||||
{"TEAC", "OD-3000", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"TOSHIBA", "OD-D300", "1.00",{1, 0, 0, 0, 0, 0, 0, 0, 0, 0}},
|
||||
{"86BOX", "MAGNETO OPTICAL", "1.00", { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }},
|
||||
{ "FUJITSU", "M2512A", "1314", { 1, 1, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
{ "FUJITSU", "M2513-MCC3064SS", "1.00", { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "FUJITSU", "MCE3130SS", "0070", { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0 }},
|
||||
{ "FUJITSU", "MCF3064SS", "0030", { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "FUJITSU", "MCJ3230UB-S", "0040", { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 }},
|
||||
{ "HP", "S6300.65", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }},
|
||||
{ "HP", "C1716C", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 1 }},
|
||||
{ "IBM", "0632AAA", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }},
|
||||
{ "IBM", "0632CHC", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 1 }},
|
||||
{ "IBM", "0632CHX", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 1 }},
|
||||
{ "IBM", "MD3125A", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "IBM", "MD3125B", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "IBM", "MTA-3127", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "IBM", "MTA-3230", "1.00", { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "MATSHITA", "LF-3000", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "MOST", "RMD-5100", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "RICOH", "RO-5031E", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }},
|
||||
{ "SONY", "SMO-C301", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "SONY", "SMO-C501", "1.00", { 0, 0, 0, 0, 0, 0, 1, 1, 0, 0 }},
|
||||
{ "TEAC", "OD-3000", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }},
|
||||
{ "TOSHIBA", "OD-D300", "1.00", { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }},
|
||||
};
|
||||
|
||||
enum {
|
||||
MO_BUS_DISABLED = 0,
|
||||
MO_BUS_ATAPI = 5,
|
||||
MO_BUS_ATAPI = 5,
|
||||
MO_BUS_SCSI,
|
||||
MO_BUS_USB
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
uint8_t id;
|
||||
uint8_t id;
|
||||
|
||||
union {
|
||||
uint8_t res, res0, /* Reserved for other ID's. */
|
||||
res1,
|
||||
ide_channel, scsi_device_id;
|
||||
uint8_t res, res0, /* Reserved for other ID's. */
|
||||
res1,
|
||||
ide_channel, scsi_device_id;
|
||||
};
|
||||
|
||||
uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */
|
||||
bus_mode, /* Bit 0 = PIO suported;
|
||||
Bit 1 = DMA supportd. */
|
||||
read_only, /* Struct variable reserved for
|
||||
media status. */
|
||||
pad, pad0;
|
||||
uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */
|
||||
bus_mode, /* Bit 0 = PIO suported;
|
||||
Bit 1 = DMA supportd. */
|
||||
read_only, /* Struct variable reserved for
|
||||
media status. */
|
||||
pad, pad0;
|
||||
|
||||
FILE *f;
|
||||
void *priv;
|
||||
FILE *f;
|
||||
void *priv;
|
||||
|
||||
char image_path[1024],
|
||||
prev_image_path[1024];
|
||||
char image_path[1024],
|
||||
prev_image_path[1024];
|
||||
|
||||
uint32_t type, medium_size,
|
||||
base;
|
||||
uint16_t sector_size;
|
||||
uint32_t type, medium_size,
|
||||
base;
|
||||
uint16_t sector_size;
|
||||
|
||||
} mo_drive_t;
|
||||
|
||||
typedef struct {
|
||||
mode_sense_pages_t ms_pages_saved;
|
||||
mode_sense_pages_t ms_pages_saved;
|
||||
|
||||
mo_drive_t *drv;
|
||||
|
||||
uint8_t *buffer,
|
||||
atapi_cdb[16],
|
||||
current_cdb[16],
|
||||
sense[256];
|
||||
atapi_cdb[16],
|
||||
current_cdb[16],
|
||||
sense[256];
|
||||
|
||||
uint8_t status, phase,
|
||||
error, id,
|
||||
features, cur_lun,
|
||||
pad0, pad1;
|
||||
error, id,
|
||||
features, cur_lun,
|
||||
pad0, pad1;
|
||||
|
||||
uint16_t request_length, max_transfer_len;
|
||||
|
||||
int requested_blocks, packet_status,
|
||||
total_length, do_page_save,
|
||||
unit_attention, request_pos,
|
||||
old_len, pad3;
|
||||
total_length, do_page_save,
|
||||
unit_attention, request_pos,
|
||||
old_len, pad3;
|
||||
|
||||
uint32_t sector_pos, sector_len,
|
||||
packet_len, pos;
|
||||
packet_len, pos;
|
||||
|
||||
double callback;
|
||||
} mo_t;
|
||||
|
||||
|
||||
extern mo_t *mo[MO_NUM];
|
||||
extern mo_drive_t mo_drives[MO_NUM];
|
||||
extern uint8_t atapi_mo_drives[8];
|
||||
extern uint8_t scsi_mo_drives[16];
|
||||
extern mo_t *mo[MO_NUM];
|
||||
extern mo_drive_t mo_drives[MO_NUM];
|
||||
extern uint8_t atapi_mo_drives[8];
|
||||
extern uint8_t scsi_mo_drives[16];
|
||||
|
||||
#define mo_sense_error dev->sense[0]
|
||||
#define mo_sense_key dev->sense[2]
|
||||
#define mo_asc dev->sense[12]
|
||||
#define mo_ascq dev->sense[13]
|
||||
|
||||
#define mo_sense_key dev->sense[2]
|
||||
#define mo_asc dev->sense[12]
|
||||
#define mo_ascq dev->sense[13]
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern void mo_disk_close(mo_t *dev);
|
||||
extern void mo_disk_reload(mo_t *dev);
|
||||
extern void mo_insert(mo_t *dev);
|
||||
extern void mo_disk_close(mo_t *dev);
|
||||
extern void mo_disk_reload(mo_t *dev);
|
||||
extern void mo_insert(mo_t *dev);
|
||||
|
||||
extern void mo_global_init(void);
|
||||
extern void mo_hard_reset(void);
|
||||
extern void mo_global_init(void);
|
||||
extern void mo_hard_reset(void);
|
||||
|
||||
extern void mo_reset(scsi_common_t *sc);
|
||||
extern int mo_load(mo_t *dev, char *fn);
|
||||
extern void mo_close();
|
||||
extern void mo_reset(scsi_common_t *sc);
|
||||
extern int mo_load(mo_t *dev, char *fn);
|
||||
extern void mo_close();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_MO_H*/
|
||||
#endif /*EMU_MO_H*/
|
||||
|
||||
@@ -18,75 +18,71 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_MOUSE_H
|
||||
# define EMU_MOUSE_H
|
||||
#define EMU_MOUSE_H
|
||||
|
||||
#define MOUSE_TYPE_NONE 0 /* no mouse configured */
|
||||
#define MOUSE_TYPE_INTERNAL 1 /* machine has internal mouse */
|
||||
#define MOUSE_TYPE_LOGIBUS 2 /* Logitech/ATI Bus Mouse */
|
||||
#define MOUSE_TYPE_INPORT 3 /* Microsoft InPort Mouse */
|
||||
#define MOUSE_TYPE_NONE 0 /* no mouse configured */
|
||||
#define MOUSE_TYPE_INTERNAL 1 /* machine has internal mouse */
|
||||
#define MOUSE_TYPE_LOGIBUS 2 /* Logitech/ATI Bus Mouse */
|
||||
#define MOUSE_TYPE_INPORT 3 /* Microsoft InPort Mouse */
|
||||
#if 0
|
||||
# define MOUSE_TYPE_GENIBUS 4 /* Genius Bus Mouse */
|
||||
# define MOUSE_TYPE_GENIBUS 4 /* Genius Bus Mouse */
|
||||
#endif
|
||||
#define MOUSE_TYPE_MSYSTEMS 5 /* Mouse Systems mouse */
|
||||
#define MOUSE_TYPE_MICROSOFT 6 /* Microsoft 2-button Serial Mouse */
|
||||
#define MOUSE_TYPE_MS3BUTTON 7 /* Microsoft 3-button Serial Mouse */
|
||||
#define MOUSE_TYPE_MSWHEEL 8 /* Microsoft Serial Wheel Mouse */
|
||||
#define MOUSE_TYPE_LOGITECH 9 /* Logitech 2-button Serial Mouse */
|
||||
#define MOUSE_TYPE_LT3BUTTON 10 /* Logitech 3-button Serial Mouse */
|
||||
#define MOUSE_TYPE_PS2 11 /* PS/2 series Bus Mouse */
|
||||
|
||||
#define MOUSE_TYPE_ONBOARD 0x80 /* Mouse is an on-board version of one of the above. */
|
||||
#define MOUSE_TYPE_MSYSTEMS 5 /* Mouse Systems mouse */
|
||||
#define MOUSE_TYPE_MICROSOFT 6 /* Microsoft 2-button Serial Mouse */
|
||||
#define MOUSE_TYPE_MS3BUTTON 7 /* Microsoft 3-button Serial Mouse */
|
||||
#define MOUSE_TYPE_MSWHEEL 8 /* Microsoft Serial Wheel Mouse */
|
||||
#define MOUSE_TYPE_LOGITECH 9 /* Logitech 2-button Serial Mouse */
|
||||
#define MOUSE_TYPE_LT3BUTTON 10 /* Logitech 3-button Serial Mouse */
|
||||
#define MOUSE_TYPE_PS2 11 /* PS/2 series Bus Mouse */
|
||||
|
||||
#define MOUSE_TYPE_ONBOARD 0x80 /* Mouse is an on-board version of one of the above. */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern int mouse_type;
|
||||
extern int mouse_x, mouse_y, mouse_z;
|
||||
extern int mouse_buttons;
|
||||
|
||||
extern int mouse_type;
|
||||
extern int mouse_x, mouse_y, mouse_z;
|
||||
extern int mouse_buttons;
|
||||
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t *mouse_get_device(int mouse);
|
||||
extern void *mouse_ps2_init(const device_t *);
|
||||
extern const device_t *mouse_get_device(int mouse);
|
||||
extern void *mouse_ps2_init(const device_t *);
|
||||
|
||||
extern const device_t mouse_logibus_device;
|
||||
extern const device_t mouse_logibus_onboard_device;
|
||||
extern const device_t mouse_msinport_device;
|
||||
#if 0
|
||||
extern const device_t mouse_logibus_device;
|
||||
extern const device_t mouse_logibus_onboard_device;
|
||||
extern const device_t mouse_msinport_device;
|
||||
# if 0
|
||||
extern const device_t mouse_genibus_device;
|
||||
#endif
|
||||
extern const device_t mouse_mssystems_device;
|
||||
extern const device_t mouse_msserial_device;
|
||||
extern const device_t mouse_ltserial_device;
|
||||
extern const device_t mouse_ps2_device;
|
||||
# endif
|
||||
extern const device_t mouse_mssystems_device;
|
||||
extern const device_t mouse_msserial_device;
|
||||
extern const device_t mouse_ltserial_device;
|
||||
extern const device_t mouse_ps2_device;
|
||||
#endif
|
||||
|
||||
extern void mouse_init(void);
|
||||
extern void mouse_close(void);
|
||||
extern void mouse_reset(void);
|
||||
extern void mouse_set_buttons(int buttons);
|
||||
extern void mouse_process(void);
|
||||
extern void mouse_set_poll(int (*f)(int,int,int,int,void *), void *);
|
||||
extern void mouse_poll(void);
|
||||
extern void mouse_init(void);
|
||||
extern void mouse_close(void);
|
||||
extern void mouse_reset(void);
|
||||
extern void mouse_set_buttons(int buttons);
|
||||
extern void mouse_process(void);
|
||||
extern void mouse_set_poll(int (*f)(int, int, int, int, void *), void *);
|
||||
extern void mouse_poll(void);
|
||||
|
||||
extern void mouse_bus_set_irq(void *priv, int irq);
|
||||
extern void mouse_bus_set_irq(void *priv, int irq);
|
||||
|
||||
extern char *mouse_get_name(int mouse);
|
||||
extern char *mouse_get_internal_name(int mouse);
|
||||
extern int mouse_get_from_internal_name(char *s);
|
||||
extern int mouse_has_config(int mouse);
|
||||
extern int mouse_get_type(int mouse);
|
||||
extern int mouse_get_ndev(void);
|
||||
extern int mouse_get_buttons(void);
|
||||
|
||||
extern char *mouse_get_name(int mouse);
|
||||
extern char *mouse_get_internal_name(int mouse);
|
||||
extern int mouse_get_from_internal_name(char *s);
|
||||
extern int mouse_has_config(int mouse);
|
||||
extern int mouse_get_type(int mouse);
|
||||
extern int mouse_get_ndev(void);
|
||||
extern int mouse_get_buttons(void);
|
||||
|
||||
extern void mouse_clear_data(void *priv);
|
||||
extern void mouse_clear_data(void *priv);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_MOUSE_H*/
|
||||
#endif /*EMU_MOUSE_H*/
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
#ifndef NET_3C503_H
|
||||
# define NET_3C503_H
|
||||
#define NET_3C503_H
|
||||
|
||||
extern const device_t threec503_device;
|
||||
extern const device_t threec503_device;
|
||||
|
||||
#endif /*NET_3C503_H*/
|
||||
#endif /*NET_3C503_H*/
|
||||
|
||||
@@ -18,136 +18,136 @@
|
||||
*/
|
||||
|
||||
#ifndef NET_DP8390_H
|
||||
# define NET_DP8390_H
|
||||
#define NET_DP8390_H
|
||||
|
||||
/* Never completely fill the ne2k ring so that we never
|
||||
hit the unclear completely full buffer condition. */
|
||||
#define DP8390_NEVER_FULL_RING (1)
|
||||
|
||||
#define DP8390_DWORD_MEMSIZ (32*1024)
|
||||
#define DP8390_DWORD_MEMSTART (16*1024)
|
||||
#define DP8390_DWORD_MEMEND (DP8390_DWORD_MEMSTART+DP8390_DWORD_MEMSIZ)
|
||||
#define DP8390_DWORD_MEMSIZ (32 * 1024)
|
||||
#define DP8390_DWORD_MEMSTART (16 * 1024)
|
||||
#define DP8390_DWORD_MEMEND (DP8390_DWORD_MEMSTART + DP8390_DWORD_MEMSIZ)
|
||||
|
||||
#define DP8390_WORD_MEMSIZ (16*1024)
|
||||
#define DP8390_WORD_MEMSTART (8*1024)
|
||||
#define DP8390_WORD_MEMEND (DP8390_WORD_MEMSTART+DP8390_WORD_MEMSIZ)
|
||||
#define DP8390_WORD_MEMSIZ (16 * 1024)
|
||||
#define DP8390_WORD_MEMSTART (8 * 1024)
|
||||
#define DP8390_WORD_MEMEND (DP8390_WORD_MEMSTART + DP8390_WORD_MEMSIZ)
|
||||
|
||||
#define DP8390_FLAG_EVEN_MAC 0x01
|
||||
#define DP8390_FLAG_CHECK_CR 0x02
|
||||
#define DP8390_FLAG_CLEAR_IRQ 0x04
|
||||
#define DP8390_FLAG_EVEN_MAC 0x01
|
||||
#define DP8390_FLAG_CHECK_CR 0x02
|
||||
#define DP8390_FLAG_CLEAR_IRQ 0x04
|
||||
|
||||
typedef struct {
|
||||
/* Page 0 */
|
||||
|
||||
/* Command Register - 00h read/write */
|
||||
struct CR_t {
|
||||
int stop; /* STP - Software Reset command */
|
||||
int start; /* START - start the NIC */
|
||||
int tx_packet; /* TXP - initiate packet transmission */
|
||||
uint8_t rdma_cmd; /* RD0,RD1,RD2 - Remote DMA command */
|
||||
uint8_t pgsel; /* PS0,PS1 - Page select */
|
||||
} CR;
|
||||
int stop; /* STP - Software Reset command */
|
||||
int start; /* START - start the NIC */
|
||||
int tx_packet; /* TXP - initiate packet transmission */
|
||||
uint8_t rdma_cmd; /* RD0,RD1,RD2 - Remote DMA command */
|
||||
uint8_t pgsel; /* PS0,PS1 - Page select */
|
||||
} CR;
|
||||
|
||||
/* Interrupt Status Register - 07h read/write */
|
||||
struct ISR_t {
|
||||
int pkt_rx; /* PRX - packet received with no errors */
|
||||
int pkt_tx; /* PTX - packet txed with no errors */
|
||||
int rx_err; /* RXE - packet rxed with 1 or more errors */
|
||||
int tx_err; /* TXE - packet txed " " " " " */
|
||||
int overwrite; /* OVW - rx buffer resources exhausted */
|
||||
int cnt_oflow; /* CNT - network tally counter MSB's set */
|
||||
int rdma_done; /* RDC - remote DMA complete */
|
||||
int reset; /* RST - reset status */
|
||||
} ISR;
|
||||
int pkt_rx; /* PRX - packet received with no errors */
|
||||
int pkt_tx; /* PTX - packet txed with no errors */
|
||||
int rx_err; /* RXE - packet rxed with 1 or more errors */
|
||||
int tx_err; /* TXE - packet txed " " " " " */
|
||||
int overwrite; /* OVW - rx buffer resources exhausted */
|
||||
int cnt_oflow; /* CNT - network tally counter MSB's set */
|
||||
int rdma_done; /* RDC - remote DMA complete */
|
||||
int reset; /* RST - reset status */
|
||||
} ISR;
|
||||
|
||||
/* Interrupt Mask Register - 0fh write */
|
||||
struct IMR_t {
|
||||
int rx_inte; /* PRXE - packet rx interrupt enable */
|
||||
int tx_inte; /* PTXE - packet tx interrput enable */
|
||||
int rxerr_inte; /* RXEE - rx error interrupt enable */
|
||||
int txerr_inte; /* TXEE - tx error interrupt enable */
|
||||
int overw_inte; /* OVWE - overwrite warn int enable */
|
||||
int cofl_inte; /* CNTE - counter o'flow int enable */
|
||||
int rdma_inte; /* RDCE - remote DMA complete int enable */
|
||||
int reserved; /* D7 - reserved */
|
||||
} IMR;
|
||||
int rx_inte; /* PRXE - packet rx interrupt enable */
|
||||
int tx_inte; /* PTXE - packet tx interrput enable */
|
||||
int rxerr_inte; /* RXEE - rx error interrupt enable */
|
||||
int txerr_inte; /* TXEE - tx error interrupt enable */
|
||||
int overw_inte; /* OVWE - overwrite warn int enable */
|
||||
int cofl_inte; /* CNTE - counter o'flow int enable */
|
||||
int rdma_inte; /* RDCE - remote DMA complete int enable */
|
||||
int reserved; /* D7 - reserved */
|
||||
} IMR;
|
||||
|
||||
/* Data Configuration Register - 0eh write */
|
||||
struct DCR_t {
|
||||
int wdsize; /* WTS - 8/16-bit select */
|
||||
int endian; /* BOS - byte-order select */
|
||||
int longaddr; /* LAS - long-address select */
|
||||
int loop; /* LS - loopback select */
|
||||
int auto_rx; /* AR - auto-remove rx pkts with remote DMA */
|
||||
uint8_t fifo_size; /* FT0,FT1 - fifo threshold */
|
||||
} DCR;
|
||||
int wdsize; /* WTS - 8/16-bit select */
|
||||
int endian; /* BOS - byte-order select */
|
||||
int longaddr; /* LAS - long-address select */
|
||||
int loop; /* LS - loopback select */
|
||||
int auto_rx; /* AR - auto-remove rx pkts with remote DMA */
|
||||
uint8_t fifo_size; /* FT0,FT1 - fifo threshold */
|
||||
} DCR;
|
||||
|
||||
/* Transmit Configuration Register - 0dh write */
|
||||
struct TCR_t {
|
||||
int crc_disable; /* CRC - inhibit tx CRC */
|
||||
uint8_t loop_cntl; /* LB0,LB1 - loopback control */
|
||||
int ext_stoptx; /* ATD - allow tx disable by external mcast */
|
||||
int coll_prio; /* OFST - backoff algorithm select */
|
||||
uint8_t reserved; /* D5,D6,D7 - reserved */
|
||||
} TCR;
|
||||
int crc_disable; /* CRC - inhibit tx CRC */
|
||||
uint8_t loop_cntl; /* LB0,LB1 - loopback control */
|
||||
int ext_stoptx; /* ATD - allow tx disable by external mcast */
|
||||
int coll_prio; /* OFST - backoff algorithm select */
|
||||
uint8_t reserved; /* D5,D6,D7 - reserved */
|
||||
} TCR;
|
||||
|
||||
/* Transmit Status Register - 04h read */
|
||||
struct TSR_t {
|
||||
int tx_ok; /* PTX - tx complete without error */
|
||||
int reserved; /* D1 - reserved */
|
||||
int collided; /* COL - tx collided >= 1 times */
|
||||
int aborted; /* ABT - aborted due to excessive collisions */
|
||||
int no_carrier; /* CRS - carrier-sense lost */
|
||||
int fifo_ur; /* FU - FIFO underrun */
|
||||
int cd_hbeat; /* CDH - no tx cd-heartbeat from transceiver */
|
||||
int ow_coll; /* OWC - out-of-window collision */
|
||||
} TSR;
|
||||
int tx_ok; /* PTX - tx complete without error */
|
||||
int reserved; /* D1 - reserved */
|
||||
int collided; /* COL - tx collided >= 1 times */
|
||||
int aborted; /* ABT - aborted due to excessive collisions */
|
||||
int no_carrier; /* CRS - carrier-sense lost */
|
||||
int fifo_ur; /* FU - FIFO underrun */
|
||||
int cd_hbeat; /* CDH - no tx cd-heartbeat from transceiver */
|
||||
int ow_coll; /* OWC - out-of-window collision */
|
||||
} TSR;
|
||||
|
||||
/* Receive Configuration Register - 0ch write */
|
||||
struct RCR_t {
|
||||
int errors_ok; /* SEP - accept pkts with rx errors */
|
||||
int runts_ok; /* AR - accept < 64-byte runts */
|
||||
int broadcast; /* AB - accept eth broadcast address */
|
||||
int multicast; /* AM - check mcast hash array */
|
||||
int promisc; /* PRO - accept all packets */
|
||||
int monitor; /* MON - check pkts, but don't rx */
|
||||
uint8_t reserved; /* D6,D7 - reserved */
|
||||
} RCR;
|
||||
int errors_ok; /* SEP - accept pkts with rx errors */
|
||||
int runts_ok; /* AR - accept < 64-byte runts */
|
||||
int broadcast; /* AB - accept eth broadcast address */
|
||||
int multicast; /* AM - check mcast hash array */
|
||||
int promisc; /* PRO - accept all packets */
|
||||
int monitor; /* MON - check pkts, but don't rx */
|
||||
uint8_t reserved; /* D6,D7 - reserved */
|
||||
} RCR;
|
||||
|
||||
/* Receive Status Register - 0ch read */
|
||||
struct RSR_t {
|
||||
int rx_ok; /* PRX - rx complete without error */
|
||||
int bad_crc; /* CRC - Bad CRC detected */
|
||||
int bad_falign; /* FAE - frame alignment error */
|
||||
int fifo_or; /* FO - FIFO overrun */
|
||||
int rx_missed; /* MPA - missed packet error */
|
||||
int rx_mbit; /* PHY - unicast or mcast/bcast address match */
|
||||
int rx_disabled; /* DIS - set when in monitor mode */
|
||||
int deferred; /* DFR - collision active */
|
||||
} RSR;
|
||||
int rx_ok; /* PRX - rx complete without error */
|
||||
int bad_crc; /* CRC - Bad CRC detected */
|
||||
int bad_falign; /* FAE - frame alignment error */
|
||||
int fifo_or; /* FO - FIFO overrun */
|
||||
int rx_missed; /* MPA - missed packet error */
|
||||
int rx_mbit; /* PHY - unicast or mcast/bcast address match */
|
||||
int rx_disabled; /* DIS - set when in monitor mode */
|
||||
int deferred; /* DFR - collision active */
|
||||
} RSR;
|
||||
|
||||
uint16_t local_dma; /* 01,02h read ; current local DMA addr */
|
||||
uint8_t page_start; /* 01h write ; page start regr */
|
||||
uint8_t page_stop; /* 02h write ; page stop regr */
|
||||
uint8_t bound_ptr; /* 03h read/write ; boundary pointer */
|
||||
uint8_t tx_page_start; /* 04h write ; transmit page start reg */
|
||||
uint8_t num_coll; /* 05h read ; number-of-collisions reg */
|
||||
uint16_t tx_bytes; /* 05,06h write ; transmit byte-count reg */
|
||||
uint8_t fifo; /* 06h read ; FIFO */
|
||||
uint16_t remote_dma; /* 08,09h read ; current remote DMA addr */
|
||||
uint16_t remote_start; /* 08,09h write ; remote start address reg */
|
||||
uint16_t remote_bytes; /* 0a,0bh write ; remote byte-count reg */
|
||||
uint8_t tallycnt_0; /* 0dh read ; tally ctr 0 (frame align errs) */
|
||||
uint8_t tallycnt_1; /* 0eh read ; tally ctr 1 (CRC errors) */
|
||||
uint8_t tallycnt_2; /* 0fh read ; tally ctr 2 (missed pkt errs) */
|
||||
uint16_t local_dma; /* 01,02h read ; current local DMA addr */
|
||||
uint8_t page_start; /* 01h write ; page start regr */
|
||||
uint8_t page_stop; /* 02h write ; page stop regr */
|
||||
uint8_t bound_ptr; /* 03h read/write ; boundary pointer */
|
||||
uint8_t tx_page_start; /* 04h write ; transmit page start reg */
|
||||
uint8_t num_coll; /* 05h read ; number-of-collisions reg */
|
||||
uint16_t tx_bytes; /* 05,06h write ; transmit byte-count reg */
|
||||
uint8_t fifo; /* 06h read ; FIFO */
|
||||
uint16_t remote_dma; /* 08,09h read ; current remote DMA addr */
|
||||
uint16_t remote_start; /* 08,09h write ; remote start address reg */
|
||||
uint16_t remote_bytes; /* 0a,0bh write ; remote byte-count reg */
|
||||
uint8_t tallycnt_0; /* 0dh read ; tally ctr 0 (frame align errs) */
|
||||
uint8_t tallycnt_1; /* 0eh read ; tally ctr 1 (CRC errors) */
|
||||
uint8_t tallycnt_2; /* 0fh read ; tally ctr 2 (missed pkt errs) */
|
||||
|
||||
/* Page 1 */
|
||||
|
||||
/* Command Register 00h (repeated) */
|
||||
|
||||
uint8_t physaddr[6]; /* 01-06h read/write ; MAC address */
|
||||
uint8_t curr_page; /* 07h read/write ; current page register */
|
||||
uint8_t mchash[8]; /* 08-0fh read/write ; multicast hash array */
|
||||
uint8_t physaddr[6]; /* 01-06h read/write ; MAC address */
|
||||
uint8_t curr_page; /* 07h read/write ; current page register */
|
||||
uint8_t mchash[8]; /* 08-0fh read/write ; multicast hash array */
|
||||
|
||||
/* Page 2 - diagnostic use only */
|
||||
|
||||
@@ -162,55 +162,55 @@ typedef struct {
|
||||
* Data Configuration Register 0eh read (repeated)
|
||||
* Interrupt Mask Register 0fh read (repeated)
|
||||
*/
|
||||
uint8_t rempkt_ptr; /* 03h read/write ; rmt next-pkt ptr */
|
||||
uint8_t localpkt_ptr; /* 05h read/write ; lcl next-pkt ptr */
|
||||
uint16_t address_cnt; /* 06,07h read/write ; address cter */
|
||||
uint8_t rempkt_ptr; /* 03h read/write ; rmt next-pkt ptr */
|
||||
uint8_t localpkt_ptr; /* 05h read/write ; lcl next-pkt ptr */
|
||||
uint16_t address_cnt; /* 06,07h read/write ; address cter */
|
||||
|
||||
/* Page 3 - should never be modified. */
|
||||
|
||||
/* DP8390 memory */
|
||||
uint8_t *mem; /* on-chip packet memory */
|
||||
uint8_t *mem; /* on-chip packet memory */
|
||||
|
||||
uint8_t macaddr[32]; /* ASIC ROM'd MAC address, even bytes */
|
||||
uint8_t macaddr_size, /* Defaults to 16 but can be 32 */
|
||||
flags, /* Flags affecting some behaviors. */
|
||||
id0, /* 0x50 for the Realtek NIC's, otherwise
|
||||
0xFF. */
|
||||
id1; /* 0x70 for the RTL8019AS, 0x43 for the
|
||||
RTL8029AS, otherwise 0xFF. */
|
||||
int mem_size, mem_start, mem_end;
|
||||
uint8_t macaddr[32]; /* ASIC ROM'd MAC address, even bytes */
|
||||
uint8_t macaddr_size, /* Defaults to 16 but can be 32 */
|
||||
flags, /* Flags affecting some behaviors. */
|
||||
id0, /* 0x50 for the Realtek NIC's, otherwise
|
||||
0xFF. */
|
||||
id1; /* 0x70 for the RTL8019AS, 0x43 for the
|
||||
RTL8029AS, otherwise 0xFF. */
|
||||
int mem_size, mem_start, mem_end;
|
||||
|
||||
int tx_timer_index;
|
||||
int tx_timer_active;
|
||||
int tx_timer_index;
|
||||
int tx_timer_active;
|
||||
|
||||
void *priv;
|
||||
void *priv;
|
||||
netcard_t *card;
|
||||
|
||||
void (*interrupt)(void *priv, int set);
|
||||
void (*interrupt)(void *priv, int set);
|
||||
} dp8390_t;
|
||||
|
||||
extern const device_t dp8390_device;
|
||||
extern const device_t dp8390_device;
|
||||
extern int dp3890_inst;
|
||||
|
||||
extern uint32_t dp8390_chipmem_read(dp8390_t *dev, uint32_t addr, unsigned int len);
|
||||
extern void dp8390_chipmem_write(dp8390_t *dev, uint32_t addr, uint32_t val, unsigned len);
|
||||
|
||||
extern uint32_t dp8390_chipmem_read(dp8390_t *dev, uint32_t addr, unsigned int len);
|
||||
extern void dp8390_chipmem_write(dp8390_t *dev, uint32_t addr, uint32_t val, unsigned len);
|
||||
extern uint32_t dp8390_read_cr(dp8390_t *dev);
|
||||
extern void dp8390_write_cr(dp8390_t *dev, uint32_t val);
|
||||
|
||||
extern uint32_t dp8390_read_cr(dp8390_t *dev);
|
||||
extern void dp8390_write_cr(dp8390_t *dev, uint32_t val);
|
||||
extern int dp8390_rx(void *priv, uint8_t *buf, int io_len);
|
||||
|
||||
extern int dp8390_rx(void *priv, uint8_t *buf, int io_len);
|
||||
|
||||
extern uint32_t dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len);
|
||||
extern void dp8390_page0_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len);
|
||||
extern uint32_t dp8390_page1_read(dp8390_t *dev, uint32_t off, unsigned int len);
|
||||
extern void dp8390_page1_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len);
|
||||
extern uint32_t dp8390_page2_read(dp8390_t *dev, uint32_t off, unsigned int len);
|
||||
extern void dp8390_page2_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len);
|
||||
|
||||
extern void dp8390_set_defaults(dp8390_t *dev, uint8_t flags);
|
||||
extern void dp8390_mem_alloc(dp8390_t *dev, uint32_t start, uint32_t size);
|
||||
extern void dp8390_set_id(dp8390_t *dev, uint8_t id0, uint8_t id1);
|
||||
extern void dp8390_reset(dp8390_t *dev);
|
||||
extern void dp8390_soft_reset(dp8390_t *dev);
|
||||
extern uint32_t dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len);
|
||||
extern void dp8390_page0_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len);
|
||||
extern uint32_t dp8390_page1_read(dp8390_t *dev, uint32_t off, unsigned int len);
|
||||
extern void dp8390_page1_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len);
|
||||
extern uint32_t dp8390_page2_read(dp8390_t *dev, uint32_t off, unsigned int len);
|
||||
extern void dp8390_page2_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len);
|
||||
|
||||
extern void dp8390_set_defaults(dp8390_t *dev, uint8_t flags);
|
||||
extern void dp8390_mem_alloc(dp8390_t *dev, uint32_t start, uint32_t size);
|
||||
extern void dp8390_set_id(dp8390_t *dev, uint8_t id0, uint8_t id1);
|
||||
extern void dp8390_reset(dp8390_t *dev);
|
||||
extern void dp8390_soft_reset(dp8390_t *dev);
|
||||
|
||||
#endif /*NET_DP8390_H*/
|
||||
|
||||
22
src/include/86box/net_event.h
Normal file
22
src/include/86box/net_event.h
Normal file
@@ -0,0 +1,22 @@
|
||||
#ifndef EMU_NET_EVENT_H
|
||||
#define EMU_NET_EVENT_H
|
||||
|
||||
typedef struct {
|
||||
#ifdef _WIN32
|
||||
HANDLE handle;
|
||||
#else
|
||||
int fds[2];
|
||||
#endif
|
||||
} net_evt_t;
|
||||
|
||||
extern void net_event_init(net_evt_t *event);
|
||||
extern void net_event_set(net_evt_t *event);
|
||||
extern void net_event_clear(net_evt_t *event);
|
||||
extern void net_event_close(net_evt_t *event);
|
||||
#ifdef _WIN32
|
||||
extern HANDLE net_event_get_handle(net_evt_t *event);
|
||||
#else
|
||||
extern int net_event_get_fd(net_evt_t *event);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -34,24 +34,21 @@
|
||||
*/
|
||||
|
||||
#ifndef NET_NE2000_H
|
||||
# define NET_NE2000_H
|
||||
|
||||
#define NET_NE2000_H
|
||||
|
||||
enum {
|
||||
NE2K_NONE = 0,
|
||||
NE2K_NE1000 = 1, /* 8-bit ISA NE1000 */
|
||||
NE2K_NE2000 = 2, /* 16-bit ISA NE2000 */
|
||||
NE2K_ETHERNEXT_MC = 3, /* 16-bit MCA EtherNext/MC */
|
||||
NE2K_RTL8019AS = 4, /* 16-bit ISA PnP Realtek 8019AS */
|
||||
NE2K_RTL8029AS = 5 /* 32-bit PCI Realtek 8029AS */
|
||||
NE2K_NONE = 0,
|
||||
NE2K_NE1000 = 1, /* 8-bit ISA NE1000 */
|
||||
NE2K_NE2000 = 2, /* 16-bit ISA NE2000 */
|
||||
NE2K_ETHERNEXT_MC = 3, /* 16-bit MCA EtherNext/MC */
|
||||
NE2K_RTL8019AS = 4, /* 16-bit ISA PnP Realtek 8019AS */
|
||||
NE2K_RTL8029AS = 5 /* 32-bit PCI Realtek 8029AS */
|
||||
};
|
||||
|
||||
extern const device_t ne1000_device;
|
||||
extern const device_t ne2000_device;
|
||||
extern const device_t ethernext_mc_device;
|
||||
extern const device_t rtl8019as_device;
|
||||
extern const device_t rtl8029as_device;
|
||||
|
||||
extern const device_t ne1000_device;
|
||||
extern const device_t ne2000_device;
|
||||
extern const device_t ethernext_mc_device;
|
||||
extern const device_t rtl8019as_device;
|
||||
extern const device_t rtl8029as_device;
|
||||
|
||||
|
||||
#endif /*NET_NE2000_H*/
|
||||
#endif /*NET_NE2000_H*/
|
||||
|
||||
@@ -18,24 +18,23 @@
|
||||
*/
|
||||
|
||||
#ifndef NET_PCNET_H
|
||||
# define NET_PCNET_H
|
||||
#define NET_PCNET_H
|
||||
|
||||
enum {
|
||||
DEV_NONE = 0,
|
||||
DEV_AM79C960 = 1, /* PCnet-ISA (ISA, 10 Mbps, NE2100/NE1500T compatible) */
|
||||
DEV_NONE = 0,
|
||||
DEV_AM79C960 = 1, /* PCnet-ISA (ISA, 10 Mbps, NE2100/NE1500T compatible) */
|
||||
DEV_AM79C960_EB = 2, /* PCnet-ISA (ISA, 10 Mbps, Racal InterLan EtherBlaster compatible) */
|
||||
DEV_AM79C960_VLB = 3, /* PCnet-VLB (VLB, 10 Mbps, NE2100/NE1500T compatible) */
|
||||
DEV_AM79C961 = 4, /* PCnet-ISA+ (ISA, 10 Mbps, NE2100/NE1500T compatible, Plug and Play) */
|
||||
DEV_AM79C970A = 5, /* PCnet-PCI II (PCI, 10 Mbps) */
|
||||
DEV_AM79C973 = 6 /* PCnet-FAST III (PCI, 10/100 Mbps) */
|
||||
DEV_AM79C961 = 4, /* PCnet-ISA+ (ISA, 10 Mbps, NE2100/NE1500T compatible, Plug and Play) */
|
||||
DEV_AM79C970A = 5, /* PCnet-PCI II (PCI, 10 Mbps) */
|
||||
DEV_AM79C973 = 6 /* PCnet-FAST III (PCI, 10/100 Mbps) */
|
||||
};
|
||||
|
||||
extern const device_t pcnet_am79c960_device;
|
||||
extern const device_t pcnet_am79c960_eb_device;
|
||||
extern const device_t pcnet_am79c960_vlb_device;
|
||||
extern const device_t pcnet_am79c961_device;
|
||||
extern const device_t pcnet_am79c970a_device;
|
||||
extern const device_t pcnet_am79c973_device;
|
||||
|
||||
extern const device_t pcnet_am79c960_device;
|
||||
extern const device_t pcnet_am79c960_eb_device;
|
||||
extern const device_t pcnet_am79c960_vlb_device;
|
||||
extern const device_t pcnet_am79c961_device;
|
||||
extern const device_t pcnet_am79c970a_device;
|
||||
extern const device_t pcnet_am79c973_device;
|
||||
|
||||
#endif /*NET_PCNET_H*/
|
||||
#endif /*NET_PCNET_H*/
|
||||
|
||||
@@ -15,11 +15,11 @@
|
||||
*/
|
||||
|
||||
#ifndef NET_PLIP_H
|
||||
# define NET_PLIP_H
|
||||
# include <86box/device.h>
|
||||
# include <86box/lpt.h>
|
||||
#define NET_PLIP_H
|
||||
#include <86box/device.h>
|
||||
#include <86box/lpt.h>
|
||||
|
||||
extern const lpt_device_t lpt_plip_device;
|
||||
extern const device_t plip_device;
|
||||
extern const device_t plip_device;
|
||||
|
||||
#endif /*NET_PLIP_H*/
|
||||
|
||||
@@ -42,21 +42,23 @@
|
||||
*/
|
||||
|
||||
#ifndef NET_WD8003_H
|
||||
# define NET_WD8003_H
|
||||
#define NET_WD8003_H
|
||||
|
||||
enum {
|
||||
WD_NONE = 0,
|
||||
WD8003E, /* WD8003E : 8-bit ISA, no interface chip */
|
||||
WD8003EB, /* WD8003EB : 8-bit ISA, 5x3 interface chip */
|
||||
WD8013EBT, /* WD8013EBT : 16-bit ISA, no interface chip */
|
||||
WD8003ETA, /* WD8003ET/A: 16-bit MCA, no interface chip */
|
||||
WD8003EA /* WD8003E/A : 16-bit MCA, 5x3 interface chip */
|
||||
WD8003E, /* WD8003E : 8-bit ISA, no interface chip */
|
||||
WD8003EB, /* WD8003EB : 8-bit ISA, 5x3 interface chip */
|
||||
WD8013EBT, /* WD8013EBT : 16-bit ISA, no interface chip */
|
||||
WD8003ETA, /* WD8003ET/A: 16-bit MCA, no interface chip */
|
||||
WD8003EA, /* WD8003E/A : 16-bit MCA, 5x3 interface chip */
|
||||
WD8013EPA
|
||||
};
|
||||
|
||||
extern const device_t wd8003e_device;
|
||||
extern const device_t wd8003eb_device;
|
||||
extern const device_t wd8013ebt_device;
|
||||
extern const device_t wd8003eta_device;
|
||||
extern const device_t wd8003ea_device;
|
||||
extern const device_t wd8003e_device;
|
||||
extern const device_t wd8003eb_device;
|
||||
extern const device_t wd8013ebt_device;
|
||||
extern const device_t wd8003eta_device;
|
||||
extern const device_t wd8003ea_device;
|
||||
extern const device_t wd8013epa_device;
|
||||
|
||||
#endif /*NET_WD8003_H*/
|
||||
#endif /*NET_WD8003_H*/
|
||||
|
||||
@@ -46,14 +46,34 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_NETWORK_H
|
||||
# define EMU_NETWORK_H
|
||||
# include <stdint.h>
|
||||
|
||||
#define EMU_NETWORK_H
|
||||
#include <stdint.h>
|
||||
|
||||
/* Network provider types. */
|
||||
#define NET_TYPE_NONE 0 /* networking disabled */
|
||||
#define NET_TYPE_PCAP 1 /* use the (Win)Pcap API */
|
||||
#define NET_TYPE_SLIRP 2 /* use the SLiRP port forwarder */
|
||||
#define NET_TYPE_NONE 0 /* networking disabled */
|
||||
#define NET_TYPE_SLIRP 1 /* use the SLiRP port forwarder */
|
||||
#define NET_TYPE_PCAP 2 /* use the (Win)Pcap API */
|
||||
|
||||
#define NET_MAX_FRAME 1518
|
||||
/* Queue size must be a power of 2 */
|
||||
#define NET_QUEUE_LEN 16
|
||||
#define NET_QUEUE_LEN_MASK (NET_QUEUE_LEN - 1)
|
||||
#define NET_CARD_MAX 4
|
||||
#define NET_HOST_INTF_MAX 64
|
||||
|
||||
#define NET_PERIOD_10M 0.8
|
||||
#define NET_PERIOD_100M 0.08
|
||||
|
||||
enum {
|
||||
NET_LINK_DOWN = (1 << 1),
|
||||
NET_LINK_TEMP_DOWN = (1 << 2),
|
||||
NET_LINK_10_HD = (1 << 3),
|
||||
NET_LINK_10_FD = (1 << 4),
|
||||
NET_LINK_100_HD = (1 << 5),
|
||||
NET_LINK_100_FD = (1 << 6),
|
||||
NET_LINK_1000_HD = (1 << 7),
|
||||
NET_LINK_1000_FD = (1 << 8),
|
||||
};
|
||||
|
||||
/* Supported network cards. */
|
||||
enum {
|
||||
@@ -64,85 +84,107 @@ enum {
|
||||
RTL8029AS
|
||||
};
|
||||
|
||||
enum {
|
||||
NET_QUEUE_RX,
|
||||
NET_QUEUE_TX_VM,
|
||||
NET_QUEUE_TX_HOST
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
int device_num;
|
||||
int net_type;
|
||||
char host_dev_name[128];
|
||||
uint32_t link_state;
|
||||
} netcard_conf_t;
|
||||
|
||||
extern netcard_conf_t net_cards_conf[NET_CARD_MAX];
|
||||
extern int net_card_current;
|
||||
|
||||
typedef int (*NETRXCB)(void *, uint8_t *, int);
|
||||
typedef int (*NETWAITCB)(void *);
|
||||
typedef int (*NETSETLINKSTATE)(void *);
|
||||
|
||||
typedef int (*NETSETLINKSTATE)(void *, uint32_t link_state);
|
||||
|
||||
typedef struct netpkt {
|
||||
void *priv;
|
||||
uint8_t data[65536]; /* Maximum length + 1 to round up to the nearest power of 2. */
|
||||
int len;
|
||||
|
||||
struct netpkt *prev, *next;
|
||||
uint8_t *data;
|
||||
int len;
|
||||
} netpkt_t;
|
||||
|
||||
typedef struct {
|
||||
const device_t *device;
|
||||
void *priv;
|
||||
int (*poll)(void *);
|
||||
NETRXCB rx;
|
||||
NETWAITCB wait;
|
||||
NETSETLINKSTATE set_link_state;
|
||||
} netcard_t;
|
||||
netpkt_t packets[NET_QUEUE_LEN];
|
||||
int head;
|
||||
int tail;
|
||||
} netqueue_t;
|
||||
|
||||
typedef struct _netcard_t netcard_t;
|
||||
|
||||
typedef struct netdrv_t {
|
||||
void (*notify_in)(void *priv);
|
||||
void *(*init)(const netcard_t *card, const uint8_t *mac_addr, void *priv);
|
||||
void (*close)(void *priv);
|
||||
void *priv;
|
||||
} netdrv_t;
|
||||
|
||||
extern const netdrv_t net_pcap_drv;
|
||||
extern const netdrv_t net_slirp_drv;
|
||||
|
||||
struct _netcard_t {
|
||||
const device_t *device;
|
||||
void *card_drv;
|
||||
struct netdrv_t host_drv;
|
||||
NETRXCB rx;
|
||||
NETSETLINKSTATE set_link_state;
|
||||
netqueue_t queues[3];
|
||||
netpkt_t queued_pkt;
|
||||
mutex_t *tx_mutex;
|
||||
mutex_t *rx_mutex;
|
||||
pc_timer_t timer;
|
||||
int card_num;
|
||||
double byte_period;
|
||||
uint32_t led_timer;
|
||||
uint32_t led_state;
|
||||
uint32_t link_state;
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
char device[128];
|
||||
char description[128];
|
||||
char device[128];
|
||||
char description[128];
|
||||
} netdev_t;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Global variables. */
|
||||
extern int nic_do_log; /* config */
|
||||
extern int nic_do_log; /* config */
|
||||
extern int network_ndev;
|
||||
extern int network_rx_pause;
|
||||
extern netdev_t network_devs[32];
|
||||
|
||||
extern netdev_t network_devs[NET_HOST_INTF_MAX];
|
||||
|
||||
/* Function prototypes. */
|
||||
extern void network_wait(uint8_t wait);
|
||||
extern void network_init(void);
|
||||
extern netcard_t *network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETSETLINKSTATE set_link_state);
|
||||
extern void netcard_close(netcard_t *card);
|
||||
extern void network_close(void);
|
||||
extern void network_reset(void);
|
||||
extern int network_available(void);
|
||||
extern void network_tx(netcard_t *card, uint8_t *, int);
|
||||
|
||||
extern void network_init(void);
|
||||
extern void network_attach(void *, uint8_t *, NETRXCB, NETWAITCB, NETSETLINKSTATE);
|
||||
extern void network_close(void);
|
||||
extern void network_reset(void);
|
||||
extern int network_available(void);
|
||||
extern void network_tx(uint8_t *, int);
|
||||
extern int network_tx_queue_check(void);
|
||||
extern int net_pcap_prepare(netdev_t *);
|
||||
|
||||
extern int net_pcap_prepare(netdev_t *);
|
||||
extern int net_pcap_init(void);
|
||||
extern int net_pcap_reset(const netcard_t *, uint8_t *);
|
||||
extern void net_pcap_close(void);
|
||||
extern void net_pcap_in(uint8_t *, int);
|
||||
|
||||
extern int net_slirp_init(void);
|
||||
extern int net_slirp_reset(const netcard_t *, uint8_t *);
|
||||
extern void net_slirp_close(void);
|
||||
extern void net_slirp_in(uint8_t *, int);
|
||||
|
||||
extern int network_dev_to_id(char *);
|
||||
extern int network_card_available(int);
|
||||
extern int network_card_has_config(int);
|
||||
extern char *network_card_get_internal_name(int);
|
||||
extern int network_card_get_from_internal_name(char *);
|
||||
extern const device_t *network_card_getdevice(int);
|
||||
|
||||
extern void network_set_wait(int wait);
|
||||
extern int network_get_wait(void);
|
||||
|
||||
extern void network_timer_stop(void);
|
||||
|
||||
extern void network_queue_put(int tx, void *priv, uint8_t *data, int len);
|
||||
extern void network_connect(int id, int connect);
|
||||
extern int network_is_connected(int id);
|
||||
extern int network_dev_available(int);
|
||||
extern int network_dev_to_id(char *);
|
||||
extern int network_card_available(int);
|
||||
extern int network_card_has_config(int);
|
||||
extern char *network_card_get_internal_name(int);
|
||||
extern int network_card_get_from_internal_name(char *);
|
||||
extern const device_t *network_card_getdevice(int);
|
||||
|
||||
extern int network_tx_pop(netcard_t *card, netpkt_t *out_pkt);
|
||||
extern int network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size);
|
||||
extern int network_rx_put(netcard_t *card, uint8_t *bufp, int len);
|
||||
extern int network_rx_put_pkt(netcard_t *card, netpkt_t *pkt);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_NETWORK_H*/
|
||||
#endif /*EMU_NETWORK_H*/
|
||||
|
||||
@@ -3,13 +3,12 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_NMI_H
|
||||
# define EMU_NMI_H
|
||||
#define EMU_NMI_H
|
||||
|
||||
extern int nmi_mask;
|
||||
extern int nmi;
|
||||
extern int nmi_auto_clear;
|
||||
|
||||
|
||||
extern void nmi_init(void);
|
||||
|
||||
extern void nmi_write(uint16_t port, uint8_t val, void *p);
|
||||
|
||||
@@ -48,44 +48,41 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_NVR_H
|
||||
# define EMU_NVR_H
|
||||
#define EMU_NVR_H
|
||||
|
||||
|
||||
#define NVR_MAXSIZE 512 /* max size of NVR data */
|
||||
#define NVR_MAXSIZE 512 /* max size of NVR data */
|
||||
|
||||
/* Conversion from BCD to Binary and vice versa. */
|
||||
#define RTC_BCD(x) (((x) % 10) | (((x) / 10) << 4))
|
||||
#define RTC_DCB(x) ((((x) & 0xf0) >> 4) * 10 + ((x) & 0x0f))
|
||||
#define RTC_BCDINC(x,y) RTC_BCD(RTC_DCB(x) + y)
|
||||
#define RTC_BCD(x) (((x) % 10) | (((x) / 10) << 4))
|
||||
#define RTC_DCB(x) ((((x) &0xf0) >> 4) * 10 + ((x) &0x0f))
|
||||
#define RTC_BCDINC(x, y) RTC_BCD(RTC_DCB(x) + y)
|
||||
|
||||
/* Time sync options */
|
||||
#define TIME_SYNC_DISABLED 0
|
||||
#define TIME_SYNC_ENABLED 1
|
||||
#define TIME_SYNC_UTC 2
|
||||
|
||||
#define TIME_SYNC_DISABLED 0
|
||||
#define TIME_SYNC_ENABLED 1
|
||||
#define TIME_SYNC_UTC 2
|
||||
|
||||
/* Define a generic RTC/NVRAM device. */
|
||||
typedef struct _nvr_ {
|
||||
char *fn; /* pathname of image file */
|
||||
uint16_t size; /* device configuration */
|
||||
int8_t irq, is_new;
|
||||
char *fn; /* pathname of image file */
|
||||
uint16_t size; /* device configuration */
|
||||
int8_t irq, is_new;
|
||||
|
||||
uint8_t onesec_cnt;
|
||||
pc_timer_t onesec_time;
|
||||
uint8_t onesec_cnt;
|
||||
pc_timer_t onesec_time;
|
||||
|
||||
void *data; /* local data */
|
||||
void *data; /* local data */
|
||||
|
||||
/* Hooks to device functions. */
|
||||
void (*reset)(struct _nvr_ *);
|
||||
void (*start)(struct _nvr_ *);
|
||||
void (*tick)(struct _nvr_ *);
|
||||
void (*ven_save)(void);
|
||||
void (*reset)(struct _nvr_ *);
|
||||
void (*start)(struct _nvr_ *);
|
||||
void (*tick)(struct _nvr_ *);
|
||||
void (*ven_save)(void);
|
||||
|
||||
uint8_t regs[NVR_MAXSIZE]; /* these are the registers */
|
||||
uint8_t regs[NVR_MAXSIZE]; /* these are the registers */
|
||||
} nvr_t;
|
||||
|
||||
|
||||
extern int nvr_dosave;
|
||||
extern int nvr_dosave;
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t at_nvr_old_device;
|
||||
extern const device_t at_nvr_device;
|
||||
@@ -102,32 +99,30 @@ extern const device_t via_nvr_device;
|
||||
extern const device_t p6rp4_nvr_device;
|
||||
#endif
|
||||
|
||||
extern void rtc_tick(void);
|
||||
|
||||
extern void rtc_tick(void);
|
||||
extern void nvr_init(nvr_t *);
|
||||
extern char *nvr_path(char *str);
|
||||
extern FILE *nvr_fopen(char *str, char *mode);
|
||||
extern int nvr_load(void);
|
||||
extern void nvr_close(void);
|
||||
extern void nvr_set_ven_save(void (*ven_save)(void));
|
||||
extern int nvr_save(void);
|
||||
|
||||
extern void nvr_init(nvr_t *);
|
||||
extern char *nvr_path(char *str);
|
||||
extern FILE *nvr_fopen(char *str, char *mode);
|
||||
extern int nvr_load(void);
|
||||
extern void nvr_close(void);
|
||||
extern void nvr_set_ven_save(void (*ven_save)(void));
|
||||
extern int nvr_save(void);
|
||||
extern int nvr_is_leap(int year);
|
||||
extern int nvr_get_days(int month, int year);
|
||||
extern void nvr_time_sync();
|
||||
extern void nvr_time_get(struct tm *);
|
||||
extern void nvr_time_set(struct tm *);
|
||||
|
||||
extern int nvr_is_leap(int year);
|
||||
extern int nvr_get_days(int month, int year);
|
||||
extern void nvr_time_sync();
|
||||
extern void nvr_time_get(struct tm *);
|
||||
extern void nvr_time_set(struct tm *);
|
||||
extern void nvr_reg_write(uint16_t reg, uint8_t val, void *priv);
|
||||
extern void nvr_at_handler(int set, uint16_t base, nvr_t *nvr);
|
||||
extern void nvr_at_sec_handler(int set, uint16_t base, nvr_t *nvr);
|
||||
extern void nvr_read_addr_set(int set, nvr_t *nvr);
|
||||
extern void nvr_wp_set(int set, int h, nvr_t *nvr);
|
||||
extern void nvr_via_wp_set(int set, int reg, nvr_t *nvr);
|
||||
extern void nvr_bank_set(int base, uint8_t bank, nvr_t *nvr);
|
||||
extern void nvr_lock_set(int base, int size, int lock, nvr_t *nvr);
|
||||
extern void nvr_irq_set(int irq, nvr_t *nvr);
|
||||
|
||||
extern void nvr_reg_write(uint16_t reg, uint8_t val, void *priv);
|
||||
extern void nvr_at_handler(int set, uint16_t base, nvr_t *nvr);
|
||||
extern void nvr_at_sec_handler(int set, uint16_t base, nvr_t *nvr);
|
||||
extern void nvr_read_addr_set(int set, nvr_t *nvr);
|
||||
extern void nvr_wp_set(int set, int h, nvr_t *nvr);
|
||||
extern void nvr_via_wp_set(int set, int reg, nvr_t *nvr);
|
||||
extern void nvr_bank_set(int base, uint8_t bank, nvr_t *nvr);
|
||||
extern void nvr_lock_set(int base, int size, int lock, nvr_t *nvr);
|
||||
extern void nvr_irq_set(int irq, nvr_t *nvr);
|
||||
|
||||
|
||||
#endif /*EMU_NVR_H*/
|
||||
#endif /*EMU_NVR_H*/
|
||||
|
||||
@@ -36,10 +36,9 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_NVRPS2_H
|
||||
# define EMU_NVRPS2_H
|
||||
#define EMU_NVRPS2_H
|
||||
|
||||
extern const device_t ps2_nvr_device;
|
||||
extern const device_t ps2_nvr_55ls_device;
|
||||
|
||||
extern const device_t ps2_nvr_device;
|
||||
|
||||
|
||||
#endif /*EMU_NVRPS2_H*/
|
||||
#endif /*EMU_NVRPS2_H*/
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
extern void path_get_dirname(char *dest, const char *path);
|
||||
extern char *path_get_filename(char *s);
|
||||
extern char *path_get_extension(char *s);
|
||||
extern void path_append_filename(char *dest, const char *s1, const char *s2);
|
||||
extern void path_slash(char *path);
|
||||
extern void path_normalize(char *path);
|
||||
extern int path_abs(char *path);
|
||||
extern void path_get_dirname(char *dest, const char *path);
|
||||
extern char *path_get_filename(char *s);
|
||||
extern char *path_get_extension(char *s);
|
||||
extern void path_append_filename(char *dest, const char *s1, const char *s2);
|
||||
extern void path_slash(char *path);
|
||||
extern void path_normalize(char *path);
|
||||
extern int path_abs(char *path);
|
||||
@@ -20,45 +20,48 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_PCI_H
|
||||
# define EMU_PCI_H
|
||||
#define EMU_PCI_H
|
||||
|
||||
#define PCI_REG_COMMAND 0x04
|
||||
#define PCI_REG_COMMAND 0x04
|
||||
|
||||
#define PCI_COMMAND_IO 0x01
|
||||
#define PCI_COMMAND_MEM 0x02
|
||||
#define PCI_COMMAND_IO 0x01
|
||||
#define PCI_COMMAND_MEM 0x02
|
||||
|
||||
#define PCI_NO_IRQ_STEERING 0x8000
|
||||
#define PCI_CAN_SWITCH_TYPE 0x10000
|
||||
#define PCI_NO_BRIDGES 0x20000
|
||||
#define PCI_NO_IRQ_STEERING 0x8000
|
||||
#define PCI_CAN_SWITCH_TYPE 0x10000
|
||||
#define PCI_NO_BRIDGES 0x20000
|
||||
|
||||
#define PCI_CONFIG_TYPE_1 1
|
||||
#define PCI_CONFIG_TYPE_2 2
|
||||
#define PCI_CONFIG_TYPE_1 1
|
||||
#define PCI_CONFIG_TYPE_2 2
|
||||
|
||||
#define PCI_CONFIG_TYPE_MASK 0x7fff
|
||||
|
||||
#define PCI_INTA 1
|
||||
#define PCI_INTB 2
|
||||
#define PCI_INTC 3
|
||||
#define PCI_INTD 4
|
||||
#define PCI_INTA 1
|
||||
#define PCI_INTB 2
|
||||
#define PCI_INTC 3
|
||||
#define PCI_INTD 4
|
||||
|
||||
#define PCI_MIRQ0 0
|
||||
#define PCI_MIRQ1 1
|
||||
#define PCI_MIRQ2 2
|
||||
#define PCI_MIRQ3 3
|
||||
#define PCI_MIRQ4 4
|
||||
#define PCI_MIRQ5 5
|
||||
#define PCI_MIRQ6 6
|
||||
#define PCI_MIRQ7 7
|
||||
#define PCI_MIRQ0 0
|
||||
#define PCI_MIRQ1 1
|
||||
#define PCI_MIRQ2 2
|
||||
#define PCI_MIRQ3 3
|
||||
#define PCI_MIRQ4 4
|
||||
#define PCI_MIRQ5 5
|
||||
#define PCI_MIRQ6 6
|
||||
#define PCI_MIRQ7 7
|
||||
|
||||
#define PCI_IRQ_DISABLED -1
|
||||
#define PCI_IRQ_DISABLED -1
|
||||
|
||||
#define PCI_ADD_STRICT 0x80
|
||||
#define PCI_ADD_STRICT 0x80
|
||||
|
||||
enum {
|
||||
PCI_CARD_NORTHBRIDGE = 0,
|
||||
PCI_CARD_AGPBRIDGE,
|
||||
PCI_CARD_SOUTHBRIDGE,
|
||||
PCI_CARD_AGP = 0x0f,
|
||||
PCI_CARD_SOUTHBRIDGE_IDE,
|
||||
PCI_CARD_SOUTHBRIDGE_PMU,
|
||||
PCI_CARD_SOUTHBRIDGE_USB,
|
||||
PCI_CARD_AGP = 0x0f,
|
||||
PCI_CARD_NORMAL = 0x10,
|
||||
PCI_CARD_VIDEO,
|
||||
PCI_CARD_SCSI,
|
||||
@@ -72,7 +75,10 @@ enum {
|
||||
PCI_ADD_NORTHBRIDGE = 0,
|
||||
PCI_ADD_AGPBRIDGE,
|
||||
PCI_ADD_SOUTHBRIDGE,
|
||||
PCI_ADD_AGP = 0x0f,
|
||||
PCI_ADD_SOUTHBRIDGE_IDE,
|
||||
PCI_ADD_SOUTHBRIDGE_PMU,
|
||||
PCI_ADD_SOUTHBRIDGE_USB,
|
||||
PCI_ADD_AGP = 0x0f,
|
||||
PCI_ADD_NORMAL = 0x10,
|
||||
PCI_ADD_VIDEO,
|
||||
PCI_ADD_SCSI,
|
||||
@@ -84,49 +90,47 @@ enum {
|
||||
|
||||
typedef union {
|
||||
uint32_t addr;
|
||||
uint8_t addr_regs[4];
|
||||
uint8_t addr_regs[4];
|
||||
} bar_t;
|
||||
|
||||
extern int pci_burst_time, agp_burst_time,
|
||||
pci_nonburst_time, agp_nonburst_time;
|
||||
|
||||
extern int pci_burst_time, agp_burst_time,
|
||||
pci_nonburst_time, agp_nonburst_time;
|
||||
extern void pci_set_irq_routing(int pci_int, int irq);
|
||||
extern void pci_set_irq_level(int pci_int, int level);
|
||||
|
||||
extern void pci_enable_mirq(int mirq);
|
||||
extern void pci_set_mirq_routing(int mirq, int irq);
|
||||
|
||||
extern void pci_set_irq_routing(int pci_int, int irq);
|
||||
extern void pci_set_irq_level(int pci_int, int level);
|
||||
extern int pci_irq_is_level(int irq);
|
||||
|
||||
extern void pci_enable_mirq(int mirq);
|
||||
extern void pci_set_mirq_routing(int mirq, int irq);
|
||||
extern void pci_set_mirq(uint8_t mirq, int level);
|
||||
extern void pci_set_irq(uint8_t card, uint8_t pci_int);
|
||||
extern void pci_clear_mirq(uint8_t mirq, int level);
|
||||
extern void pci_clear_irq(uint8_t card, uint8_t pci_int);
|
||||
extern uint8_t pci_get_int(uint8_t card, uint8_t pci_int);
|
||||
|
||||
extern int pci_irq_is_level(int irq);
|
||||
extern void pci_reset(void);
|
||||
extern void pci_init(int type);
|
||||
extern uint8_t pci_register_bus();
|
||||
extern void pci_set_pmc(uint8_t pmc);
|
||||
extern void pci_remap_bus(uint8_t bus_index, uint8_t bus_number);
|
||||
extern void pci_relocate_slot(int type, int new_slot);
|
||||
extern void pci_register_slot(int card, int type,
|
||||
int inta, int intb, int intc, int intd);
|
||||
extern void pci_register_bus_slot(int bus, int card, int type,
|
||||
int inta, int intb, int intc, int intd);
|
||||
extern void pci_close(void);
|
||||
extern uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv);
|
||||
|
||||
extern void pci_set_mirq(uint8_t mirq, int level);
|
||||
extern void pci_set_irq(uint8_t card, uint8_t pci_int);
|
||||
extern void pci_clear_mirq(uint8_t mirq, int level);
|
||||
extern void pci_clear_irq(uint8_t card, uint8_t pci_int);
|
||||
extern uint8_t pci_get_int(uint8_t card, uint8_t pci_int);
|
||||
extern void trc_init(void);
|
||||
|
||||
extern void pci_reset(void);
|
||||
extern void pci_init(int type);
|
||||
extern uint8_t pci_register_bus();
|
||||
extern void pci_set_pmc(uint8_t pmc);
|
||||
extern void pci_remap_bus(uint8_t bus_index, uint8_t bus_number);
|
||||
extern void pci_register_slot(int card, int type,
|
||||
int inta, int intb, int intc, int intd);
|
||||
extern void pci_register_bus_slot(int bus, int card, int type,
|
||||
int inta, int intb, int intc, int intd);
|
||||
extern void pci_close(void);
|
||||
extern uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv);
|
||||
extern uint8_t trc_read(uint16_t port, void *priv);
|
||||
extern void trc_write(uint16_t port, uint8_t val, void *priv);
|
||||
|
||||
extern void trc_init(void);
|
||||
|
||||
extern uint8_t trc_read(uint16_t port, void *priv);
|
||||
extern void trc_write(uint16_t port, uint8_t val, void *priv);
|
||||
|
||||
extern void pci_bridge_set_ctl(void *priv, uint8_t ctl);
|
||||
|
||||
extern void pci_pic_reset(void);
|
||||
extern void pci_bridge_set_ctl(void *priv, uint8_t ctl);
|
||||
|
||||
extern void pci_pic_reset(void);
|
||||
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t dec21150_device;
|
||||
@@ -142,5 +146,4 @@ extern const device_t via_apro_agp_device;
|
||||
extern const device_t via_vt8601_agp_device;
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_PCI_H*/
|
||||
#endif /*EMU_PCI_H*/
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
#ifndef EMU_PCI_DUMMY_H
|
||||
# define EMU_PCI_DUMMY_H
|
||||
#define EMU_PCI_DUMMY_H
|
||||
|
||||
extern void pci_dummy_init(void);
|
||||
|
||||
|
||||
@@ -17,49 +17,46 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_PIC_H
|
||||
# define EMU_PIC_H
|
||||
#define EMU_PIC_H
|
||||
|
||||
typedef struct pic {
|
||||
uint8_t icw1, icw2, icw3, icw4,
|
||||
imr, isr, irr, ocw2,
|
||||
ocw3, int_pending, is_master, elcr,
|
||||
state, ack_bytes, priority, special_mask_mode,
|
||||
auto_eoi_rotate, interrupt, lines, data_bus;
|
||||
uint32_t at;
|
||||
struct pic *slaves[8];
|
||||
uint8_t icw1, icw2, icw3, icw4,
|
||||
imr, isr, irr, ocw2,
|
||||
ocw3, int_pending, is_master, elcr,
|
||||
state, ack_bytes, priority, special_mask_mode,
|
||||
auto_eoi_rotate, interrupt, lines, data_bus;
|
||||
uint32_t at;
|
||||
struct pic *slaves[8];
|
||||
} pic_t;
|
||||
|
||||
extern pic_t pic, pic2;
|
||||
|
||||
extern pic_t pic, pic2;
|
||||
extern void pic_reset_smi_irq_mask(void);
|
||||
extern void pic_set_smi_irq_mask(int irq, int set);
|
||||
extern uint16_t pic_get_smi_irq_status(void);
|
||||
extern void pic_clear_smi_irq_status(int irq);
|
||||
|
||||
extern int pic_elcr_get_enabled(void);
|
||||
extern void pic_elcr_set_enabled(int enabled);
|
||||
extern void pic_elcr_io_handler(int set);
|
||||
extern void pic_elcr_write(uint16_t port, uint8_t val, void *priv);
|
||||
extern uint8_t pic_elcr_read(uint16_t port, void *priv);
|
||||
|
||||
extern void pic_reset_smi_irq_mask(void);
|
||||
extern void pic_set_smi_irq_mask(int irq, int set);
|
||||
extern uint16_t pic_get_smi_irq_status(void);
|
||||
extern void pic_clear_smi_irq_status(int irq);
|
||||
extern void pic_set_shadow(int sh);
|
||||
extern void pic_set_pci_flag(int pci);
|
||||
extern void pic_set_pci(void);
|
||||
extern void pic_init(void);
|
||||
extern void pic_init_pcjr(void);
|
||||
extern void pic2_init(void);
|
||||
extern void pic_reset(void);
|
||||
|
||||
extern int pic_elcr_get_enabled(void);
|
||||
extern void pic_elcr_set_enabled(int enabled);
|
||||
extern void pic_elcr_io_handler(int set);
|
||||
extern void pic_elcr_write(uint16_t port, uint8_t val, void *priv);
|
||||
extern uint8_t pic_elcr_read(uint16_t port, void *priv);
|
||||
extern int picint_is_level(int irq);
|
||||
extern void picint_common(uint16_t num, int level, int set);
|
||||
extern void picint(uint16_t num);
|
||||
extern void picintlevel(uint16_t num);
|
||||
extern void picintc(uint16_t num);
|
||||
extern int picinterrupt(void);
|
||||
|
||||
extern void pic_set_shadow(int sh);
|
||||
extern void pic_set_pci_flag(int pci);
|
||||
extern void pic_set_pci(void);
|
||||
extern void pic_init(void);
|
||||
extern void pic_init_pcjr(void);
|
||||
extern void pic2_init(void);
|
||||
extern void pic_reset(void);
|
||||
extern uint8_t pic_irq_ack(void);
|
||||
|
||||
extern int picint_is_level(int irq);
|
||||
extern void picint_common(uint16_t num, int level, int set);
|
||||
extern void picint(uint16_t num);
|
||||
extern void picintlevel(uint16_t num);
|
||||
extern void picintc(uint16_t num);
|
||||
extern int picinterrupt(void);
|
||||
|
||||
extern uint8_t pic_irq_ack(void);
|
||||
|
||||
|
||||
#endif /*EMU_PIC_H*/
|
||||
#endif /*EMU_PIC_H*/
|
||||
|
||||
@@ -16,104 +16,110 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_PIT_H
|
||||
# define EMU_PIT_H
|
||||
|
||||
#define EMU_PIT_H
|
||||
|
||||
typedef struct {
|
||||
uint8_t m, ctrl,
|
||||
read_status, latch,
|
||||
s1_det, l_det,
|
||||
bcd, pad;
|
||||
uint8_t m, ctrl,
|
||||
read_status, latch,
|
||||
s1_det, l_det,
|
||||
bcd, pad;
|
||||
|
||||
uint16_t rl;
|
||||
uint16_t rl;
|
||||
|
||||
int rm, wm, gate, out,
|
||||
newcount, clock, using_timer, latched,
|
||||
state, null_count, do_read_status;
|
||||
int rm, wm, gate, out,
|
||||
newcount, clock, using_timer, latched,
|
||||
state, null_count, do_read_status;
|
||||
|
||||
union {
|
||||
int count;
|
||||
struct {
|
||||
int units :4;
|
||||
int tens :4;
|
||||
int hundreds :4;
|
||||
int thousands :4;
|
||||
int myriads :4;
|
||||
};
|
||||
int count;
|
||||
struct {
|
||||
int units : 4;
|
||||
int tens : 4;
|
||||
int hundreds : 4;
|
||||
int thousands : 4;
|
||||
int myriads : 4;
|
||||
};
|
||||
};
|
||||
|
||||
uint32_t l;
|
||||
uint32_t l;
|
||||
|
||||
void (*load_func)(uint8_t new_m, int new_count);
|
||||
void (*out_func)(int new_out, int old_out);
|
||||
void (*load_func)(uint8_t new_m, int new_count);
|
||||
void (*out_func)(int new_out, int old_out);
|
||||
} ctr_t;
|
||||
|
||||
|
||||
typedef struct PIT {
|
||||
int flags, clock;
|
||||
pc_timer_t callback_timer;
|
||||
int flags, clock;
|
||||
pc_timer_t callback_timer;
|
||||
|
||||
ctr_t counters[3];
|
||||
ctr_t counters[3];
|
||||
|
||||
uint8_t ctrl;
|
||||
uint8_t ctrl;
|
||||
} pit_t;
|
||||
|
||||
enum {
|
||||
PIT_8253 = 0,
|
||||
PIT_8254,
|
||||
PIT_8253_FAST,
|
||||
PIT_8254_FAST
|
||||
};
|
||||
|
||||
extern pit_t *pit,
|
||||
*pit2;
|
||||
typedef struct {
|
||||
uint8_t (*read)(uint16_t addr, void *priv);
|
||||
void (*write)(uint16_t addr, uint8_t val, void *priv);
|
||||
/* Gets a counter's count. */
|
||||
uint16_t (*get_count)(void *data, int counter_id);
|
||||
/* Sets a counter's GATE input. */
|
||||
void (*set_gate)(void *data, int counter_id, int gate);
|
||||
/* Sets if a counter's CLOCK input is from the timer or not - used by PCjr. */
|
||||
void (*set_using_timer)(void *data, int counter_id, int using_timer);
|
||||
/* Sets a counter's OUT output handler. */
|
||||
void (*set_out_func)(void *data, int counter_id, void (*func)(int new_out, int old_out));
|
||||
/* Sets a counter's load count handler. */
|
||||
void (*set_load_func)(void *data, int counter_id, void (*func)(uint8_t new_m, int new_count));
|
||||
void (*ctr_clock)(void *data, int counter_id);
|
||||
void *data;
|
||||
} pit_intf_t;
|
||||
|
||||
extern double SYSCLK, PCICLK, AGPCLK;
|
||||
extern pit_intf_t pit_devs[2];
|
||||
extern const pit_intf_t pit_classic_intf;
|
||||
|
||||
extern uint64_t PITCONST, ISACONST,
|
||||
CGACONST,
|
||||
MDACONST,
|
||||
HERCCONST,
|
||||
VGACONST1,
|
||||
VGACONST2,
|
||||
RTCCONST, ACPICONST;
|
||||
extern double SYSCLK, PCICLK, AGPCLK;
|
||||
|
||||
extern int refresh_at_enable;
|
||||
extern uint64_t PITCONST, ISACONST,
|
||||
CGACONST,
|
||||
MDACONST,
|
||||
HERCCONST,
|
||||
VGACONST1,
|
||||
VGACONST2,
|
||||
RTCCONST;
|
||||
|
||||
extern int refresh_at_enable;
|
||||
|
||||
/* Gets a counter's count. */
|
||||
extern uint16_t pit_ctr_get_count(ctr_t *ctr);
|
||||
/* Sets a counter's load count handler. */
|
||||
extern void pit_ctr_set_load_func(ctr_t *ctr, void (*func)(uint8_t new_m, int new_count));
|
||||
/* Sets a counter's OUT output handler. */
|
||||
extern void pit_ctr_set_out_func(ctr_t *ctr, void (*func)(int new_out, int old_out));
|
||||
/* Sets a counter's GATE input. */
|
||||
extern void pit_ctr_set_gate(ctr_t *ctr, int gate);
|
||||
/* Sets a counter's CLOCK input. */
|
||||
extern void pit_ctr_set_clock(ctr_t *ctr, int clock);
|
||||
/* Sets if a counter's CLOCK input is from the timer or not - used by PCjr. */
|
||||
extern void pit_ctr_set_using_timer(ctr_t *ctr, int using_timer);
|
||||
extern void pit_ctr_set_clock(ctr_t *ctr, int clock);
|
||||
|
||||
extern pit_t * pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(int new_out, int old_out));
|
||||
extern pit_t * pit_ps2_init(void);
|
||||
extern void pit_reset(pit_t *dev);
|
||||
extern pit_t *pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(int new_out, int old_out));
|
||||
extern pit_t *pit_ps2_init(int type);
|
||||
extern void pit_reset(pit_t *dev);
|
||||
|
||||
extern void pit_irq0_timer(int new_out, int old_out);
|
||||
extern void pit_irq0_timer_pcjr(int new_out, int old_out);
|
||||
extern void pit_irq0_timer_ps2(int new_out, int old_out);
|
||||
extern void pit_irq0_timer_ps2(int new_out, int old_out);
|
||||
|
||||
extern void pit_refresh_timer_xt(int new_out, int old_out);
|
||||
extern void pit_refresh_timer_at(int new_out, int old_out);
|
||||
extern void pit_refresh_timer_xt(int new_out, int old_out);
|
||||
extern void pit_refresh_timer_at(int new_out, int old_out);
|
||||
|
||||
extern void pit_speaker_timer(int new_out, int old_out);
|
||||
extern void pit_speaker_timer(int new_out, int old_out);
|
||||
|
||||
extern void pit_nmi_timer_ps2(int new_out, int old_out);
|
||||
|
||||
extern void pit_set_clock(int clock);
|
||||
extern void pit_handler(int set, uint16_t base, int size, void *priv);
|
||||
extern void pit_nmi_timer_ps2(int new_out, int old_out);
|
||||
|
||||
extern void pit_set_clock(int clock);
|
||||
extern void pit_handler(int set, uint16_t base, int size, void *priv);
|
||||
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t i8253_device;
|
||||
extern const device_t i8254_device;
|
||||
extern const device_t i8254_sec_device;
|
||||
extern const device_t i8254_ext_io_device;
|
||||
extern const device_t i8254_ps2_device;
|
||||
extern const device_t i8253_device;
|
||||
extern const device_t i8254_device;
|
||||
extern const device_t i8254_sec_device;
|
||||
extern const device_t i8254_ext_io_device;
|
||||
extern const device_t i8254_ps2_device;
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_PIT_H*/
|
||||
#endif /*EMU_PIT_H*/
|
||||
|
||||
72
src/include/86box/pit_fast.h
Normal file
72
src/include/86box/pit_fast.h
Normal file
@@ -0,0 +1,72 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* Header of the implementation of the Intel 8253/8254
|
||||
* Programmable Interval Timer.
|
||||
*
|
||||
*
|
||||
*
|
||||
* Author: Miran Grca, <mgrca8@gmail.com>
|
||||
* Copyright 2019,2020 Miran Grca.
|
||||
*/
|
||||
|
||||
#ifndef EMU_PIT_FAST_H
|
||||
#define EMU_PIT_FAST_H
|
||||
|
||||
typedef struct {
|
||||
uint8_t m, ctrl,
|
||||
read_status, latch, bcd;
|
||||
|
||||
uint16_t rl;
|
||||
|
||||
int rm, wm, gate, out,
|
||||
newcount, clock, using_timer, latched,
|
||||
do_read_status;
|
||||
int enabled;
|
||||
int disabled;
|
||||
int initial;
|
||||
int thit;
|
||||
int running;
|
||||
int rereadlatch;
|
||||
|
||||
union {
|
||||
int count;
|
||||
struct {
|
||||
int units : 4;
|
||||
int tens : 4;
|
||||
int hundreds : 4;
|
||||
int thousands : 4;
|
||||
int myriads : 4;
|
||||
};
|
||||
};
|
||||
|
||||
uint32_t l;
|
||||
pc_timer_t timer;
|
||||
|
||||
void (*load_func)(uint8_t new_m, int new_count);
|
||||
void (*out_func)(int new_out, int old_out);
|
||||
} ctrf_t;
|
||||
|
||||
typedef struct {
|
||||
int flags;
|
||||
ctrf_t counters[3];
|
||||
|
||||
uint8_t ctrl;
|
||||
} pitf_t;
|
||||
|
||||
extern const pit_intf_t pit_fast_intf;
|
||||
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t i8253_fast_device;
|
||||
extern const device_t i8254_fast_device;
|
||||
extern const device_t i8254_sec_fast_device;
|
||||
extern const device_t i8254_ext_io_fast_device;
|
||||
extern const device_t i8254_ps2_fast_device;
|
||||
#endif
|
||||
|
||||
#endif /*EMU_PIT_FAST_H*/
|
||||
@@ -19,14 +19,14 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_PLAT_H
|
||||
# define EMU_PLAT_H
|
||||
#define EMU_PLAT_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include "86box/device.h"
|
||||
#include "86box/machine.h"
|
||||
#ifndef GLOBAL
|
||||
# define GLOBAL extern
|
||||
# define GLOBAL extern
|
||||
#endif
|
||||
|
||||
/* String ID numbers. */
|
||||
@@ -34,140 +34,137 @@
|
||||
|
||||
/* The Win32 API uses _wcsicmp. */
|
||||
#ifdef _WIN32
|
||||
# define wcscasecmp _wcsicmp
|
||||
# define strcasecmp _stricmp
|
||||
# define wcscasecmp _wcsicmp
|
||||
# define strcasecmp _stricmp
|
||||
#else
|
||||
/* Declare these functions to avoid warnings. They will redirect to strcasecmp and strncasecmp respectively. */
|
||||
extern int stricmp(const char* s1, const char* s2);
|
||||
extern int strnicmp(const char* s1, const char* s2, size_t n);
|
||||
extern int stricmp(const char *s1, const char *s2);
|
||||
extern int strnicmp(const char *s1, const char *s2, size_t n);
|
||||
#endif
|
||||
|
||||
#if (defined(__HAIKU__) || defined(__unix__) || defined(__APPLE__)) && !defined(__linux__)
|
||||
/* FreeBSD has largefile by default. */
|
||||
# define fopen64 fopen
|
||||
# define fseeko64 fseeko
|
||||
# define ftello64 ftello
|
||||
# define off64_t off_t
|
||||
# define fopen64 fopen
|
||||
# define fseeko64 fseeko
|
||||
# define ftello64 ftello
|
||||
# define off64_t off_t
|
||||
#elif defined(_MSC_VER)
|
||||
//# define fopen64 fopen
|
||||
# define fseeko64 _fseeki64
|
||||
# define ftello64 _ftelli64
|
||||
# define off64_t off_t
|
||||
# define fseeko64 _fseeki64
|
||||
# define ftello64 _ftelli64
|
||||
# define off64_t off_t
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef _MSC_VER
|
||||
# define UNUSED(arg) arg
|
||||
# define UNUSED(arg) arg
|
||||
#else
|
||||
/* A hack (GCC-specific?) to allow us to ignore unused parameters. */
|
||||
# define UNUSED(arg) __attribute__((unused))arg
|
||||
/* A hack (GCC-specific?) to allow us to ignore unused parameters. */
|
||||
# define UNUSED(arg) __attribute__((unused)) arg
|
||||
#endif
|
||||
|
||||
/* Return the size (in wchar's) of a wchar_t array. */
|
||||
#define sizeof_w(x) (sizeof((x)) / sizeof(wchar_t))
|
||||
|
||||
#define sizeof_w(x) (sizeof((x)) / sizeof(wchar_t))
|
||||
|
||||
#ifdef __cplusplus
|
||||
#include <atomic>
|
||||
#define atomic_flag_t std::atomic_flag
|
||||
# include <atomic>
|
||||
# define atomic_flag_t std::atomic_flag
|
||||
# define atomic_bool_t std::atomic_bool
|
||||
extern "C" {
|
||||
#else
|
||||
#include <stdatomic.h>
|
||||
#define atomic_flag_t atomic_flag
|
||||
# include <stdatomic.h>
|
||||
# define atomic_flag_t atomic_flag
|
||||
# define atomic_bool_t atomic_bool
|
||||
#endif
|
||||
|
||||
/* Global variables residing in the platform module. */
|
||||
extern int dopause, /* system is paused */
|
||||
mouse_capture; /* mouse is captured in app */
|
||||
extern volatile int is_quit; /* system exit requested */
|
||||
extern int dopause, /* system is paused */
|
||||
mouse_capture; /* mouse is captured in app */
|
||||
extern volatile int is_quit; /* system exit requested */
|
||||
|
||||
#ifdef MTR_ENABLED
|
||||
extern int tracing_on;
|
||||
#endif
|
||||
|
||||
extern uint64_t timer_freq;
|
||||
extern int infocus;
|
||||
extern char emu_version[200]; /* version ID string */
|
||||
extern int rctrl_is_lalt;
|
||||
extern int update_icons;
|
||||
extern uint64_t timer_freq;
|
||||
extern int infocus;
|
||||
extern char emu_version[200]; /* version ID string */
|
||||
extern int rctrl_is_lalt;
|
||||
extern int update_icons;
|
||||
|
||||
extern int kbd_req_capture, hide_status_bar, hide_tool_bar;
|
||||
extern int kbd_req_capture, hide_status_bar, hide_tool_bar;
|
||||
|
||||
/* System-related functions. */
|
||||
extern char *fix_exe_path(char *str);
|
||||
extern FILE *plat_fopen(const char *path, const char *mode);
|
||||
extern FILE *plat_fopen64(const char *path, const char *mode);
|
||||
extern void plat_remove(char *path);
|
||||
extern int plat_getcwd(char *bufp, int max);
|
||||
extern int plat_chdir(char *path);
|
||||
extern void plat_tempfile(char *bufp, char *prefix, char *suffix);
|
||||
extern void plat_get_exe_name(char *s, int size);
|
||||
extern void plat_init_rom_paths();
|
||||
extern int plat_dir_check(char *path);
|
||||
extern int plat_dir_create(char *path);
|
||||
extern void *plat_mmap(size_t size, uint8_t executable);
|
||||
extern void plat_munmap(void *ptr, size_t size);
|
||||
extern uint64_t plat_timer_read(void);
|
||||
extern uint32_t plat_get_ticks(void);
|
||||
extern uint32_t plat_get_micro_ticks(void);
|
||||
extern void plat_delay_ms(uint32_t count);
|
||||
extern void plat_pause(int p);
|
||||
extern void plat_mouse_capture(int on);
|
||||
extern int plat_vidapi(char *name);
|
||||
extern char *plat_vidapi_name(int api);
|
||||
extern int plat_setvid(int api);
|
||||
extern void plat_vidsize(int x, int y);
|
||||
extern void plat_setfullscreen(int on);
|
||||
extern void plat_resize_monitor(int x, int y, int monitor_index);
|
||||
extern void plat_resize_request(int x, int y, int monitor_index);
|
||||
extern char *fix_exe_path(char *str);
|
||||
extern FILE *plat_fopen(const char *path, const char *mode);
|
||||
extern FILE *plat_fopen64(const char *path, const char *mode);
|
||||
extern void plat_remove(char *path);
|
||||
extern int plat_getcwd(char *bufp, int max);
|
||||
extern int plat_chdir(char *path);
|
||||
extern void plat_tempfile(char *bufp, char *prefix, char *suffix);
|
||||
extern void plat_get_exe_name(char *s, int size);
|
||||
extern void plat_init_rom_paths();
|
||||
extern int plat_dir_check(char *path);
|
||||
extern int plat_dir_create(char *path);
|
||||
extern void *plat_mmap(size_t size, uint8_t executable);
|
||||
extern void plat_munmap(void *ptr, size_t size);
|
||||
extern uint64_t plat_timer_read(void);
|
||||
extern uint32_t plat_get_ticks(void);
|
||||
extern uint32_t plat_get_micro_ticks(void);
|
||||
extern void plat_delay_ms(uint32_t count);
|
||||
extern void plat_pause(int p);
|
||||
extern void plat_mouse_capture(int on);
|
||||
extern int plat_vidapi(char *name);
|
||||
extern char *plat_vidapi_name(int api);
|
||||
extern int plat_setvid(int api);
|
||||
extern void plat_vidsize(int x, int y);
|
||||
extern void plat_setfullscreen(int on);
|
||||
extern void plat_resize_monitor(int x, int y, int monitor_index);
|
||||
extern void plat_resize_request(int x, int y, int monitor_index);
|
||||
extern void plat_resize(int x, int y);
|
||||
extern void plat_vidapi_enable(int enabled);
|
||||
extern void plat_vidapi_reload(void);
|
||||
extern void plat_vid_reload_options(void);
|
||||
extern uint32_t plat_language_code(char* langcode);
|
||||
extern void plat_language_code_r(uint32_t lcid, char* outbuf, int len);
|
||||
extern void plat_vidapi_enable(int enabled);
|
||||
extern void plat_vidapi_reload(void);
|
||||
extern void plat_vid_reload_options(void);
|
||||
extern uint32_t plat_language_code(char *langcode);
|
||||
extern void plat_language_code_r(uint32_t lcid, char *outbuf, int len);
|
||||
|
||||
/* Resource management. */
|
||||
extern void set_language(uint32_t id);
|
||||
extern wchar_t *plat_get_string(int id);
|
||||
|
||||
extern void set_language(uint32_t id);
|
||||
extern wchar_t *plat_get_string(int id);
|
||||
|
||||
/* Emulator start/stop support functions. */
|
||||
extern void do_start(void);
|
||||
extern void do_stop(void);
|
||||
|
||||
extern void do_start(void);
|
||||
extern void do_stop(void);
|
||||
|
||||
/* Power off. */
|
||||
extern void plat_power_off(void);
|
||||
|
||||
extern void plat_power_off(void);
|
||||
|
||||
/* Platform-specific device support. */
|
||||
extern void cassette_mount(char *fn, uint8_t wp);
|
||||
extern void cassette_eject(void);
|
||||
extern void cartridge_mount(uint8_t id, char *fn, uint8_t wp);
|
||||
extern void cartridge_eject(uint8_t id);
|
||||
extern void floppy_mount(uint8_t id, char *fn, uint8_t wp);
|
||||
extern void floppy_eject(uint8_t id);
|
||||
extern void cdrom_mount(uint8_t id, char *fn);
|
||||
extern void plat_cdrom_ui_update(uint8_t id, uint8_t reload);
|
||||
extern void zip_eject(uint8_t id);
|
||||
extern void zip_mount(uint8_t id, char *fn, uint8_t wp);
|
||||
extern void zip_reload(uint8_t id);
|
||||
extern void mo_eject(uint8_t id);
|
||||
extern void mo_mount(uint8_t id, char *fn, uint8_t wp);
|
||||
extern void mo_reload(uint8_t id);
|
||||
extern int ioctl_open(uint8_t id, char d);
|
||||
extern void ioctl_reset(uint8_t id);
|
||||
extern void ioctl_close(uint8_t id);
|
||||
extern void cassette_mount(char *fn, uint8_t wp);
|
||||
extern void cassette_eject(void);
|
||||
extern void cartridge_mount(uint8_t id, char *fn, uint8_t wp);
|
||||
extern void cartridge_eject(uint8_t id);
|
||||
extern void floppy_mount(uint8_t id, char *fn, uint8_t wp);
|
||||
extern void floppy_eject(uint8_t id);
|
||||
extern void cdrom_mount(uint8_t id, char *fn);
|
||||
extern void plat_cdrom_ui_update(uint8_t id, uint8_t reload);
|
||||
extern void zip_eject(uint8_t id);
|
||||
extern void zip_mount(uint8_t id, char *fn, uint8_t wp);
|
||||
extern void zip_reload(uint8_t id);
|
||||
extern void mo_eject(uint8_t id);
|
||||
extern void mo_mount(uint8_t id, char *fn, uint8_t wp);
|
||||
extern void mo_reload(uint8_t id);
|
||||
extern int ioctl_open(uint8_t id, char d);
|
||||
extern void ioctl_reset(uint8_t id);
|
||||
extern void ioctl_close(uint8_t id);
|
||||
|
||||
/* Other stuff. */
|
||||
extern void startblit(void);
|
||||
extern void endblit(void);
|
||||
extern void take_screenshot(void);
|
||||
extern void startblit(void);
|
||||
extern void endblit(void);
|
||||
extern void take_screenshot(void);
|
||||
|
||||
/* Conversion between UTF-8 and UTF-16. */
|
||||
extern size_t mbstoc16s(uint16_t dst[], const char src[], int len);
|
||||
extern size_t c16stombs(char dst[], const uint16_t src[], int len);
|
||||
extern size_t mbstoc16s(uint16_t dst[], const char src[], int len);
|
||||
extern size_t c16stombs(char dst[], const uint16_t src[], int len);
|
||||
|
||||
#ifdef MTR_ENABLED
|
||||
extern void init_trace(void);
|
||||
@@ -178,5 +175,4 @@ extern void shutdown_trace(void);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_PLAT_H*/
|
||||
#endif /*EMU_PLAT_H*/
|
||||
|
||||
@@ -15,58 +15,53 @@
|
||||
*/
|
||||
|
||||
#ifndef PLAT_DIR_H
|
||||
# define PLAT_DIR_H
|
||||
#define PLAT_DIR_H
|
||||
|
||||
#ifdef _MAX_FNAME
|
||||
# define MAXNAMLEN _MAX_FNAME
|
||||
# define MAXNAMLEN _MAX_FNAME
|
||||
#else
|
||||
# define MAXNAMLEN 15
|
||||
# define MAXNAMLEN 15
|
||||
#endif
|
||||
# define MAXDIRLEN 127
|
||||
|
||||
#define MAXDIRLEN 127
|
||||
|
||||
struct dirent {
|
||||
long d_ino;
|
||||
unsigned short d_reclen;
|
||||
unsigned short d_off;
|
||||
long d_ino;
|
||||
unsigned short d_reclen;
|
||||
unsigned short d_off;
|
||||
#ifdef UNICODE
|
||||
wchar_t d_name[MAXNAMLEN + 1];
|
||||
wchar_t d_name[MAXNAMLEN + 1];
|
||||
#else
|
||||
char d_name[MAXNAMLEN + 1];
|
||||
char d_name[MAXNAMLEN + 1];
|
||||
#endif
|
||||
};
|
||||
#define d_namlen d_reclen
|
||||
|
||||
#define d_namlen d_reclen
|
||||
|
||||
typedef struct {
|
||||
short flags; /* internal flags */
|
||||
short offset; /* offset of entry into dir */
|
||||
long handle; /* open handle to Win32 system */
|
||||
short sts; /* last known status code */
|
||||
char *dta; /* internal work data */
|
||||
short flags; /* internal flags */
|
||||
short offset; /* offset of entry into dir */
|
||||
long handle; /* open handle to Win32 system */
|
||||
short sts; /* last known status code */
|
||||
char *dta; /* internal work data */
|
||||
#ifdef UNICODE
|
||||
wchar_t dir[MAXDIRLEN+1]; /* open dir */
|
||||
wchar_t dir[MAXDIRLEN + 1]; /* open dir */
|
||||
#else
|
||||
char dir[MAXDIRLEN+1]; /* open dir */
|
||||
char dir[MAXDIRLEN + 1]; /* open dir */
|
||||
#endif
|
||||
struct dirent dent; /* actual directory entry */
|
||||
struct dirent dent; /* actual directory entry */
|
||||
} DIR;
|
||||
|
||||
|
||||
/* Directory routine flags. */
|
||||
#define DIR_F_LOWER 0x0001 /* force to lowercase */
|
||||
#define DIR_F_SANE 0x0002 /* force this to sane path */
|
||||
#define DIR_F_ISROOT 0x0010 /* this is the root directory */
|
||||
|
||||
#define DIR_F_LOWER 0x0001 /* force to lowercase */
|
||||
#define DIR_F_SANE 0x0002 /* force this to sane path */
|
||||
#define DIR_F_ISROOT 0x0010 /* this is the root directory */
|
||||
|
||||
/* Function prototypes. */
|
||||
extern DIR *opendir(const char *);
|
||||
extern struct dirent *readdir(DIR *);
|
||||
extern long telldir(DIR *);
|
||||
extern void seekdir(DIR *, long);
|
||||
extern int closedir(DIR *);
|
||||
extern DIR *opendir(const char *);
|
||||
extern struct dirent *readdir(DIR *);
|
||||
extern long telldir(DIR *);
|
||||
extern void seekdir(DIR *, long);
|
||||
extern int closedir(DIR *);
|
||||
|
||||
#define rewinddir(dirp) seekdir(dirp, 0L)
|
||||
#define rewinddir(dirp) seekdir(dirp, 0L)
|
||||
|
||||
|
||||
#endif /*PLAT_DIR_H*/
|
||||
#endif /*PLAT_DIR_H*/
|
||||
|
||||
@@ -15,24 +15,22 @@
|
||||
*/
|
||||
|
||||
#ifndef PLAT_DYNLD_H
|
||||
# define PLAT_DYNLD_H
|
||||
#define PLAT_DYNLD_H
|
||||
|
||||
typedef struct {
|
||||
const char *name;
|
||||
void *func;
|
||||
const char *name;
|
||||
void *func;
|
||||
} dllimp_t;
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern void *dynld_module(const char *, dllimp_t *);
|
||||
extern void dynld_close(void *);
|
||||
extern void *dynld_module(const char *, dllimp_t *);
|
||||
extern void dynld_close(void *);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*PLAT_DYNLD_H*/
|
||||
#endif /*PLAT_DYNLD_H*/
|
||||
|
||||
@@ -46,22 +46,20 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_PNG_STRUCT_H
|
||||
# define EMU_PNG_STRUCT_H
|
||||
|
||||
#define EMU_PNG_STRUCT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
extern int png_write_gray(char *path, int invert,
|
||||
uint8_t *pix, int16_t w, int16_t h);
|
||||
extern int png_write_gray(char *path, int invert,
|
||||
uint8_t *pix, int16_t w, int16_t h);
|
||||
|
||||
extern void png_write_rgb(char *fn,
|
||||
uint8_t *pix, int16_t w, int16_t h, uint16_t pitch, PALETTE palcol);
|
||||
extern void png_write_rgb(char *fn,
|
||||
uint8_t *pix, int16_t w, int16_t h, uint16_t pitch, PALETTE palcol);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*EMU_PNG_STRUCT_H*/
|
||||
#endif /*EMU_PNG_STRUCT_H*/
|
||||
|
||||
@@ -17,22 +17,20 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_PORT_6X_H
|
||||
# define EMU_PORT_6X_H
|
||||
#define EMU_PORT_6X_H
|
||||
|
||||
#ifdef _TIMER_H_
|
||||
typedef struct
|
||||
{
|
||||
uint8_t refresh, flags;
|
||||
uint8_t refresh, flags;
|
||||
|
||||
pc_timer_t refresh_timer;
|
||||
pc_timer_t refresh_timer;
|
||||
} port_6x_t;
|
||||
#endif
|
||||
|
||||
extern const device_t port_6x_device;
|
||||
extern const device_t port_6x_xi8088_device;
|
||||
extern const device_t port_6x_ps2_device;
|
||||
extern const device_t port_6x_olivetti_device;
|
||||
|
||||
extern const device_t port_6x_device;
|
||||
extern const device_t port_6x_xi8088_device;
|
||||
extern const device_t port_6x_ps2_device;
|
||||
extern const device_t port_6x_olivetti_device;
|
||||
|
||||
|
||||
#endif /*EMU_PORT_6X_H*/
|
||||
#endif /*EMU_PORT_6X_H*/
|
||||
|
||||
@@ -17,32 +17,28 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_PORT_92_H
|
||||
# define EMU_PORT_92_H
|
||||
|
||||
#define EMU_PORT_92_H
|
||||
|
||||
#ifdef _TIMER_H_
|
||||
typedef struct
|
||||
{
|
||||
uint8_t reg, flags;
|
||||
uint8_t reg, flags;
|
||||
|
||||
pc_timer_t pulse_timer;
|
||||
pc_timer_t pulse_timer;
|
||||
|
||||
uint64_t pulse_period;
|
||||
uint64_t pulse_period;
|
||||
} port_92_t;
|
||||
#endif
|
||||
|
||||
extern void port_92_set_period(void *priv, uint64_t pulse_period);
|
||||
extern void port_92_set_features(void *priv, int reset, int a20);
|
||||
|
||||
extern void port_92_set_period(void *priv, uint64_t pulse_period);
|
||||
extern void port_92_set_features(void *priv, int reset, int a20);
|
||||
extern void port_92_add(void *priv);
|
||||
extern void port_92_remove(void *priv);
|
||||
|
||||
extern void port_92_add(void *priv);
|
||||
extern void port_92_remove(void *priv);
|
||||
extern const device_t port_92_device;
|
||||
extern const device_t port_92_inv_device;
|
||||
extern const device_t port_92_word_device;
|
||||
extern const device_t port_92_pci_device;
|
||||
|
||||
|
||||
extern const device_t port_92_device;
|
||||
extern const device_t port_92_inv_device;
|
||||
extern const device_t port_92_word_device;
|
||||
extern const device_t port_92_pci_device;
|
||||
|
||||
|
||||
#endif /*EMU_PORT_92_H*/
|
||||
#endif /*EMU_PORT_92_H*/
|
||||
|
||||
@@ -16,7 +16,7 @@
|
||||
*/
|
||||
|
||||
#ifndef POSTCARD_H
|
||||
# define POSTCARD_H
|
||||
#define POSTCARD_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -25,12 +25,10 @@ extern "C" {
|
||||
/* Global variables. */
|
||||
extern const device_t postcard_device;
|
||||
|
||||
|
||||
/* Functions. */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#endif /*POSTCARD_H*/
|
||||
#endif /*POSTCARD_H*/
|
||||
|
||||
@@ -1,18 +1,14 @@
|
||||
#ifndef EMU_PPI_H
|
||||
# define EMU_PPI_H
|
||||
|
||||
#define EMU_PPI_H
|
||||
|
||||
typedef struct PPI {
|
||||
int s2;
|
||||
uint8_t pa,pb;
|
||||
int s2;
|
||||
uint8_t pa, pb;
|
||||
} PPI;
|
||||
|
||||
extern int ppispeakon;
|
||||
extern PPI ppi;
|
||||
|
||||
extern int ppispeakon;
|
||||
extern PPI ppi;
|
||||
extern void ppi_reset(void);
|
||||
|
||||
|
||||
extern void ppi_reset(void);
|
||||
|
||||
|
||||
#endif /*EMU_PPI_H*/
|
||||
#endif /*EMU_PPI_H*/
|
||||
|
||||
@@ -46,20 +46,18 @@
|
||||
*/
|
||||
|
||||
#ifndef PRINTER_H
|
||||
# define PRINTER_H
|
||||
#define PRINTER_H
|
||||
|
||||
#define FONT_FILE_DOTMATRIX "dotmatrix.ttf"
|
||||
|
||||
#define FONT_FILE_ROMAN "roman.ttf"
|
||||
#define FONT_FILE_SANSSERIF "sansserif.ttf"
|
||||
#define FONT_FILE_COURIER "courier.ttf"
|
||||
#define FONT_FILE_SCRIPT "script.ttf"
|
||||
#define FONT_FILE_OCRA "ocra.ttf"
|
||||
#define FONT_FILE_OCRB "ocra.ttf"
|
||||
#define FONT_FILE_DOTMATRIX "dotmatrix.ttf"
|
||||
|
||||
#define FONT_FILE_ROMAN "roman.ttf"
|
||||
#define FONT_FILE_SANSSERIF "sansserif.ttf"
|
||||
#define FONT_FILE_COURIER "courier.ttf"
|
||||
#define FONT_FILE_SCRIPT "script.ttf"
|
||||
#define FONT_FILE_OCRA "ocra.ttf"
|
||||
#define FONT_FILE_OCRB "ocra.ttf"
|
||||
|
||||
extern void
|
||||
select_codepage(uint16_t code, uint16_t *curmap);
|
||||
|
||||
|
||||
#endif /*PRINTER_H*/
|
||||
#endif /*PRINTER_H*/
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
#ifndef EMU_PRT_DEVS_H
|
||||
# define EMU_PRT_DEVS_H
|
||||
#define EMU_PRT_DEVS_H
|
||||
|
||||
extern const lpt_device_t lpt_prt_text_device;
|
||||
extern const lpt_device_t lpt_prt_escp_device;
|
||||
extern const lpt_device_t lpt_prt_ps_device;
|
||||
extern const lpt_device_t lpt_prt_text_device;
|
||||
extern const lpt_device_t lpt_prt_escp_device;
|
||||
extern const lpt_device_t lpt_prt_ps_device;
|
||||
|
||||
#endif /*EMU_PRT_DEVS_H*/
|
||||
|
||||
@@ -16,9 +16,9 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_RANDOM_H
|
||||
# define EMU_RANDOM_H
|
||||
#define EMU_RANDOM_H
|
||||
|
||||
extern uint8_t random_generate(void);
|
||||
extern void random_init(void);
|
||||
extern uint8_t random_generate(void);
|
||||
extern void random_init(void);
|
||||
|
||||
#endif /*EMU_RANDOM_H*/
|
||||
#endif /*EMU_RANDOM_H*/
|
||||
|
||||
@@ -207,6 +207,9 @@
|
||||
#define IDC_COMBO_MIDI_IN 1050
|
||||
#define IDC_CONFIGURE_CMS 1051
|
||||
#define IDC_CONFIGURE_SSI 1052
|
||||
#define IDC_FM_DRIVER 1053
|
||||
#define IDC_RADIO_FM_DRV_NUKED 1054
|
||||
#define IDC_RADIO_FM_DRV_YMFM 1055
|
||||
|
||||
#define IDC_COMBO_NET_TYPE 1060 /* network config */
|
||||
#define IDC_COMBO_PCAP 1061
|
||||
@@ -358,9 +361,9 @@
|
||||
# define IDM_ACTION_END_TRACE 40019
|
||||
# define IDM_ACTION_TRACE 40020
|
||||
#endif
|
||||
#define IDM_CONFIG 40020
|
||||
#define IDM_VID_HIDE_STATUS_BAR 40021
|
||||
#define IDM_VID_HIDE_TOOLBAR 40022
|
||||
#define IDM_CONFIG 40021
|
||||
#define IDM_VID_HIDE_STATUS_BAR 40022
|
||||
#define IDM_VID_HIDE_TOOLBAR 40023
|
||||
#define IDM_UPDATE_ICONS 40030
|
||||
#define IDM_SND_GAIN 40031
|
||||
#define IDM_VID_RESIZE 40040
|
||||
|
||||
@@ -15,79 +15,75 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_ROM_H
|
||||
# define EMU_ROM_H
|
||||
#define EMU_ROM_H
|
||||
|
||||
#define FLAG_INT 1
|
||||
#define FLAG_INV 2
|
||||
#define FLAG_AUX 4
|
||||
#define FLAG_REP 8
|
||||
|
||||
|
||||
#define bios_load_linear(a, b, c, d) bios_load(a, NULL, b, c, d, 0)
|
||||
#define bios_load_linearr(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_REP)
|
||||
#define bios_load_aux_linear(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_AUX)
|
||||
#define bios_load_linear_inverted(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_INV)
|
||||
#define bios_load_aux_linear_inverted(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_INV | FLAG_AUX)
|
||||
#define bios_load_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT)
|
||||
#define bios_load_interleavedr(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_REP)
|
||||
#define bios_load_aux_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_AUX)
|
||||
#define FLAG_INT 1
|
||||
#define FLAG_INV 2
|
||||
#define FLAG_AUX 4
|
||||
#define FLAG_REP 8
|
||||
|
||||
#define bios_load_linear(a, b, c, d) bios_load(a, NULL, b, c, d, 0)
|
||||
#define bios_load_linearr(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_REP)
|
||||
#define bios_load_aux_linear(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_AUX)
|
||||
#define bios_load_linear_inverted(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_INV)
|
||||
#define bios_load_aux_linear_inverted(a, b, c, d) bios_load(a, NULL, b, c, d, FLAG_INV | FLAG_AUX)
|
||||
#define bios_load_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT)
|
||||
#define bios_load_interleavedr(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_REP)
|
||||
#define bios_load_aux_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_AUX)
|
||||
|
||||
typedef struct {
|
||||
uint8_t *rom;
|
||||
int sz;
|
||||
uint32_t mask;
|
||||
mem_mapping_t mapping;
|
||||
uint8_t *rom;
|
||||
int sz;
|
||||
uint32_t mask;
|
||||
mem_mapping_t mapping;
|
||||
} rom_t;
|
||||
|
||||
|
||||
typedef struct rom_path_t {
|
||||
char path[1024];
|
||||
struct rom_path_t* next;
|
||||
char path[1024];
|
||||
struct rom_path_t *next;
|
||||
} rom_path_t;
|
||||
|
||||
extern rom_path_t rom_paths;
|
||||
|
||||
extern void rom_add_path(const char* path);
|
||||
extern void rom_add_path(const char *path);
|
||||
|
||||
extern uint8_t rom_read(uint32_t addr, void *p);
|
||||
extern uint16_t rom_readw(uint32_t addr, void *p);
|
||||
extern uint32_t rom_readl(uint32_t addr, void *p);
|
||||
extern uint8_t rom_read(uint32_t addr, void *p);
|
||||
extern uint16_t rom_readw(uint32_t addr, void *p);
|
||||
extern uint32_t rom_readl(uint32_t addr, void *p);
|
||||
|
||||
extern FILE *rom_fopen(char *fn, char *mode);
|
||||
extern int rom_getfile(char *fn, char *s, int size);
|
||||
extern int rom_present(char *fn);
|
||||
extern FILE *rom_fopen(char *fn, char *mode);
|
||||
extern int rom_getfile(char *fn, char *s, int size);
|
||||
extern int rom_present(char *fn);
|
||||
|
||||
extern int rom_load_linear_oddeven(char *fn, uint32_t addr, int sz,
|
||||
int off, uint8_t *ptr);
|
||||
extern int rom_load_linear(char *fn, uint32_t addr, int sz,
|
||||
int off, uint8_t *ptr);
|
||||
extern int rom_load_interleaved(char *fnl, char *fnh, uint32_t addr,
|
||||
int sz, int off, uint8_t *ptr);
|
||||
extern int rom_load_linear_oddeven(char *fn, uint32_t addr, int sz,
|
||||
int off, uint8_t *ptr);
|
||||
extern int rom_load_linear(char *fn, uint32_t addr, int sz,
|
||||
int off, uint8_t *ptr);
|
||||
extern int rom_load_interleaved(char *fnl, char *fnh, uint32_t addr,
|
||||
int sz, int off, uint8_t *ptr);
|
||||
|
||||
extern uint8_t bios_read(uint32_t addr, void *priv);
|
||||
extern uint16_t bios_readw(uint32_t addr, void *priv);
|
||||
extern uint32_t bios_readl(uint32_t addr, void *priv);
|
||||
extern uint8_t bios_read(uint32_t addr, void *priv);
|
||||
extern uint16_t bios_readw(uint32_t addr, void *priv);
|
||||
extern uint32_t bios_readl(uint32_t addr, void *priv);
|
||||
|
||||
extern int bios_load(char *fn1, char *fn2, uint32_t addr, int sz,
|
||||
int off, int flags);
|
||||
extern int bios_load_linear_combined(char *fn1, char *fn2,
|
||||
int sz, int off);
|
||||
extern int bios_load_linear_combined2(char *fn1, char *fn2,
|
||||
char *fn3, char *fn4, char *fn5,
|
||||
int sz, int off);
|
||||
extern int bios_load_linear_combined2_ex(char *fn1, char *fn2,
|
||||
char *fn3, char *fn4, char *fn5,
|
||||
int sz, int off);
|
||||
extern int bios_load(char *fn1, char *fn2, uint32_t addr, int sz,
|
||||
int off, int flags);
|
||||
extern int bios_load_linear_combined(char *fn1, char *fn2,
|
||||
int sz, int off);
|
||||
extern int bios_load_linear_combined2(char *fn1, char *fn2,
|
||||
char *fn3, char *fn4, char *fn5,
|
||||
int sz, int off);
|
||||
extern int bios_load_linear_combined2_ex(char *fn1, char *fn2,
|
||||
char *fn3, char *fn4, char *fn5,
|
||||
int sz, int off);
|
||||
|
||||
extern int rom_init(rom_t *rom, char *fn, uint32_t address, int size,
|
||||
int mask, int file_offset, uint32_t flags);
|
||||
extern int rom_init_oddeven(rom_t *rom, char *fn, uint32_t address, int size,
|
||||
int mask, int file_offset, uint32_t flags);
|
||||
extern int rom_init_interleaved(rom_t *rom, char *fn_low,
|
||||
char *fn_high, uint32_t address,
|
||||
int size, int mask, int file_offset,
|
||||
uint32_t flags);
|
||||
extern int rom_init(rom_t *rom, char *fn, uint32_t address, int size,
|
||||
int mask, int file_offset, uint32_t flags);
|
||||
extern int rom_init_oddeven(rom_t *rom, char *fn, uint32_t address, int size,
|
||||
int mask, int file_offset, uint32_t flags);
|
||||
extern int rom_init_interleaved(rom_t *rom, char *fn_low,
|
||||
char *fn_high, uint32_t address,
|
||||
int size, int mask, int file_offset,
|
||||
uint32_t flags);
|
||||
|
||||
|
||||
#endif /*EMU_ROM_H*/
|
||||
#endif /*EMU_ROM_H*/
|
||||
|
||||
@@ -19,17 +19,23 @@
|
||||
* Copyright 2017,2018 Fred N. van Kempen.
|
||||
*/
|
||||
#ifndef EMU_SCSI_H
|
||||
# define EMU_SCSI_H
|
||||
#define EMU_SCSI_H
|
||||
|
||||
extern int scsi_card_current[4];
|
||||
/* Configuration. */
|
||||
#define SCSI_BUS_MAX 4 /* currently we support up to 4 controllers */
|
||||
|
||||
extern int scsi_card_available(int card);
|
||||
#define SCSI_ID_MAX 16 /* 16 on wide buses */
|
||||
#define SCSI_LUN_MAX 8 /* always 8 */
|
||||
|
||||
extern int scsi_card_current[SCSI_BUS_MAX];
|
||||
|
||||
extern int scsi_card_available(int card);
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t *scsi_card_getdevice(int card);
|
||||
extern const device_t *scsi_card_getdevice(int card);
|
||||
#endif
|
||||
extern int scsi_card_has_config(int card);
|
||||
extern char *scsi_card_get_internal_name(int card);
|
||||
extern int scsi_card_get_from_internal_name(char *s);
|
||||
extern void scsi_card_init(void);
|
||||
extern int scsi_card_has_config(int card);
|
||||
extern char *scsi_card_get_internal_name(int card);
|
||||
extern int scsi_card_get_from_internal_name(char *s);
|
||||
extern void scsi_card_init(void);
|
||||
|
||||
#endif /*EMU_SCSI_H*/
|
||||
#endif /*EMU_SCSI_H*/
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
#ifndef SCSI_AHA154X_H
|
||||
# define SCSI_AHA154X_H
|
||||
#define SCSI_AHA154X_H
|
||||
|
||||
extern const device_t aha154xa_device;
|
||||
extern const device_t aha154xb_device;
|
||||
@@ -8,6 +8,6 @@ extern const device_t aha154xcf_device;
|
||||
extern const device_t aha154xcp_device;
|
||||
extern const device_t aha1640_device;
|
||||
|
||||
extern void aha_device_reset(void *p);
|
||||
extern void aha_device_reset(void *p);
|
||||
|
||||
#endif /*SCSI_AHA154X_H*/
|
||||
#endif /*SCSI_AHA154X_H*/
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
*/
|
||||
|
||||
#ifndef SCSI_BUSLOGIC_H
|
||||
# define SCSI_BUSLOGIC_H
|
||||
#define SCSI_BUSLOGIC_H
|
||||
|
||||
extern const device_t buslogic_542b_device;
|
||||
extern const device_t buslogic_545s_device;
|
||||
@@ -28,6 +28,6 @@ extern const device_t buslogic_445s_device;
|
||||
extern const device_t buslogic_445c_device;
|
||||
extern const device_t buslogic_958d_pci_device;
|
||||
|
||||
extern void BuslogicDeviceReset(void *p);
|
||||
extern void BuslogicDeviceReset(void *p);
|
||||
|
||||
#endif /*SCSI_BUSLOGIC_H*/
|
||||
#endif /*SCSI_BUSLOGIC_H*/
|
||||
|
||||
@@ -19,8 +19,7 @@
|
||||
#ifndef EMU_SCSI_CDROM_H
|
||||
#define EMU_SCSI_CDROM_H
|
||||
|
||||
#define CDROM_TIME 10.0
|
||||
|
||||
#define CDROM_TIME 10.0
|
||||
|
||||
#ifdef SCSI_DEVICE_H
|
||||
typedef struct {
|
||||
@@ -30,40 +29,37 @@ typedef struct {
|
||||
cdrom_t *drv;
|
||||
|
||||
uint8_t *buffer,
|
||||
atapi_cdb[16],
|
||||
current_cdb[16],
|
||||
sense[256];
|
||||
atapi_cdb[16],
|
||||
current_cdb[16],
|
||||
sense[256];
|
||||
|
||||
uint8_t status, phase,
|
||||
error, id,
|
||||
features, cur_lun,
|
||||
pad0, pad1;
|
||||
error, id,
|
||||
features, cur_lun,
|
||||
pad0, pad1;
|
||||
|
||||
uint16_t request_length, max_transfer_len;
|
||||
|
||||
int requested_blocks, packet_status,
|
||||
total_length, do_page_save,
|
||||
unit_attention, request_pos,
|
||||
old_len, media_status;
|
||||
total_length, do_page_save,
|
||||
unit_attention, request_pos,
|
||||
old_len, media_status;
|
||||
|
||||
uint32_t sector_pos, sector_len,
|
||||
packet_len, pos;
|
||||
packet_len, pos;
|
||||
|
||||
double callback;
|
||||
} scsi_cdrom_t;
|
||||
#endif
|
||||
|
||||
|
||||
extern scsi_cdrom_t *scsi_cdrom[CDROM_NUM];
|
||||
extern scsi_cdrom_t *scsi_cdrom[CDROM_NUM];
|
||||
|
||||
#define scsi_cdrom_sense_error dev->sense[0]
|
||||
#define scsi_cdrom_sense_key dev->sense[2]
|
||||
#define scsi_cdrom_asc dev->sense[12]
|
||||
#define scsi_cdrom_ascq dev->sense[13]
|
||||
#define scsi_cdrom_drive cdrom_drives[id].host_drive
|
||||
#define scsi_cdrom_sense_key dev->sense[2]
|
||||
#define scsi_cdrom_asc dev->sense[12]
|
||||
#define scsi_cdrom_ascq dev->sense[13]
|
||||
#define scsi_cdrom_drive cdrom_drives[id].host_drive
|
||||
|
||||
extern void scsi_cdrom_reset(scsi_common_t *sc);
|
||||
|
||||
extern void scsi_cdrom_reset(scsi_common_t *sc);
|
||||
|
||||
|
||||
#endif /*EMU_SCSI_CDROM_H*/
|
||||
#endif /*EMU_SCSI_CDROM_H*/
|
||||
|
||||
@@ -18,206 +18,201 @@
|
||||
*/
|
||||
|
||||
#ifndef SCSI_DEVICE_H
|
||||
# define SCSI_DEVICE_H
|
||||
#define SCSI_DEVICE_H
|
||||
|
||||
/* Configuration. */
|
||||
#define SCSI_BUS_MAX 4 /* currently we support up to 4 controllers */
|
||||
|
||||
#define SCSI_ID_MAX 16 /* 16 on wide buses */
|
||||
#define SCSI_LUN_MAX 8 /* always 8 */
|
||||
|
||||
#define SCSI_LUN_USE_CDB 0xff
|
||||
#define SCSI_LUN_USE_CDB 0xff
|
||||
|
||||
#ifdef WALTJE
|
||||
#define SCSI_TIME 50.0
|
||||
# define SCSI_TIME 50.0
|
||||
#else
|
||||
#define SCSI_TIME 500.0
|
||||
# define SCSI_TIME 500.0
|
||||
#endif
|
||||
|
||||
|
||||
/* Bits of 'status' */
|
||||
#define ERR_STAT 0x01
|
||||
#define DRQ_STAT 0x08 /* Data request */
|
||||
#define DSC_STAT 0x10
|
||||
#define SERVICE_STAT 0x10
|
||||
#define READY_STAT 0x40
|
||||
#define BUSY_STAT 0x80
|
||||
#define ERR_STAT 0x01
|
||||
#define DRQ_STAT 0x08 /* Data request */
|
||||
#define DSC_STAT 0x10
|
||||
#define SERVICE_STAT 0x10
|
||||
#define READY_STAT 0x40
|
||||
#define BUSY_STAT 0x80
|
||||
|
||||
/* Bits of 'error' */
|
||||
#define ABRT_ERR 0x04 /* Command aborted */
|
||||
#define MCR_ERR 0x08 /* Media change request */
|
||||
#define ABRT_ERR 0x04 /* Command aborted */
|
||||
#define MCR_ERR 0x08 /* Media change request */
|
||||
|
||||
/* SCSI commands. */
|
||||
#define GPCMD_TEST_UNIT_READY 0x00
|
||||
#define GPCMD_REZERO_UNIT 0x01
|
||||
#define GPCMD_REQUEST_SENSE 0x03
|
||||
#define GPCMD_FORMAT_UNIT 0x04
|
||||
#define GPCMD_IOMEGA_SENSE 0x06
|
||||
#define GPCMD_READ_6 0x08
|
||||
#define GPCMD_WRITE_6 0x0a
|
||||
#define GPCMD_SEEK_6 0x0b
|
||||
#define GPCMD_IOMEGA_SET_PROTECTION_MODE 0x0c
|
||||
#define GPCMD_IOMEGA_EJECT 0x0d /* ATAPI only? */
|
||||
#define GPCMD_INQUIRY 0x12
|
||||
#define GPCMD_VERIFY_6 0x13
|
||||
#define GPCMD_MODE_SELECT_6 0x15
|
||||
#define GPCMD_SCSI_RESERVE 0x16
|
||||
#define GPCMD_SCSI_RELEASE 0x17
|
||||
#define GPCMD_MODE_SENSE_6 0x1a
|
||||
#define GPCMD_START_STOP_UNIT 0x1b
|
||||
#define GPCMD_SEND_DIAGNOSTIC 0x1d
|
||||
#define GPCMD_PREVENT_REMOVAL 0x1e
|
||||
#define GPCMD_READ_FORMAT_CAPACITIES 0x23
|
||||
#define GPCMD_READ_CDROM_CAPACITY 0x25
|
||||
#define GPCMD_READ_10 0x28
|
||||
#define GPCMD_READ_GENERATION 0x29
|
||||
#define GPCMD_WRITE_10 0x2a
|
||||
#define GPCMD_SEEK_10 0x2b
|
||||
#define GPCMD_ERASE_10 0x2c
|
||||
#define GPCMD_WRITE_AND_VERIFY_10 0x2e
|
||||
#define GPCMD_VERIFY_10 0x2f
|
||||
#define GPCMD_READ_BUFFER 0x3c
|
||||
#define GPCMD_WRITE_SAME_10 0x41
|
||||
#define GPCMD_READ_SUBCHANNEL 0x42
|
||||
#define GPCMD_READ_TOC_PMA_ATIP 0x43
|
||||
#define GPCMD_READ_HEADER 0x44
|
||||
#define GPCMD_PLAY_AUDIO_10 0x45
|
||||
#define GPCMD_GET_CONFIGURATION 0x46
|
||||
#define GPCMD_PLAY_AUDIO_MSF 0x47
|
||||
#define GPCMD_PLAY_AUDIO_TRACK_INDEX 0x48
|
||||
#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10 0x49
|
||||
#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
|
||||
#define GPCMD_PAUSE_RESUME 0x4b
|
||||
#define GPCMD_STOP_PLAY_SCAN 0x4e
|
||||
#define GPCMD_READ_DISC_INFORMATION 0x51
|
||||
#define GPCMD_READ_TRACK_INFORMATION 0x52
|
||||
#define GPCMD_MODE_SELECT_10 0x55
|
||||
#define GPCMD_MODE_SENSE_10 0x5a
|
||||
#define GPCMD_PLAY_AUDIO_12 0xa5
|
||||
#define GPCMD_READ_12 0xa8
|
||||
#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12 0xa9
|
||||
#define GPCMD_WRITE_12 0xaa
|
||||
#define GPCMD_ERASE_12 0xac
|
||||
#define GPCMD_READ_DVD_STRUCTURE 0xad /* For reading. */
|
||||
#define GPCMD_WRITE_AND_VERIFY_12 0xae
|
||||
#define GPCMD_VERIFY_12 0xaf
|
||||
#define GPCMD_PLAY_CD_OLD 0xb4
|
||||
#define GPCMD_READ_CD_OLD 0xb8
|
||||
#define GPCMD_READ_CD_MSF 0xb9
|
||||
#define GPCMD_SCAN 0xba
|
||||
#define GPCMD_SET_SPEED 0xbb
|
||||
#define GPCMD_PLAY_CD 0xbc
|
||||
#define GPCMD_MECHANISM_STATUS 0xbd
|
||||
#define GPCMD_READ_CD 0xbe
|
||||
#define GPCMD_SEND_DVD_STRUCTURE 0xbf /* This is for writing only, irrelevant to 86Box. */
|
||||
#define GPCMD_AUDIO_TRACK_SEARCH 0xc0 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_TOSHIBA_PLAY_AUDIO 0xc1 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_PAUSE_RESUME_ALT 0xc2
|
||||
#define GPCMD_STILL 0xc2 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_CADDY_EJECT 0xc4 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_READ_SUBCODEQ_PLAYING_STATUS 0xc6 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_READ_DISC_INFORMATION_TOSHIBA 0xc7 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_SCAN_ALT 0xcd /* Should be equivalent to 0xba */
|
||||
#define GPCMD_SET_SPEED_ALT 0xda /* Should be equivalent to 0xbb */
|
||||
#define GPCMD_TEST_UNIT_READY 0x00
|
||||
#define GPCMD_REZERO_UNIT 0x01
|
||||
#define GPCMD_REQUEST_SENSE 0x03
|
||||
#define GPCMD_FORMAT_UNIT 0x04
|
||||
#define GPCMD_IOMEGA_SENSE 0x06
|
||||
#define GPCMD_READ_6 0x08
|
||||
#define GPCMD_WRITE_6 0x0a
|
||||
#define GPCMD_SEEK_6 0x0b
|
||||
#define GPCMD_IOMEGA_SET_PROTECTION_MODE 0x0c
|
||||
#define GPCMD_IOMEGA_EJECT 0x0d /* ATAPI only? */
|
||||
#define GPCMD_INQUIRY 0x12
|
||||
#define GPCMD_VERIFY_6 0x13
|
||||
#define GPCMD_MODE_SELECT_6 0x15
|
||||
#define GPCMD_SCSI_RESERVE 0x16
|
||||
#define GPCMD_SCSI_RELEASE 0x17
|
||||
#define GPCMD_MODE_SENSE_6 0x1a
|
||||
#define GPCMD_START_STOP_UNIT 0x1b
|
||||
#define GPCMD_SEND_DIAGNOSTIC 0x1d
|
||||
#define GPCMD_PREVENT_REMOVAL 0x1e
|
||||
#define GPCMD_READ_FORMAT_CAPACITIES 0x23
|
||||
#define GPCMD_READ_CDROM_CAPACITY 0x25
|
||||
#define GPCMD_READ_10 0x28
|
||||
#define GPCMD_READ_GENERATION 0x29
|
||||
#define GPCMD_WRITE_10 0x2a
|
||||
#define GPCMD_SEEK_10 0x2b
|
||||
#define GPCMD_ERASE_10 0x2c
|
||||
#define GPCMD_WRITE_AND_VERIFY_10 0x2e
|
||||
#define GPCMD_VERIFY_10 0x2f
|
||||
#define GPCMD_READ_BUFFER 0x3c
|
||||
#define GPCMD_WRITE_SAME_10 0x41
|
||||
#define GPCMD_READ_SUBCHANNEL 0x42
|
||||
#define GPCMD_READ_TOC_PMA_ATIP 0x43
|
||||
#define GPCMD_READ_HEADER 0x44
|
||||
#define GPCMD_PLAY_AUDIO_10 0x45
|
||||
#define GPCMD_GET_CONFIGURATION 0x46
|
||||
#define GPCMD_PLAY_AUDIO_MSF 0x47
|
||||
#define GPCMD_PLAY_AUDIO_TRACK_INDEX 0x48
|
||||
#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10 0x49
|
||||
#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
|
||||
#define GPCMD_PAUSE_RESUME 0x4b
|
||||
#define GPCMD_STOP_PLAY_SCAN 0x4e
|
||||
#define GPCMD_READ_DISC_INFORMATION 0x51
|
||||
#define GPCMD_READ_TRACK_INFORMATION 0x52
|
||||
#define GPCMD_MODE_SELECT_10 0x55
|
||||
#define GPCMD_MODE_SENSE_10 0x5a
|
||||
#define GPCMD_PLAY_AUDIO_12 0xa5
|
||||
#define GPCMD_READ_12 0xa8
|
||||
#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12 0xa9
|
||||
#define GPCMD_WRITE_12 0xaa
|
||||
#define GPCMD_ERASE_12 0xac
|
||||
#define GPCMD_READ_DVD_STRUCTURE 0xad /* For reading. */
|
||||
#define GPCMD_WRITE_AND_VERIFY_12 0xae
|
||||
#define GPCMD_VERIFY_12 0xaf
|
||||
#define GPCMD_PLAY_CD_OLD 0xb4
|
||||
#define GPCMD_READ_CD_OLD 0xb8
|
||||
#define GPCMD_READ_CD_MSF 0xb9
|
||||
#define GPCMD_SCAN 0xba
|
||||
#define GPCMD_SET_SPEED 0xbb
|
||||
#define GPCMD_PLAY_CD 0xbc
|
||||
#define GPCMD_MECHANISM_STATUS 0xbd
|
||||
#define GPCMD_READ_CD 0xbe
|
||||
#define GPCMD_SEND_DVD_STRUCTURE 0xbf /* This is for writing only, irrelevant to 86Box. */
|
||||
#define GPCMD_AUDIO_TRACK_SEARCH 0xc0 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_TOSHIBA_PLAY_AUDIO 0xc1 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_PAUSE_RESUME_ALT 0xc2
|
||||
#define GPCMD_STILL 0xc2 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_CADDY_EJECT 0xc4 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_READ_SUBCODEQ_PLAYING_STATUS 0xc6 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_READ_DISC_INFORMATION_TOSHIBA 0xc7 /* Toshiba Vendor Unique command */
|
||||
#define GPCMD_SCAN_ALT 0xcd /* Should be equivalent to 0xba */
|
||||
#define GPCMD_SET_SPEED_ALT 0xda /* Should be equivalent to 0xbb */
|
||||
|
||||
/* Mode page codes for mode sense/set */
|
||||
#define GPMODE_R_W_ERROR_PAGE 0x01
|
||||
#define GPMODE_DISCONNECT_PAGE 0x02 /* Disconnect/reconnect page */
|
||||
#define GPMODE_FORMAT_DEVICE_PAGE 0x03
|
||||
#define GPMODE_RIGID_DISK_PAGE 0x04 /* Rigid disk geometry page */
|
||||
#define GPMODE_FLEXIBLE_DISK_PAGE 0x05
|
||||
#define GPMODE_CACHING_PAGE 0x08
|
||||
#define GPMODE_CDROM_PAGE 0x0d
|
||||
#define GPMODE_CDROM_AUDIO_PAGE 0x0e
|
||||
#define GPMODE_CAPABILITIES_PAGE 0x2a
|
||||
#define GPMODE_IOMEGA_PAGE 0x2f
|
||||
#define GPMODE_UNK_VENDOR_PAGE 0x30
|
||||
#define GPMODE_ALL_PAGES 0x3f
|
||||
#define GPMODE_R_W_ERROR_PAGE 0x01
|
||||
#define GPMODE_DISCONNECT_PAGE 0x02 /* Disconnect/reconnect page */
|
||||
#define GPMODE_FORMAT_DEVICE_PAGE 0x03
|
||||
#define GPMODE_RIGID_DISK_PAGE 0x04 /* Rigid disk geometry page */
|
||||
#define GPMODE_FLEXIBLE_DISK_PAGE 0x05
|
||||
#define GPMODE_CACHING_PAGE 0x08
|
||||
#define GPMODE_CDROM_PAGE 0x0d
|
||||
#define GPMODE_CDROM_AUDIO_PAGE 0x0e
|
||||
#define GPMODE_CAPABILITIES_PAGE 0x2a
|
||||
#define GPMODE_IOMEGA_PAGE 0x2f
|
||||
#define GPMODE_UNK_VENDOR_PAGE 0x30
|
||||
#define GPMODE_ALL_PAGES 0x3f
|
||||
|
||||
/* Mode page codes for presence */
|
||||
#define GPMODEP_R_W_ERROR_PAGE 0x0000000000000002LL
|
||||
#define GPMODEP_DISCONNECT_PAGE 0x0000000000000004LL
|
||||
#define GPMODEP_FORMAT_DEVICE_PAGE 0x0000000000000008LL
|
||||
#define GPMODEP_RIGID_DISK_PAGE 0x0000000000000010LL
|
||||
#define GPMODEP_FLEXIBLE_DISK_PAGE 0x0000000000000020LL
|
||||
#define GPMODEP_CACHING_PAGE 0x0000000000000100LL
|
||||
#define GPMODEP_CDROM_PAGE 0x0000000000002000LL
|
||||
#define GPMODEP_CDROM_AUDIO_PAGE 0x0000000000004000LL
|
||||
#define GPMODEP_CAPABILITIES_PAGE 0x0000040000000000LL
|
||||
#define GPMODEP_IOMEGA_PAGE 0x0000800000000000LL
|
||||
#define GPMODEP_UNK_VENDOR_PAGE 0x0001000000000000LL
|
||||
#define GPMODEP_ALL_PAGES 0x8000000000000000LL
|
||||
#define GPMODEP_R_W_ERROR_PAGE 0x0000000000000002LL
|
||||
#define GPMODEP_DISCONNECT_PAGE 0x0000000000000004LL
|
||||
#define GPMODEP_FORMAT_DEVICE_PAGE 0x0000000000000008LL
|
||||
#define GPMODEP_RIGID_DISK_PAGE 0x0000000000000010LL
|
||||
#define GPMODEP_FLEXIBLE_DISK_PAGE 0x0000000000000020LL
|
||||
#define GPMODEP_CACHING_PAGE 0x0000000000000100LL
|
||||
#define GPMODEP_CDROM_PAGE 0x0000000000002000LL
|
||||
#define GPMODEP_CDROM_AUDIO_PAGE 0x0000000000004000LL
|
||||
#define GPMODEP_CAPABILITIES_PAGE 0x0000040000000000LL
|
||||
#define GPMODEP_IOMEGA_PAGE 0x0000800000000000LL
|
||||
#define GPMODEP_UNK_VENDOR_PAGE 0x0001000000000000LL
|
||||
#define GPMODEP_ALL_PAGES 0x8000000000000000LL
|
||||
|
||||
/* SCSI Status Codes */
|
||||
#define SCSI_STATUS_OK 0
|
||||
#define SCSI_STATUS_CHECK_CONDITION 2
|
||||
#define SCSI_STATUS_OK 0
|
||||
#define SCSI_STATUS_CHECK_CONDITION 2
|
||||
|
||||
/* SCSI Sense Keys */
|
||||
#define SENSE_NONE 0
|
||||
#define SENSE_NOT_READY 2
|
||||
#define SENSE_ILLEGAL_REQUEST 5
|
||||
#define SENSE_UNIT_ATTENTION 6
|
||||
#define SENSE_NONE 0
|
||||
#define SENSE_NOT_READY 2
|
||||
#define SENSE_ILLEGAL_REQUEST 5
|
||||
#define SENSE_UNIT_ATTENTION 6
|
||||
|
||||
/* SCSI Additional Sense Codes */
|
||||
#define ASC_NONE 0x00
|
||||
#define ASC_AUDIO_PLAY_OPERATION 0x00
|
||||
#define ASC_NOT_READY 0x04
|
||||
#define ASC_ILLEGAL_OPCODE 0x20
|
||||
#define ASC_LBA_OUT_OF_RANGE 0x21
|
||||
#define ASC_INV_FIELD_IN_CMD_PACKET 0x24
|
||||
#define ASC_INV_LUN 0x25
|
||||
#define ASC_INV_FIELD_IN_PARAMETER_LIST 0x26
|
||||
#define ASC_WRITE_PROTECTED 0x27
|
||||
#define ASC_MEDIUM_MAY_HAVE_CHANGED 0x28
|
||||
#define ASC_CAPACITY_DATA_CHANGED 0x2A
|
||||
#define ASC_INCOMPATIBLE_FORMAT 0x30
|
||||
#define ASC_MEDIUM_NOT_PRESENT 0x3a
|
||||
#define ASC_DATA_PHASE_ERROR 0x4b
|
||||
#define ASC_ILLEGAL_MODE_FOR_THIS_TRACK 0x64
|
||||
#define ASC_NONE 0x00
|
||||
#define ASC_AUDIO_PLAY_OPERATION 0x00
|
||||
#define ASC_NOT_READY 0x04
|
||||
#define ASC_ILLEGAL_OPCODE 0x20
|
||||
#define ASC_LBA_OUT_OF_RANGE 0x21
|
||||
#define ASC_INV_FIELD_IN_CMD_PACKET 0x24
|
||||
#define ASC_INV_LUN 0x25
|
||||
#define ASC_INV_FIELD_IN_PARAMETER_LIST 0x26
|
||||
#define ASC_WRITE_PROTECTED 0x27
|
||||
#define ASC_MEDIUM_MAY_HAVE_CHANGED 0x28
|
||||
#define ASC_CAPACITY_DATA_CHANGED 0x2A
|
||||
#define ASC_INCOMPATIBLE_FORMAT 0x30
|
||||
#define ASC_MEDIUM_NOT_PRESENT 0x3a
|
||||
#define ASC_DATA_PHASE_ERROR 0x4b
|
||||
#define ASC_ILLEGAL_MODE_FOR_THIS_TRACK 0x64
|
||||
|
||||
#define ASCQ_NONE 0x00
|
||||
#define ASCQ_UNIT_IN_PROCESS_OF_BECOMING_READY 0x01
|
||||
#define ASCQ_INITIALIZING_COMMAND_REQUIRED 0x02
|
||||
#define ASCQ_CAPACITY_DATA_CHANGED 0x09
|
||||
#define ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS 0x11
|
||||
#define ASCQ_AUDIO_PLAY_OPERATION_PAUSED 0x12
|
||||
#define ASCQ_AUDIO_PLAY_OPERATION_COMPLETED 0x13
|
||||
#define ASCQ_NONE 0x00
|
||||
#define ASCQ_UNIT_IN_PROCESS_OF_BECOMING_READY 0x01
|
||||
#define ASCQ_INITIALIZING_COMMAND_REQUIRED 0x02
|
||||
#define ASCQ_CAPACITY_DATA_CHANGED 0x09
|
||||
#define ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS 0x11
|
||||
#define ASCQ_AUDIO_PLAY_OPERATION_PAUSED 0x12
|
||||
#define ASCQ_AUDIO_PLAY_OPERATION_COMPLETED 0x13
|
||||
|
||||
/* Tell RISC OS that we have a 4x CD-ROM drive (600kb/sec data, 706kb/sec raw).
|
||||
Not that it means anything */
|
||||
#define CDROM_SPEED 706 /* 0x2C2 */
|
||||
#define CDROM_SPEED 706 /* 0x2C2 */
|
||||
|
||||
#define BUFFER_SIZE (256*1024)
|
||||
#define BUFFER_SIZE (256 * 1024)
|
||||
|
||||
#define RW_DELAY (TIMER_USEC * 500)
|
||||
#define RW_DELAY (TIMER_USEC * 500)
|
||||
|
||||
/* Some generally useful CD-ROM information */
|
||||
#define CD_MINS 75 /* max. minutes per CD */
|
||||
#define CD_SECS 60 /* seconds per minute */
|
||||
#define CD_FRAMES 75 /* frames per second */
|
||||
#define CD_FRAMESIZE 2048 /* bytes per frame, "cooked" mode */
|
||||
#define CD_MAX_BYTES (CD_MINS * CD_SECS * CD_FRAMES * CD_FRAMESIZE)
|
||||
#define CD_MAX_SECTORS (CD_MAX_BYTES / 512)
|
||||
#define CD_MINS 75 /* max. minutes per CD */
|
||||
#define CD_SECS 60 /* seconds per minute */
|
||||
#define CD_FRAMES 75 /* frames per second */
|
||||
#define CD_FRAMESIZE 2048 /* bytes per frame, "cooked" mode */
|
||||
#define CD_MAX_BYTES (CD_MINS * CD_SECS * CD_FRAMES * CD_FRAMESIZE)
|
||||
#define CD_MAX_SECTORS (CD_MAX_BYTES / 512)
|
||||
|
||||
/* Event notification classes for GET EVENT STATUS NOTIFICATION */
|
||||
#define GESN_NO_EVENTS 0
|
||||
#define GESN_OPERATIONAL_CHANGE 1
|
||||
#define GESN_POWER_MANAGEMENT 2
|
||||
#define GESN_EXTERNAL_REQUEST 3
|
||||
#define GESN_MEDIA 4
|
||||
#define GESN_MULTIPLE_HOSTS 5
|
||||
#define GESN_DEVICE_BUSY 6
|
||||
#define GESN_NO_EVENTS 0
|
||||
#define GESN_OPERATIONAL_CHANGE 1
|
||||
#define GESN_POWER_MANAGEMENT 2
|
||||
#define GESN_EXTERNAL_REQUEST 3
|
||||
#define GESN_MEDIA 4
|
||||
#define GESN_MULTIPLE_HOSTS 5
|
||||
#define GESN_DEVICE_BUSY 6
|
||||
|
||||
/* Event codes for MEDIA event status notification */
|
||||
#define MEC_NO_CHANGE 0
|
||||
#define MEC_EJECT_REQUESTED 1
|
||||
#define MEC_NEW_MEDIA 2
|
||||
#define MEC_MEDIA_REMOVAL 3 /* only for media changers */
|
||||
#define MEC_MEDIA_CHANGED 4 /* only for media changers */
|
||||
#define MEC_BG_FORMAT_COMPLETED 5 /* MRW or DVD+RW b/g format completed */
|
||||
#define MEC_BG_FORMAT_RESTARTED 6 /* MRW or DVD+RW b/g format restarted */
|
||||
#define MS_TRAY_OPEN 1
|
||||
#define MS_MEDIA_PRESENT 2
|
||||
#define MEC_NO_CHANGE 0
|
||||
#define MEC_EJECT_REQUESTED 1
|
||||
#define MEC_NEW_MEDIA 2
|
||||
#define MEC_MEDIA_REMOVAL 3 /* only for media changers */
|
||||
#define MEC_MEDIA_CHANGED 4 /* only for media changers */
|
||||
#define MEC_BG_FORMAT_COMPLETED 5 /* MRW or DVD+RW b/g format completed */
|
||||
#define MEC_BG_FORMAT_RESTARTED 6 /* MRW or DVD+RW b/g format restarted */
|
||||
#define MS_TRAY_OPEN 1
|
||||
#define MS_MEDIA_PRESENT 2
|
||||
|
||||
/*
|
||||
* The MMC values are not IDE specific and might need to be moved
|
||||
@@ -225,85 +220,85 @@
|
||||
*/
|
||||
|
||||
/* Profile list from MMC-6 revision 1 table 91 */
|
||||
#define MMC_PROFILE_NONE 0x0000
|
||||
#define MMC_PROFILE_CD_ROM 0x0008
|
||||
#define MMC_PROFILE_CD_R 0x0009
|
||||
#define MMC_PROFILE_CD_RW 0x000A
|
||||
#define MMC_PROFILE_DVD_ROM 0x0010
|
||||
#define MMC_PROFILE_DVD_R_SR 0x0011
|
||||
#define MMC_PROFILE_DVD_RAM 0x0012
|
||||
#define MMC_PROFILE_DVD_RW_RO 0x0013
|
||||
#define MMC_PROFILE_DVD_RW_SR 0x0014
|
||||
#define MMC_PROFILE_DVD_R_DL_SR 0x0015
|
||||
#define MMC_PROFILE_DVD_R_DL_JR 0x0016
|
||||
#define MMC_PROFILE_DVD_RW_DL 0x0017
|
||||
#define MMC_PROFILE_DVD_DDR 0x0018
|
||||
#define MMC_PROFILE_DVD_PLUS_RW 0x001A
|
||||
#define MMC_PROFILE_DVD_PLUS_R 0x001B
|
||||
#define MMC_PROFILE_DVD_PLUS_RW_DL 0x002A
|
||||
#define MMC_PROFILE_DVD_PLUS_R_DL 0x002B
|
||||
#define MMC_PROFILE_BD_ROM 0x0040
|
||||
#define MMC_PROFILE_BD_R_SRM 0x0041
|
||||
#define MMC_PROFILE_BD_R_RRM 0x0042
|
||||
#define MMC_PROFILE_BD_RE 0x0043
|
||||
#define MMC_PROFILE_HDDVD_ROM 0x0050
|
||||
#define MMC_PROFILE_HDDVD_R 0x0051
|
||||
#define MMC_PROFILE_HDDVD_RAM 0x0052
|
||||
#define MMC_PROFILE_HDDVD_RW 0x0053
|
||||
#define MMC_PROFILE_HDDVD_R_DL 0x0058
|
||||
#define MMC_PROFILE_HDDVD_RW_DL 0x005A
|
||||
#define MMC_PROFILE_INVALID 0xFFFF
|
||||
#define MMC_PROFILE_NONE 0x0000
|
||||
#define MMC_PROFILE_CD_ROM 0x0008
|
||||
#define MMC_PROFILE_CD_R 0x0009
|
||||
#define MMC_PROFILE_CD_RW 0x000A
|
||||
#define MMC_PROFILE_DVD_ROM 0x0010
|
||||
#define MMC_PROFILE_DVD_R_SR 0x0011
|
||||
#define MMC_PROFILE_DVD_RAM 0x0012
|
||||
#define MMC_PROFILE_DVD_RW_RO 0x0013
|
||||
#define MMC_PROFILE_DVD_RW_SR 0x0014
|
||||
#define MMC_PROFILE_DVD_R_DL_SR 0x0015
|
||||
#define MMC_PROFILE_DVD_R_DL_JR 0x0016
|
||||
#define MMC_PROFILE_DVD_RW_DL 0x0017
|
||||
#define MMC_PROFILE_DVD_DDR 0x0018
|
||||
#define MMC_PROFILE_DVD_PLUS_RW 0x001A
|
||||
#define MMC_PROFILE_DVD_PLUS_R 0x001B
|
||||
#define MMC_PROFILE_DVD_PLUS_RW_DL 0x002A
|
||||
#define MMC_PROFILE_DVD_PLUS_R_DL 0x002B
|
||||
#define MMC_PROFILE_BD_ROM 0x0040
|
||||
#define MMC_PROFILE_BD_R_SRM 0x0041
|
||||
#define MMC_PROFILE_BD_R_RRM 0x0042
|
||||
#define MMC_PROFILE_BD_RE 0x0043
|
||||
#define MMC_PROFILE_HDDVD_ROM 0x0050
|
||||
#define MMC_PROFILE_HDDVD_R 0x0051
|
||||
#define MMC_PROFILE_HDDVD_RAM 0x0052
|
||||
#define MMC_PROFILE_HDDVD_RW 0x0053
|
||||
#define MMC_PROFILE_HDDVD_R_DL 0x0058
|
||||
#define MMC_PROFILE_HDDVD_RW_DL 0x005A
|
||||
#define MMC_PROFILE_INVALID 0xFFFF
|
||||
|
||||
#define SCSI_ONLY 32
|
||||
#define ATAPI_ONLY 16
|
||||
#define IMPLEMENTED 8
|
||||
#define NONDATA 4
|
||||
#define CHECK_READY 2
|
||||
#define ALLOW_UA 1
|
||||
#define SCSI_ONLY 32
|
||||
#define ATAPI_ONLY 16
|
||||
#define IMPLEMENTED 8
|
||||
#define NONDATA 4
|
||||
#define CHECK_READY 2
|
||||
#define ALLOW_UA 1
|
||||
|
||||
#define MSFtoLBA(m,s,f) ((((m * 60) + s) * 75) + f)
|
||||
#define MSFtoLBA(m, s, f) ((((m * 60) + s) * 75) + f)
|
||||
|
||||
#define MSG_COMMAND_COMPLETE 0x00
|
||||
#define MSG_COMMAND_COMPLETE 0x00
|
||||
|
||||
#define BUS_DBP 0x01
|
||||
#define BUS_SEL 0x02
|
||||
#define BUS_IO 0x04
|
||||
#define BUS_CD 0x08
|
||||
#define BUS_MSG 0x10
|
||||
#define BUS_REQ 0x20
|
||||
#define BUS_BSY 0x40
|
||||
#define BUS_RST 0x80
|
||||
#define BUS_ACK 0x200
|
||||
#define BUS_ATN 0x200
|
||||
#define BUS_ARB 0x8000
|
||||
#define BUS_SETDATA(val) ((uint32_t)val << 16)
|
||||
#define BUS_GETDATA(val) ((val >> 16) & 0xff)
|
||||
#define BUS_DATAMASK 0xff0000
|
||||
#define BUS_DBP 0x01
|
||||
#define BUS_SEL 0x02
|
||||
#define BUS_IO 0x04
|
||||
#define BUS_CD 0x08
|
||||
#define BUS_MSG 0x10
|
||||
#define BUS_REQ 0x20
|
||||
#define BUS_BSY 0x40
|
||||
#define BUS_RST 0x80
|
||||
#define BUS_ACK 0x200
|
||||
#define BUS_ATN 0x200
|
||||
#define BUS_ARB 0x8000
|
||||
#define BUS_SETDATA(val) ((uint32_t) val << 16)
|
||||
#define BUS_GETDATA(val) ((val >> 16) & 0xff)
|
||||
#define BUS_DATAMASK 0xff0000
|
||||
|
||||
#define BUS_IDLE (1 << 31)
|
||||
#define BUS_IDLE (1 << 31)
|
||||
|
||||
#define PHASE_IDLE 0x00
|
||||
#define PHASE_COMMAND 0x01
|
||||
#define PHASE_DATA_IN 0x02
|
||||
#define PHASE_DATA_OUT 0x03
|
||||
#define PHASE_DATA_IN_DMA 0x04
|
||||
#define PHASE_DATA_OUT_DMA 0x05
|
||||
#define PHASE_COMPLETE 0x06
|
||||
#define PHASE_ERROR 0x80
|
||||
#define PHASE_NONE 0xff
|
||||
#define PHASE_IDLE 0x00
|
||||
#define PHASE_COMMAND 0x01
|
||||
#define PHASE_DATA_IN 0x02
|
||||
#define PHASE_DATA_OUT 0x03
|
||||
#define PHASE_DATA_IN_DMA 0x04
|
||||
#define PHASE_DATA_OUT_DMA 0x05
|
||||
#define PHASE_COMPLETE 0x06
|
||||
#define PHASE_ERROR 0x80
|
||||
#define PHASE_NONE 0xff
|
||||
|
||||
#define SCSI_PHASE_DATA_OUT 0
|
||||
#define SCSI_PHASE_DATA_IN BUS_IO
|
||||
#define SCSI_PHASE_COMMAND BUS_CD
|
||||
#define SCSI_PHASE_STATUS (BUS_CD | BUS_IO)
|
||||
#define SCSI_PHASE_MESSAGE_OUT (BUS_MSG | BUS_CD)
|
||||
#define SCSI_PHASE_MESSAGE_IN (BUS_MSG | BUS_CD | BUS_IO)
|
||||
#define SCSI_PHASE_DATA_OUT 0
|
||||
#define SCSI_PHASE_DATA_IN BUS_IO
|
||||
#define SCSI_PHASE_COMMAND BUS_CD
|
||||
#define SCSI_PHASE_STATUS (BUS_CD | BUS_IO)
|
||||
#define SCSI_PHASE_MESSAGE_OUT (BUS_MSG | BUS_CD)
|
||||
#define SCSI_PHASE_MESSAGE_IN (BUS_MSG | BUS_CD | BUS_IO)
|
||||
|
||||
#define MODE_SELECT_PHASE_IDLE 0
|
||||
#define MODE_SELECT_PHASE_HEADER 1
|
||||
#define MODE_SELECT_PHASE_BLOCK_DESC 2
|
||||
#define MODE_SELECT_PHASE_PAGE_HEADER 3
|
||||
#define MODE_SELECT_PHASE_PAGE 4
|
||||
#define MODE_SELECT_PHASE_IDLE 0
|
||||
#define MODE_SELECT_PHASE_HEADER 1
|
||||
#define MODE_SELECT_PHASE_BLOCK_DESC 2
|
||||
#define MODE_SELECT_PHASE_PAGE_HEADER 3
|
||||
#define MODE_SELECT_PHASE_PAGE 4
|
||||
|
||||
typedef struct {
|
||||
uint8_t pages[0x40][0x40];
|
||||
@@ -317,76 +312,77 @@ typedef struct scsi_common_s {
|
||||
void *p;
|
||||
|
||||
uint8_t *temp_buffer,
|
||||
atapi_cdb[16], /* This is atapi_cdb in ATAPI-supporting devices,
|
||||
and pad in SCSI-only devices. */
|
||||
current_cdb[16],
|
||||
sense[256];
|
||||
atapi_cdb[16], /* This is atapi_cdb in ATAPI-supporting devices,
|
||||
and pad in SCSI-only devices. */
|
||||
current_cdb[16],
|
||||
sense[256];
|
||||
|
||||
uint8_t status, phase,
|
||||
error, id,
|
||||
features, cur_lun,
|
||||
pad0, pad1;
|
||||
error, id,
|
||||
features, cur_lun,
|
||||
pad0, pad1;
|
||||
|
||||
uint16_t request_length, max_transfer_len;
|
||||
|
||||
int requested_blocks, packet_status,
|
||||
total_length, do_page_save,
|
||||
unit_attention, request_pos,
|
||||
old_len, media_status;
|
||||
total_length, do_page_save,
|
||||
unit_attention, request_pos,
|
||||
old_len, media_status;
|
||||
|
||||
uint32_t sector_pos, sector_len,
|
||||
packet_len, pos;
|
||||
packet_len, pos;
|
||||
|
||||
double callback;
|
||||
} scsi_common_t;
|
||||
|
||||
typedef struct {
|
||||
int32_t buffer_length;
|
||||
int32_t buffer_length;
|
||||
|
||||
uint8_t status, phase;
|
||||
uint16_t type;
|
||||
uint8_t status, phase;
|
||||
uint16_t type;
|
||||
|
||||
scsi_common_t *sc;
|
||||
|
||||
void (*command)(scsi_common_t *sc, uint8_t *cdb);
|
||||
void (*request_sense)(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_length);
|
||||
void (*reset)(scsi_common_t *sc);
|
||||
uint8_t (*phase_data_out)(scsi_common_t *sc);
|
||||
void (*command_stop)(scsi_common_t *sc);
|
||||
void (*command)(scsi_common_t *sc, uint8_t *cdb);
|
||||
void (*request_sense)(scsi_common_t *sc, uint8_t *buffer, uint8_t alloc_length);
|
||||
void (*reset)(scsi_common_t *sc);
|
||||
uint8_t (*phase_data_out)(scsi_common_t *sc);
|
||||
void (*command_stop)(scsi_common_t *sc);
|
||||
} scsi_device_t;
|
||||
|
||||
/* These are based on the INQUIRY values. */
|
||||
#define SCSI_NONE 0x0060
|
||||
#define SCSI_FIXED_DISK 0x0000
|
||||
#define SCSI_REMOVABLE_DISK 0x8000
|
||||
#define SCSI_NONE 0x0060
|
||||
#define SCSI_FIXED_DISK 0x0000
|
||||
#define SCSI_REMOVABLE_DISK 0x8000
|
||||
#define SCSI_REMOVABLE_CDROM 0x8005
|
||||
|
||||
extern scsi_device_t scsi_devices[SCSI_BUS_MAX][SCSI_ID_MAX];
|
||||
#ifdef EMU_SCSI_H
|
||||
extern scsi_device_t scsi_devices[SCSI_BUS_MAX][SCSI_ID_MAX];
|
||||
#endif /* EMU_SCSI_H */
|
||||
|
||||
extern int cdrom_add_error_and_subchannel(uint8_t *b, int real_sector_type);
|
||||
extern int cdrom_LBAtoMSF_accurate(void);
|
||||
|
||||
extern int cdrom_add_error_and_subchannel(uint8_t *b, int real_sector_type);
|
||||
extern int cdrom_LBAtoMSF_accurate(void);
|
||||
extern int mode_select_init(uint8_t command, uint16_t pl_length, uint8_t do_save);
|
||||
extern int mode_select_terminate(int force);
|
||||
extern int mode_select_write(uint8_t val);
|
||||
|
||||
extern int mode_select_init(uint8_t command, uint16_t pl_length, uint8_t do_save);
|
||||
extern int mode_select_terminate(int force);
|
||||
extern int mode_select_write(uint8_t val);
|
||||
extern uint8_t *scsi_device_sense(scsi_device_t *dev);
|
||||
extern double scsi_device_get_callback(scsi_device_t *dev);
|
||||
extern void scsi_device_request_sense(scsi_device_t *dev, uint8_t *buffer,
|
||||
uint8_t alloc_length);
|
||||
extern void scsi_device_reset(scsi_device_t *dev);
|
||||
extern int scsi_device_present(scsi_device_t *dev);
|
||||
extern int scsi_device_valid(scsi_device_t *dev);
|
||||
extern int scsi_device_cdb_length(scsi_device_t *dev);
|
||||
extern void scsi_device_command_phase0(scsi_device_t *dev, uint8_t *cdb);
|
||||
extern void scsi_device_command_phase1(scsi_device_t *dev);
|
||||
extern void scsi_device_command_stop(scsi_device_t *dev);
|
||||
extern void scsi_device_identify(scsi_device_t *dev, uint8_t lun);
|
||||
extern void scsi_device_close_all(void);
|
||||
extern void scsi_device_init(void);
|
||||
|
||||
extern uint8_t *scsi_device_sense(scsi_device_t *dev);
|
||||
extern double scsi_device_get_callback(scsi_device_t *dev);
|
||||
extern void scsi_device_request_sense(scsi_device_t *dev, uint8_t *buffer,
|
||||
uint8_t alloc_length);
|
||||
extern void scsi_device_reset(scsi_device_t *dev);
|
||||
extern int scsi_device_present(scsi_device_t *dev);
|
||||
extern int scsi_device_valid(scsi_device_t *dev);
|
||||
extern int scsi_device_cdb_length(scsi_device_t *dev);
|
||||
extern void scsi_device_command_phase0(scsi_device_t *dev, uint8_t *cdb);
|
||||
extern void scsi_device_command_phase1(scsi_device_t *dev);
|
||||
extern void scsi_device_command_stop(scsi_device_t *dev);
|
||||
extern void scsi_device_identify(scsi_device_t *dev, uint8_t lun);
|
||||
extern void scsi_device_close_all(void);
|
||||
extern void scsi_device_init(void);
|
||||
extern void scsi_reset(void);
|
||||
extern uint8_t scsi_get_bus(void);
|
||||
|
||||
extern void scsi_reset(void);
|
||||
extern uint8_t scsi_get_bus(void);
|
||||
|
||||
#endif /*SCSI_DEVICE_H*/
|
||||
#endif /*SCSI_DEVICE_H*/
|
||||
|
||||
@@ -13,7 +13,7 @@
|
||||
*/
|
||||
|
||||
#ifndef SCSI_DISK_H
|
||||
# define SCSI_DISK_H
|
||||
#define SCSI_DISK_H
|
||||
|
||||
typedef struct {
|
||||
mode_sense_pages_t ms_pages_saved;
|
||||
@@ -21,34 +21,32 @@ typedef struct {
|
||||
hard_disk_t *drv;
|
||||
|
||||
uint8_t *temp_buffer,
|
||||
pad[16], /* This is atapi_cdb in ATAPI-supporting devices,
|
||||
and pad in SCSI-only devices. */
|
||||
current_cdb[16],
|
||||
sense[256];
|
||||
pad[16], /* This is atapi_cdb in ATAPI-supporting devices,
|
||||
and pad in SCSI-only devices. */
|
||||
current_cdb[16],
|
||||
sense[256];
|
||||
|
||||
uint8_t status, phase,
|
||||
error, id,
|
||||
pad0, cur_lun,
|
||||
pad1, pad2;
|
||||
error, id,
|
||||
pad0, cur_lun,
|
||||
pad1, pad2;
|
||||
|
||||
uint16_t request_length, pad4;
|
||||
|
||||
int requested_blocks, packet_status,
|
||||
total_length, do_page_save,
|
||||
unit_attention, pad5,
|
||||
pad6, pad7;
|
||||
total_length, do_page_save,
|
||||
unit_attention, pad5,
|
||||
pad6, pad7;
|
||||
|
||||
uint32_t sector_pos, sector_len,
|
||||
packet_len, pos;
|
||||
packet_len, pos;
|
||||
|
||||
double callback;
|
||||
} scsi_disk_t;
|
||||
|
||||
|
||||
extern scsi_disk_t *scsi_disk[HDD_NUM];
|
||||
|
||||
|
||||
extern void scsi_disk_hard_reset(void);
|
||||
extern void scsi_disk_close(void);
|
||||
extern void scsi_disk_hard_reset(void);
|
||||
extern void scsi_disk_close(void);
|
||||
|
||||
#endif /*SCSI_DISK_H*/
|
||||
|
||||
@@ -22,7 +22,7 @@
|
||||
*/
|
||||
|
||||
#ifndef SCSI_NCR5380_H
|
||||
# define SCSI_NCR5380_H
|
||||
#define SCSI_NCR5380_H
|
||||
|
||||
extern const device_t scsi_lcs6821n_device;
|
||||
extern const device_t scsi_rt1000b_device;
|
||||
@@ -34,4 +34,4 @@ extern const device_t scsi_ls2000_device;
|
||||
extern const device_t scsi_scsiat_device;
|
||||
#endif
|
||||
|
||||
#endif /*SCSI_NCR5380_H*/
|
||||
#endif /*SCSI_NCR5380_H*/
|
||||
|
||||
@@ -23,7 +23,7 @@
|
||||
*/
|
||||
|
||||
#ifndef SCSI_NCR53C8XX_H
|
||||
# define SCSI_NCR53C8XX_H
|
||||
#define SCSI_NCR53C8XX_H
|
||||
|
||||
extern const device_t ncr53c810_pci_device;
|
||||
extern const device_t ncr53c810_onboard_pci_device;
|
||||
@@ -33,5 +33,4 @@ extern const device_t ncr53c825a_pci_device;
|
||||
extern const device_t ncr53c860_pci_device;
|
||||
extern const device_t ncr53c875_pci_device;
|
||||
|
||||
|
||||
#endif /*SCSI_NCR53C8XX_H*/
|
||||
#endif /*SCSI_NCR53C8XX_H*/
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user