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Applied both mainline PCem commits;

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Fixed the RTL8029AS again (one of my "fixes" broke it);
RTL8029AS PCI register 4 is now written to;
Added incomplete (and currently commented out) emulation of the AWE64 PCI;
Replaced sector-based floppy emulation with more accurate code.
This commit is contained in:
OBattler
2016-08-15 01:34:46 +02:00
parent 2cf962445f
commit 1433d9a073
53 changed files with 2335 additions and 1828 deletions
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113
src/codegen_x86.c
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@@ -491,29 +491,6 @@ void codegen_flush()
return;
}
static int opcode_needs_tempc[256] =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, /*00*/
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*10*/
0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, /*20*/
0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, /*30*/
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*40*/
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*50*/
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*60*/
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*70*/
1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, /*80*/
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*90*/
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*a0*/
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*b0*/
1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, /*c0*/
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*d0*/
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*e0*/
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*f0*/
};
static int opcode_conditional_jump[256] =
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, /*00*/
@@ -592,7 +569,7 @@ void codegen_debug()
static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc)
{
if (!mod && rm == 6)
if (!cpu_mod && cpu_rm == 6)
{
addbyte(0xC7); /*MOVL $0,(ssegs)*/
addbyte(0x05);
@@ -602,35 +579,35 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat,
}
else
{
switch (mod)
switch (cpu_mod)
{
case 0:
addbyte(0xa1); /*MOVL *mod1add[0][rm], %eax*/
addlong((uint32_t)mod1add[0][rm]);
addbyte(0x03); /*ADDL *mod1add[1][rm], %eax*/
addbyte(0xa1); /*MOVL *mod1add[0][cpu_rm], %eax*/
addlong((uint32_t)mod1add[0][cpu_rm]);
addbyte(0x03); /*ADDL *mod1add[1][cpu_rm], %eax*/
addbyte(0x05);
addlong((uint32_t)mod1add[1][rm]);
addlong((uint32_t)mod1add[1][cpu_rm]);
break;
case 1:
addbyte(0xb8); /*MOVL ,%eax*/
addlong((uint32_t)(int8_t)(rmdat >> 8));// pc++;
addbyte(0x03); /*ADDL *mod1add[0][rm], %eax*/
addbyte(0x03); /*ADDL *mod1add[0][cpu_rm], %eax*/
addbyte(0x05);
addlong((uint32_t)mod1add[0][rm]);
addbyte(0x03); /*ADDL *mod1add[1][rm], %eax*/
addlong((uint32_t)mod1add[0][cpu_rm]);
addbyte(0x03); /*ADDL *mod1add[1][cpu_rm], %eax*/
addbyte(0x05);
addlong((uint32_t)mod1add[1][rm]);
addlong((uint32_t)mod1add[1][cpu_rm]);
(*op_pc)++;
break;
case 2:
addbyte(0xb8); /*MOVL ,%eax*/
addlong((fetchdat >> 8) & 0xffff);// pc++;
addbyte(0x03); /*ADDL *mod1add[0][rm], %eax*/
addbyte(0x03); /*ADDL *mod1add[0][cpu_rm], %eax*/
addbyte(0x05);
addlong((uint32_t)mod1add[0][rm]);
addbyte(0x03); /*ADDL *mod1add[1][rm], %eax*/
addlong((uint32_t)mod1add[0][cpu_rm]);
addbyte(0x03); /*ADDL *mod1add[1][cpu_rm], %eax*/
addbyte(0x05);
addlong((uint32_t)mod1add[1][rm]);
addlong((uint32_t)mod1add[1][cpu_rm]);
(*op_pc) += 2;
break;
}
@@ -639,7 +616,7 @@ static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat,
addbyte(0xa3);
addlong((uint32_t)&eaaddr);
if (mod1seg[rm] == &ss && !op_ssegs)
if (mod1seg[cpu_rm] == &ss && !op_ssegs)
op_ea_seg = &_ss;
}
return op_ea_seg;
@@ -649,12 +626,12 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat,
{
uint32_t new_eaaddr;
if (rm == 4)
if (cpu_rm == 4)
{
uint8_t sib = fetchdat >> 8;
(*op_pc)++;
switch (mod)
switch (cpu_mod)
{
case 0:
if ((sib & 7) == 5)
@@ -690,12 +667,12 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat,
(*op_pc) += 4;
break;
}
if (stack_offset && (sib & 7) == 4 && (mod || (sib & 7) != 5)) /*ESP*/
if (stack_offset && (sib & 7) == 4 && (cpu_mod || (sib & 7) != 5)) /*ESP*/
{
addbyte(0x05);
addlong(stack_offset);
}
if (((sib & 7) == 4 || (mod && (sib & 7) == 5)) && !op_ssegs)
if (((sib & 7) == 4 || (cpu_mod && (sib & 7) == 5)) && !op_ssegs)
op_ea_seg = &_ss;
if (((sib >> 3) & 7) != 4)
{
@@ -728,7 +705,7 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat,
}
else
{
if (!mod && rm == 5)
if (!cpu_mod && cpu_rm == 5)
{
new_eaaddr = fastreadl(cs + (*op_pc) + 1);
addbyte(0xC7); /*MOVL $new_eaaddr,(eaaddr)*/
@@ -740,15 +717,15 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat,
}
addbyte(0x8b); /*MOVL regs[sib&7].l, %eax*/
addbyte(0x45);
addbyte((uintptr_t)&cpu_state.regs[rm].l - (uintptr_t)&cpu_state);
// addbyte(0xa1); /*MOVL regs[rm].l, %eax*/
// addlong((uint32_t)&cpu_state.regs[rm].l);
eaaddr = cpu_state.regs[rm].l;
if (mod)
addbyte((uintptr_t)&cpu_state.regs[cpu_rm].l - (uintptr_t)&cpu_state);
// addbyte(0xa1); /*MOVL regs[cpu_rm].l, %eax*/
// addlong((uint32_t)&cpu_state.regs[cpu_rm].l);
eaaddr = cpu_state.regs[cpu_rm].l;
if (cpu_mod)
{
if (rm == 5 && !op_ssegs)
if (cpu_rm == 5 && !op_ssegs)
op_ea_seg = &_ss;
if (mod == 1)
if (cpu_mod == 1)
{
addbyte(0x05);
addlong((uint32_t)(int8_t)(fetchdat >> 8));
@@ -978,16 +955,6 @@ generate_call:
op = op_table[((opcode >> opcode_shift) | op_32) & opcode_mask];
// if (output)
// pclog("Generate call at %08X %02X %08X %02X %08X %08X %08X %08X %08X %02X %02X %02X %02X\n", &codeblock[block_current][block_pos], opcode, new_pc, ram[old_pc], EAX, EBX, ECX, EDX, ESI, ram[0x7bd2+6],ram[0x7bd2+7],ram[0x7bd2+8],ram[0x7bd2+9]);
if (opcode_needs_tempc[opcode])
{
addbyte(0xa1); /*MOVL (flags), %eax*/
addlong((uint32_t)&flags);
addbyte(0x83); /*ANDL $1, %eax*/
addbyte(0xe0);
addbyte(0x01);
addbyte(0xa3); /*MOVL %eax, (tempc)*/
addlong((uint32_t)&tempc);
}
if (op_ssegs != last_ssegs)
{
last_ssegs = op_ssegs;
@@ -1006,27 +973,19 @@ generate_call:
if (op_table == x86_dynarec_opcodes && opcode == 0x8f) /*POP*/
stack_offset = (op_32 & 0x100) ? 4 : 2;
mod = (fetchdat >> 6) & 3;
reg = (fetchdat >> 3) & 7;
rm = fetchdat & 7;
cpu_mod = (fetchdat >> 6) & 3;
cpu_reg = (fetchdat >> 3) & 7;
cpu_rm = fetchdat & 7;
addbyte(0xC7); /*MOVL $mod,(mod)*/
addbyte(0x05);
addlong((uint32_t)&mod);
addlong(mod);
addbyte(0xC7); /*MOVL $reg,(reg)*/
addbyte(0x05);
addlong((uint32_t)&reg);
addlong(reg);
addbyte(0xC7); /*MOVL $rm,(rm)*/
addbyte(0x05);
addlong((uint32_t)&rm);
addlong(rm);
addbyte(0xC7); /*MOVL $rm | mod | reg,(rm_mod_reg_data)*/
addbyte(0x45);
addbyte((uintptr_t)&cpu_state.rm_data.rm_mod_reg_data - (uintptr_t)&cpu_state);
addlong(cpu_rm | (cpu_mod << 8) | (cpu_reg << 16));
op_pc += pc_off;
if (mod != 3 && !(op_32 & 0x200))
if (cpu_mod != 3 && !(op_32 & 0x200))
op_ea_seg = codegen_generate_ea_16_long(op_ea_seg, fetchdat, op_ssegs, &op_pc);
if (mod != 3 && (op_32 & 0x200))
if (cpu_mod != 3 && (op_32 & 0x200))
op_ea_seg = codegen_generate_ea_32_long(op_ea_seg, fetchdat, op_ssegs, &op_pc, stack_offset);
op_pc -= pc_off;
}