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Applied both mainline PCem commits;

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Fixed the RTL8029AS again (one of my "fixes" broke it);
RTL8029AS PCI register 4 is now written to;
Added incomplete (and currently commented out) emulation of the AWE64 PCI;
Replaced sector-based floppy emulation with more accurate code.
This commit is contained in:
OBattler
2016-08-15 01:34:46 +02:00
parent 2cf962445f
commit 1433d9a073
53 changed files with 2335 additions and 1828 deletions
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40
src/x86_ops_bit.h
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@@ -4,10 +4,10 @@ static int opBT_w_r_a16(uint32_t fetchdat)
uint16_t temp;
fetch_ea_16(fetchdat);
eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = 0;
eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0;
temp = geteaw(); if (abrt) return 1;
flags_rebuild();
if (temp & (1 << (cpu_state.regs[reg].w & 15))) flags |= C_FLAG;
if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG;
else flags &= ~C_FLAG;
CLOCK_CYCLES(3);
@@ -18,10 +18,10 @@ static int opBT_w_r_a32(uint32_t fetchdat)
uint16_t temp;
fetch_ea_32(fetchdat);
eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = 0;
eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = 0;
temp = geteaw(); if (abrt) return 1;
flags_rebuild();
if (temp & (1 << (cpu_state.regs[reg].w & 15))) flags |= C_FLAG;
if (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) flags |= C_FLAG;
else flags &= ~C_FLAG;
CLOCK_CYCLES(3);
@@ -32,10 +32,10 @@ static int opBT_l_r_a16(uint32_t fetchdat)
uint32_t temp;
fetch_ea_16(fetchdat);
eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = 0;
eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0;
temp = geteal(); if (abrt) return 1;
flags_rebuild();
if (temp & (1 << (cpu_state.regs[reg].l & 31))) flags |= C_FLAG;
if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG;
else flags &= ~C_FLAG;
CLOCK_CYCLES(3);
@@ -46,10 +46,10 @@ static int opBT_l_r_a32(uint32_t fetchdat)
uint32_t temp;
fetch_ea_32(fetchdat);
eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = 0;
eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = 0;
temp = geteal(); if (abrt) return 1;
flags_rebuild();
if (temp & (1 << (cpu_state.regs[reg].l & 31))) flags |= C_FLAG;
if (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) flags |= C_FLAG;
else flags &= ~C_FLAG;
CLOCK_CYCLES(3);
@@ -63,10 +63,10 @@ static int opBT_l_r_a32(uint32_t fetchdat)
uint16_t temp; \
\
fetch_ea_16(fetchdat); \
eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = eal_w = 0; \
eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \
temp = geteaw(); if (abrt) return 1; \
tempc = (temp & (1 << (cpu_state.regs[reg].w & 15))) ? 1 : 0; \
temp operation (1 << (cpu_state.regs[reg].w & 15)); \
tempc = (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) ? 1 : 0; \
temp operation (1 << (cpu_state.regs[cpu_reg].w & 15)); \
seteaw(temp); if (abrt) return 1; \
flags_rebuild(); \
if (tempc) flags |= C_FLAG; \
@@ -81,10 +81,10 @@ static int opBT_l_r_a32(uint32_t fetchdat)
uint16_t temp; \
\
fetch_ea_32(fetchdat); \
eaaddr += ((cpu_state.regs[reg].w / 16) * 2); eal_r = eal_w = 0; \
eaaddr += ((cpu_state.regs[cpu_reg].w / 16) * 2); eal_r = eal_w = 0; \
temp = geteaw(); if (abrt) return 1; \
tempc = (temp & (1 << (cpu_state.regs[reg].w & 15))) ? 1 : 0; \
temp operation (1 << (cpu_state.regs[reg].w & 15)); \
tempc = (temp & (1 << (cpu_state.regs[cpu_reg].w & 15))) ? 1 : 0; \
temp operation (1 << (cpu_state.regs[cpu_reg].w & 15)); \
seteaw(temp); if (abrt) return 1; \
flags_rebuild(); \
if (tempc) flags |= C_FLAG; \
@@ -99,10 +99,10 @@ static int opBT_l_r_a32(uint32_t fetchdat)
uint32_t temp; \
\
fetch_ea_16(fetchdat); \
eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = eal_w = 0; \
eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \
temp = geteal(); if (abrt) return 1; \
tempc = (temp & (1 << (cpu_state.regs[reg].l & 31))) ? 1 : 0; \
temp operation (1 << (cpu_state.regs[reg].l & 31)); \
tempc = (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) ? 1 : 0; \
temp operation (1 << (cpu_state.regs[cpu_reg].l & 31)); \
seteal(temp); if (abrt) return 1; \
flags_rebuild(); \
if (tempc) flags |= C_FLAG; \
@@ -117,10 +117,10 @@ static int opBT_l_r_a32(uint32_t fetchdat)
uint32_t temp; \
\
fetch_ea_32(fetchdat); \
eaaddr += ((cpu_state.regs[reg].l / 32) * 4); eal_r = eal_w = 0; \
eaaddr += ((cpu_state.regs[cpu_reg].l / 32) * 4); eal_r = eal_w = 0; \
temp = geteal(); if (abrt) return 1; \
tempc = (temp & (1 << (cpu_state.regs[reg].l & 31))) ? 1 : 0; \
temp operation (1 << (cpu_state.regs[reg].l & 31)); \
tempc = (temp & (1 << (cpu_state.regs[cpu_reg].l & 31))) ? 1 : 0; \
temp operation (1 << (cpu_state.regs[cpu_reg].l & 31)); \
seteal(temp); if (abrt) return 1; \
flags_rebuild(); \
if (tempc) flags |= C_FLAG; \