Applied both mainline PCem commits;
Fixed the RTL8029AS again (one of my "fixes" broke it); RTL8029AS PCI register 4 is now written to; Added incomplete (and currently commented out) emulation of the AWE64 PCI; Replaced sector-based floppy emulation with more accurate code.
This commit is contained in:
@@ -100,13 +100,13 @@ static int opFF_w_a16(uint32_t fetchdat)
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temp = geteaw(); if (abrt) return 1;
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seteaw(temp + 1); if (abrt) return 1;
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setadd16nc(temp, 1);
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CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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break;
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case 0x08: /*DEC w*/
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temp = geteaw(); if (abrt) return 1;
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seteaw(temp - 1); if (abrt) return 1;
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setsub16nc(temp, 1);
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CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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break;
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case 0x10: /*CALL*/
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new_pc = geteaw(); if (abrt) return 1;
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@@ -114,7 +114,7 @@ static int opFF_w_a16(uint32_t fetchdat)
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((mod == 3) ? 7 : 10);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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break;
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case 0x18: /*CALL far*/
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new_pc = readmemw(easeg, eaaddr);
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@@ -128,7 +128,7 @@ static int opFF_w_a16(uint32_t fetchdat)
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((mod == 3) ? 7 : 10);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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break;
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case 0x28: /*JMP far*/
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oxpc = cpu_state.pc;
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@@ -141,7 +141,7 @@ static int opFF_w_a16(uint32_t fetchdat)
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case 0x30: /*PUSH w*/
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temp = geteaw(); if (abrt) return 1;
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PUSH_W(temp);
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CLOCK_CYCLES((mod == 3) ? 2 : 5);
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CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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break;
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default:
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@@ -165,13 +165,13 @@ static int opFF_w_a32(uint32_t fetchdat)
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temp = geteaw(); if (abrt) return 1;
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seteaw(temp + 1); if (abrt) return 1;
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setadd16nc(temp, 1);
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CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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break;
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case 0x08: /*DEC w*/
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temp = geteaw(); if (abrt) return 1;
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seteaw(temp - 1); if (abrt) return 1;
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setsub16nc(temp, 1);
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CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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break;
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case 0x10: /*CALL*/
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new_pc = geteaw(); if (abrt) return 1;
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@@ -179,7 +179,7 @@ static int opFF_w_a32(uint32_t fetchdat)
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((mod == 3) ? 7 : 10);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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break;
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case 0x18: /*CALL far*/
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new_pc = readmemw(easeg, eaaddr);
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@@ -193,7 +193,7 @@ static int opFF_w_a32(uint32_t fetchdat)
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((mod == 3) ? 7 : 10);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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break;
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case 0x28: /*JMP far*/
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oxpc = cpu_state.pc;
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@@ -206,7 +206,7 @@ static int opFF_w_a32(uint32_t fetchdat)
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case 0x30: /*PUSH w*/
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temp = geteaw(); if (abrt) return 1;
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PUSH_W(temp);
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CLOCK_CYCLES((mod == 3) ? 2 : 5);
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CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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break;
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default:
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@@ -231,13 +231,13 @@ static int opFF_l_a16(uint32_t fetchdat)
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temp = geteal(); if (abrt) return 1;
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seteal(temp + 1); if (abrt) return 1;
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setadd32nc(temp, 1);
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CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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break;
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case 0x08: /*DEC l*/
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temp = geteal(); if (abrt) return 1;
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seteal(temp - 1); if (abrt) return 1;
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setsub32nc(temp, 1);
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CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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break;
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case 0x10: /*CALL*/
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new_pc = geteal(); if (abrt) return 1;
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@@ -245,7 +245,7 @@ static int opFF_l_a16(uint32_t fetchdat)
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((mod == 3) ? 7 : 10);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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break;
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case 0x18: /*CALL far*/
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new_pc = readmeml(easeg, eaaddr);
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@@ -259,7 +259,7 @@ static int opFF_l_a16(uint32_t fetchdat)
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((mod == 3) ? 7 : 10);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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break;
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case 0x28: /*JMP far*/
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oxpc = cpu_state.pc;
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@@ -272,7 +272,7 @@ static int opFF_l_a16(uint32_t fetchdat)
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case 0x30: /*PUSH l*/
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temp = geteal(); if (abrt) return 1;
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PUSH_L(temp);
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CLOCK_CYCLES((mod == 3) ? 2 : 5);
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CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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break;
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default:
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@@ -296,13 +296,13 @@ static int opFF_l_a32(uint32_t fetchdat)
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temp = geteal(); if (abrt) return 1;
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seteal(temp + 1); if (abrt) return 1;
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setadd32nc(temp, 1);
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CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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break;
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case 0x08: /*DEC l*/
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temp = geteal(); if (abrt) return 1;
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seteal(temp - 1); if (abrt) return 1;
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setsub32nc(temp, 1);
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CLOCK_CYCLES((mod == 3) ? timing_rr : timing_mm);
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CLOCK_CYCLES((cpu_mod == 3) ? timing_rr : timing_mm);
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break;
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case 0x10: /*CALL*/
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new_pc = geteal(); if (abrt) return 1;
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@@ -310,7 +310,7 @@ static int opFF_l_a32(uint32_t fetchdat)
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((mod == 3) ? 7 : 10);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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break;
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case 0x18: /*CALL far*/
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new_pc = readmeml(easeg, eaaddr);
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@@ -324,7 +324,7 @@ static int opFF_l_a32(uint32_t fetchdat)
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cpu_state.pc = new_pc;
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CPU_BLOCK_END();
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if (is486) CLOCK_CYCLES(5);
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else CLOCK_CYCLES((mod == 3) ? 7 : 10);
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else CLOCK_CYCLES((cpu_mod == 3) ? 7 : 10);
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break;
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case 0x28: /*JMP far*/
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oxpc = cpu_state.pc;
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@@ -337,7 +337,7 @@ static int opFF_l_a32(uint32_t fetchdat)
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case 0x30: /*PUSH l*/
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temp = geteal(); if (abrt) return 1;
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PUSH_L(temp);
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CLOCK_CYCLES((mod == 3) ? 2 : 5);
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CLOCK_CYCLES((cpu_mod == 3) ? 2 : 5);
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break;
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default:
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