net_eeprom_nmc93cxx.c: Proper logging

This commit is contained in:
Cacodemon345
2023-07-31 01:43:47 +06:00
parent 96d2de125f
commit 2d3d99aec0

View File

@@ -48,7 +48,23 @@ struct nmc93cxx_eeprom_t {
typedef struct nmc93cxx_eeprom_t nmc93cxx_eeprom_t;
#define logout pclog
#ifdef ENABLE_NMC93CXX_EEPROM_LOG
int nmc93cxx_eeprom_do_log = ENABLE_NMC93CXX_EEPROM_LOG;
static void
nmc93cxx_eeprom_log(int lvl, const char *fmt, ...)
{
va_list ap;
if (nmc93cxx_eeprom_do_log >= lvl) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define nmc93cxx_eeprom_log(lvl, fmt, ...)
#endif
static const char *opstring[] = {
"extended", "write", "read", "erase"
@@ -114,12 +130,12 @@ void nmc93cxx_eeprom_write(nmc93cxx_eeprom_t *eeprom, int eecs, int eesk, int ee
uint16_t address = eeprom->address;
uint8_t command = eeprom->command;
logout("CS=%u SK=%u DI=%u DO=%u, tick = %u\n",
nmc93cxx_eeprom_log(1, "CS=%u SK=%u DI=%u DO=%u, tick = %u\n",
eecs, eesk, eedi, eedo, tick);
if (!eeprom->eecs && eecs) {
/* Start chip select cycle. */
logout("Cycle start, waiting for 1st start bit (0)\n");
nmc93cxx_eeprom_log(1, "Cycle start, waiting for 1st start bit (0)\n");
tick = 0;
command = 0x0;
address = 0x0;
@@ -154,20 +170,20 @@ void nmc93cxx_eeprom_write(nmc93cxx_eeprom_t *eeprom, int eecs, int eesk, int ee
if (tick == 0) {
/* Wait for 1st start bit. */
if (eedi == 0) {
logout("Got correct 1st start bit, waiting for 2nd start bit (1)\n");
nmc93cxx_eeprom_log(1, "Got correct 1st start bit, waiting for 2nd start bit (1)\n");
tick++;
} else {
logout("wrong 1st start bit (is 1, should be 0)\n");
nmc93cxx_eeprom_log(1, "wrong 1st start bit (is 1, should be 0)\n");
tick = 2;
//~ assert(!"wrong start bit");
}
} else if (tick == 1) {
/* Wait for 2nd start bit. */
if (eedi != 0) {
logout("Got correct 2nd start bit, getting command + address\n");
nmc93cxx_eeprom_log(1, "Got correct 2nd start bit, getting command + address\n");
tick++;
} else {
logout("1st start bit is longer than needed\n");
nmc93cxx_eeprom_log(1, "1st start bit is longer than needed\n");
}
} else if (tick < 2 + 2) {
/* Got 2 start bits, transfer 2 opcode bits. */
@@ -181,7 +197,7 @@ void nmc93cxx_eeprom_write(nmc93cxx_eeprom_t *eeprom, int eecs, int eesk, int ee
tick++;
address = ((address << 1) | eedi);
if (tick == 2 + 2 + eeprom->addrbits) {
logout("%s command, address = 0x%02x (value 0x%04x)\n",
nmc93cxx_eeprom_log(1, "%s command, address = 0x%02x (value 0x%04x)\n",
opstring[command], address, eeprom->contents[address]);
if (command == 2) {
eedo = 0;
@@ -191,17 +207,17 @@ void nmc93cxx_eeprom_write(nmc93cxx_eeprom_t *eeprom, int eecs, int eesk, int ee
/* Command code in upper 2 bits of address. */
switch (address >> (eeprom->addrbits - 2)) {
case 0:
logout("write disable command\n");
nmc93cxx_eeprom_log(1, "write disable command\n");
eeprom->writable = 0;
break;
case 1:
logout("write all command\n");
nmc93cxx_eeprom_log(1, "write all command\n");
break;
case 2:
logout("erase all command\n");
nmc93cxx_eeprom_log(1, "erase all command\n");
break;
case 3:
logout("write enable command\n");
nmc93cxx_eeprom_log(1, "write enable command\n");
eeprom->writable = 1;
break;
}
@@ -220,7 +236,7 @@ void nmc93cxx_eeprom_write(nmc93cxx_eeprom_t *eeprom, int eecs, int eesk, int ee
eeprom->data <<= 1;
eeprom->data += eedi;
} else {
logout("additional unneeded tick, not processed\n");
nmc93cxx_eeprom_log(1, "additional unneeded tick, not processed\n");
}
}
/* Save status of EEPROM. */