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IDE hard disks and ATAPI CD-ROMS with DMA support now report as supporting UDMA modes, for the sake of future-proofing things;

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Changed the CD-ROM capabilities MODE SENSE page a bit;
Applied the S3 Trio and SVGA changes from PCem;
Fixed saving of the video renderer settings;
Fixed DirectDraw full screen;
Fixed crashes on soft reset in full screen.
This commit is contained in:
OBattler
2017-10-25 02:17:27 +02:00
parent 1efbf0463a
commit 45204350b4
22 changed files with 269 additions and 191 deletions
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24
src/cdrom/cdrom.c
View File

@@ -234,7 +234,7 @@ const uint8_t cdrom_mode_sense_pages_default[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } },
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0 },
{ GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 },
{ 0, 0 },
@@ -277,7 +277,7 @@ const uint8_t cdrom_mode_sense_pages_default[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } },
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0 },
{ GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 },
{ 0, 0 },
@@ -320,7 +320,7 @@ const uint8_t cdrom_mode_sense_pages_default[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } },
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0 },
{ GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 },
{ 0, 0 },
@@ -363,7 +363,7 @@ const uint8_t cdrom_mode_sense_pages_default[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } }
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } }
};
uint8_t cdrom_mode_sense_pages_changeable[CDROM_NUM][0x40][0x40] =
@@ -410,7 +410,7 @@ uint8_t cdrom_mode_sense_pages_changeable[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } },
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0 },
{ GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 },
{ 0, 0 },
@@ -453,7 +453,7 @@ uint8_t cdrom_mode_sense_pages_changeable[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } },
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0 },
{ GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 },
{ 0, 0 },
@@ -496,7 +496,7 @@ uint8_t cdrom_mode_sense_pages_changeable[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } },
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0 },
{ GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 },
{ 0, 0 },
@@ -539,7 +539,7 @@ uint8_t cdrom_mode_sense_pages_changeable[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } }
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } }
};
uint8_t cdrom_mode_sense_pages_saved[CDROM_NUM][0x40][0x40] =
@@ -586,7 +586,7 @@ uint8_t cdrom_mode_sense_pages_saved[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } },
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0 },
{ GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 },
{ 0, 0 },
@@ -629,7 +629,7 @@ uint8_t cdrom_mode_sense_pages_saved[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } },
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0 },
{ GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 },
{ 0, 0 },
@@ -672,7 +672,7 @@ uint8_t cdrom_mode_sense_pages_saved[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } },
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } },
{ { 0, 0 },
{ GPMODE_R_W_ERROR_PAGE, 6, 0, 5, 0, 0, 0, 0 },
{ 0, 0 },
@@ -715,7 +715,7 @@ uint8_t cdrom_mode_sense_pages_saved[CDROM_NUM][0x40][0x40] =
{ 0, 0 },
{ 0, 0 },
{ 0, 0 },
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } }
{ GPMODE_CAPABILITIES_PAGE, 0x14, 0x3B, 0, 0x71, 0x60, 0x29, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0, 0, 0 } }
};
#ifdef ENABLE_CDROM_LOG

28
src/config.c
View File

@@ -1168,33 +1168,17 @@ save_general(void)
char *cat = "General";
char temp[512];
char *va_name;
config_set_int(cat, "vid_resize", vid_resize);
if (vid_resize == 0)
config_delete_var(cat, "vid_resize");
if (vid_api == 1) {
va_name = plat_vidapi_name();
if (!strcmp(va_name, "default")) {
config_delete_var(cat, "vid_renderer");
} else switch(vid_api) {
case 0:
config_set_string(cat, "vid_renderer", "ddraw");
break;
case 1:
default:
config_set_string(cat, "vid_renderer", "d3d9");
break;
#ifdef USE_VNC
case 2:
config_set_string(cat, "vid_renderer", "vnc");
break;
#endif
#ifdef USE_RDP
case 3:
config_set_string(cat, "vid_renderer", "rdp");
break;
#endif
} else {
config_set_string(cat, "vid_renderer", va_name);
}
if (video_fullscreen_scale == 0)

66
src/disk/hdc_ide.c
View File

@@ -103,7 +103,8 @@ int cur_ide[5];
#ifdef ENABLE_IDE_LOG
int ide_do_log = ENABLE_IDE_LOG;
// int ide_do_log = ENABLE_IDE_LOG;
int ide_do_log = 0;
#endif
static void ide_log(const char *format, ...)
@@ -424,22 +425,25 @@ static void ide_identify(IDE *ide)
ide->buffer[59] = ide->blocksize ? (ide->blocksize | 0x100) : 0;
if (PCI && (ide->board < 2) && (hdd[ide->hdd_num].bus == HDD_BUS_IDE_PIO_AND_DMA))
if (ide->buffer[49] & (1 << 8))
{
ide->buffer[52] = 2 << 8; /*DMA timing mode*/
ide->buffer[53] |= 2;
ide->buffer[53] |= 6;
ide->buffer[62] = 7;
ide->buffer[63] = 7;
ide->buffer[88] = 7;
if (ide->mdma_mode != -1)
{
d = (ide->mdma_mode & 0xff);
d <<= 8;
if (ide->mdma_mode & 0x100)
if ((ide->mdma_mode & 0x100) == 0x200)
ide->buffer[88] |= d;
else if ((ide->mdma_mode & 0x100) == 0x100)
ide->buffer[63] |= d;
else
ide->buffer[62] |= d;
pclog(" IDENTIFY DMA Mode: %04X, %04X\n", ide->buffer[62], ide->buffer[63]);
ide_log(" IDENTIFY DMA Mode: %04X, %04X\n", ide->buffer[62], ide->buffer[63]);
}
ide->buffer[65] = 120;
ide->buffer[66] = 120;
@@ -478,18 +482,21 @@ static void ide_atapi_identify(IDE *ide)
{
ide->buffer[49] |= 0x100; /* DMA supported */
ide->buffer[52] = 2 << 8; /*DMA timing mode*/
ide->buffer[53] = 3;
ide->buffer[53] = 7;
ide->buffer[62] = 7;
ide->buffer[63] = 7;
ide->buffer[88] = 7;
if (ide->mdma_mode != -1)
{
d = (ide->mdma_mode & 0xff);
d <<= 8;
if (ide->mdma_mode & 0x100)
if ((ide->mdma_mode & 0x100) == 0x200)
ide->buffer[88] |= d;
else if ((ide->mdma_mode & 0x100) == 0x100)
ide->buffer[63] |= d;
else
ide->buffer[62] |= d;
pclog("PIDENTIFY DMA Mode: %04X, %04X\n", ide->buffer[62], ide->buffer[63]);
ide_log("PIDENTIFY DMA Mode: %04X, %04X\n", ide->buffer[62], ide->buffer[63]);
}
ide->buffer[65] = 0xb4;
ide->buffer[66] = 0xb4;
@@ -615,7 +622,7 @@ static int ide_set_features(IDE *ide)
ide_log("Features code %02X\n", features);
pclog("IDE %02X: Set features: %02X, %02X\n", ide->channel, features, features_data);
ide_log("IDE %02X: Set features: %02X, %02X\n", ide->channel, features, features_data);
switch(features)
{
@@ -633,7 +640,7 @@ static int ide_set_features(IDE *ide)
return 0;
}
ide->mdma_mode = -1;
pclog("IDE %02X: Setting DPIO mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode);
ide_log("IDE %02X: Setting DPIO mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode);
break;
case 0x01: /* PIO mode */
@@ -642,7 +649,7 @@ static int ide_set_features(IDE *ide)
return 0;
}
ide->mdma_mode = -1;
pclog("IDE %02X: Setting PIO mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode);
ide_log("IDE %02X: Setting PIO mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode);
break;
case 0x02: /* Singleword DMA mode */
@@ -651,7 +658,7 @@ static int ide_set_features(IDE *ide)
return 0;
}
ide->mdma_mode = (1 << submode);
pclog("IDE %02X: Setting SDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode);
ide_log("IDE %02X: Setting SDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode);
break;
case 0x04: /* Multiword DMA mode */
@@ -660,7 +667,16 @@ static int ide_set_features(IDE *ide)
return 0;
}
ide->mdma_mode = (1 << submode) | 0x100;
pclog("IDE %02X: Setting MDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode);
ide_log("IDE %02X: Setting MDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode);
break;
case 0x08: /* Ultra DMA mode */
if (!PCI || !dma || (ide->board >= 2) || (submode > 2))
{
return 0;
}
ide->mdma_mode = (1 << submode) | 0x200;
ide_log("IDE %02X: Setting UDMA mode: %02X, %08X\n", ide->channel, submode, ide->mdma_mode);
break;
default:
@@ -889,6 +905,7 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
case 0x1F1: /* Features */
if (ide_drive_is_cdrom(ide))
{
ide_log("ATAPI transfer mode: %s\n", (val & 1) ? "DMA" : "PIO");
cdrom[atapi_cdrom_drives[cur_ide[ide_board]]].features = val;
}
ide->cylprecomp = val;
@@ -1756,12 +1773,12 @@ void callbackide(int ide_board)
case WIN_READ_DMA_ALT:
if (ide_drive_is_cdrom(ide) || (ide->board >= 2))
{
pclog("IDE %i: DMA read aborted (bad device or board)\n", ide->channel);
ide_log("IDE %i: DMA read aborted (bad device or board)\n", ide->channel);
goto abort_cmd;
}
if (!ide->specify_success)
{
pclog("IDE %i: DMA read aborted (SPECIFY failed)\n", ide->channel);
ide_log("IDE %i: DMA read aborted (SPECIFY failed)\n", ide->channel);
goto id_not_found;
}
@@ -1782,14 +1799,13 @@ void callbackide(int ide_board)
{
if (ide_bus_master_read(ide_board, ide->sector_buffer, ide->sector_pos * 512))
{
// idecallback[ide_board]=6LL*IDE_TIME; /*DMA not performed, try again later*/
pclog("IDE %i: DMA read aborted (failed)\n", ide->channel);
ide_log("IDE %i: DMA read aborted (failed)\n", ide->channel);
goto abort_cmd;
}
else
{
/*DMA successful*/
pclog("IDE %i: DMA read successful\n", ide->channel);
ide_log("IDE %i: DMA read successful\n", ide->channel);
ide->atastat = READY_STAT | DSC_STAT;
@@ -1797,7 +1813,7 @@ void callbackide(int ide_board)
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0);
}
} else {
pclog("IDE %i: DMA read aborted (no bus master)\n", ide->channel);
ide_log("IDE %i: DMA read aborted (no bus master)\n", ide->channel);
goto abort_cmd;
}
@@ -1884,12 +1900,12 @@ void callbackide(int ide_board)
case WIN_WRITE_DMA_ALT:
if (ide_drive_is_cdrom(ide) || (ide_board >= 2))
{
pclog("IDE %i: DMA write aborted (bad device type or board)\n", ide->channel);
ide_log("IDE %i: DMA write aborted (bad device type or board)\n", ide->channel);
goto abort_cmd;
}
if (!ide->specify_success)
{
pclog("IDE %i: DMA write aborted (SPECIFY failed)\n", ide->channel);
ide_log("IDE %i: DMA write aborted (SPECIFY failed)\n", ide->channel);
goto id_not_found;
}
@@ -1902,14 +1918,13 @@ void callbackide(int ide_board)
if (ide_bus_master_write(ide_board, ide->sector_buffer, ide->sector_pos * 512))
{
pclog("IDE %i: DMA write aborted (failed)\n", ide->channel);
// idecallback[ide_board]=6LL*IDE_TIME; /*DMA not performed, try again later*/
ide_log("IDE %i: DMA write aborted (failed)\n", ide->channel);
goto abort_cmd;
}
else
{
/*DMA successful*/
pclog("IDE %i: DMA write successful\n", ide->channel);
ide_log("IDE %i: DMA write successful\n", ide->channel);
hdd_image_write(ide->hdd_num, ide_get_sector(ide), ide->sector_pos, ide->sector_buffer);
@@ -1919,7 +1934,7 @@ void callbackide(int ide_board)
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0);
}
} else {
pclog("IDE %i: DMA write aborted (no bus master)\n", ide->channel);
ide_log("IDE %i: DMA write aborted (no bus master)\n", ide->channel);
goto abort_cmd;
}
@@ -2046,6 +2061,7 @@ void callbackide(int ide_board)
{
ide_atapi_identify(ide);
ide->pos = 0;
cdrom[cdrom_id].phase = 2;
cdrom[cdrom_id].pos = 0;
cdrom[cdrom_id].error = 0;
cdrom[cdrom_id].status = DRQ_STAT | READY_STAT | DSC_STAT;

4
src/pc.c
View File

@@ -196,7 +196,7 @@ set_screen_size(int x, int y)
int efscrnsz_y;
/* Make sure we keep usable values. */
#if 0
#if 1
pclog("SetScreenSize(%d, %d) resize=%d\n", x, y, vid_resize);
#endif
if (x < 320) x = 320;
@@ -968,7 +968,7 @@ pc_thread(void *param)
if (leave_fullscreen_flag) {
#if 1
pclog("Leaving full-screen mode..\n");
// plat_fullscreen(0);
plat_setfullscreen(0);
#else
SendMessage(hwndMain, WM_LEAVEFULLSCREEN, 0, 0);
#endif

4
src/piix.c
View File

@@ -607,7 +607,7 @@ void piix_reset(void)
card_piix_ide[0x00] = 0x86; card_piix_ide[0x01] = 0x80; /*Intel*/
card_piix_ide[0x02] = 0x30; card_piix_ide[0x03] = 0x12; /*82371FB (PIIX)*/
card_piix_ide[0x04] = 0x00; card_piix_ide[0x05] = 0x00;
card_piix_ide[0x04] = 0x07; card_piix_ide[0x05] = 0x00;
card_piix_ide[0x06] = 0x80; card_piix_ide[0x07] = 0x02;
card_piix_ide[0x08] = 0x00;
card_piix_ide[0x09] = 0x80; card_piix_ide[0x0a] = 0x01; card_piix_ide[0x0b] = 0x01;
@@ -650,7 +650,7 @@ void piix3_reset(void)
card_piix_ide[0x00] = 0x86; card_piix_ide[0x01] = 0x80; /*Intel*/
card_piix_ide[0x02] = 0x10; card_piix_ide[0x03] = 0x70; /*82371SB (PIIX3)*/
card_piix_ide[0x04] = 0x00; card_piix_ide[0x05] = 0x00;
card_piix_ide[0x04] = 0x07; card_piix_ide[0x05] = 0x00;
card_piix_ide[0x06] = 0x80; card_piix_ide[0x07] = 0x02;
card_piix_ide[0x08] = 0x00;
card_piix_ide[0x09] = 0x80; card_piix_ide[0x0a] = 0x01; card_piix_ide[0x0b] = 0x01;

1
src/plat.h
View File

@@ -58,6 +58,7 @@ extern uint32_t plat_get_ticks(void);
extern void plat_delay_ms(uint32_t count);
extern void plat_pause(int p);
extern int plat_vidapi(char *name);
extern char * plat_vidapi_name(void);
extern int plat_setvid(int api);
extern void plat_setfullscreen(int on);
extern void plat_resize(int max_x, int max_y);

4
src/video/vid_ati_mach64.c
View File

@@ -480,11 +480,11 @@ void mach64_recalctimings(svga_t *svga)
break;
}
svga->vrammask = mach64->vram_mask;
svga->vram_display_mask = mach64->vram_mask;
}
else
{
svga->vrammask = (mach64->regs[0x36] & 0x01) ? mach64->vram_mask : 0x3ffff;
svga->vram_display_mask = (mach64->regs[0x36] & 0x01) ? mach64->vram_mask : 0x3ffff;
}
}

22
src/video/vid_cl_gd.c
View File

@@ -212,7 +212,7 @@ void clgd_out(uint16_t addr, uint8_t val, void *p)
{
if (svga->crtcreg == 0x1b)
{
svga->vrammask = (val & 2) ? (clgd->vram_size - 1) : 0x3ffff;
svga->vram_display_mask = (val & 2) ? (clgd->vram_size - 1) : 0x3ffff;
clgd->linear_mmio_mask = (val & 2) ? (clgd->vram_size - 256) : (0x40000 - 256);
}
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10)
@@ -526,9 +526,14 @@ void svga_write_mode45_8bpp(clgd_t *clgd, uint8_t mode, uint32_t offset, uint8_t
uint8_t *dst;
svga_t *svga = &clgd->svga;
dst = svga->vram + (offset &= svga->vrammask);
offset &= svga->decode_mask;
if (offset >= svga->vram_max)
return;
offset &= svga->vram_mask;
svga->changedvram[(offset &= svga->vrammask) >> 12] = changeframecount;
dst = &(svga->vram[offset]);
svga->changedvram[offset >> 12] = changeframecount;
for (x = 0; x < 8; x++)
{
@@ -552,9 +557,14 @@ void svga_write_mode45_16bpp(clgd_t *clgd, unsigned mode, unsigned offset, uint3
uint8_t *dst;
svga_t *svga = &clgd->svga;
dst = svga->vram + (offset &= svga->vrammask);
offset &= svga->decode_mask;
if (offset >= svga->vram_max)
return;
offset &= svga->vram_mask;
svga->changedvram[(offset &= svga->vrammask) >> 12] = changeframecount;
dst = &(svga->vram[offset]);
svga->changedvram[offset >> 12] = changeframecount;
for (x = 0; x < 8; x++)
{
@@ -883,7 +893,7 @@ void *clgd_common_init(wchar_t *romfn, uint8_t id)
// Seems the 5436 and 5446 BIOS'es never turn on that bit until it's actually needed,
// therefore they also don't turn it back off on 640x480x4bpp,
// therefore, we need to make sure the VRAM mask is correct at start.
svga->vrammask = (svga->crtc[0x1b] & 2) ? (clgd->vram_size - 1) : 0x3ffff;
svga->vram_display_mask = (svga->crtc[0x1b] & 2) ? (clgd->vram_size - 1) : 0x3ffff;
clgd->linear_mmio_mask = (svga->crtc[0x1b] & 2) ? (clgd->vram_size - 256) : (0x40000 - 256);
svga->seqregs[0x15] = clgd->vram_code;

4
src/video/vid_et4000w32.c
View File

@@ -550,7 +550,7 @@ void et4000w32p_mmu_write(uint32_t addr, uint8_t val, void *p)
}
else
{
if ((addr&0x1fff) + et4000->mmu.base[bank] < svga->vram_limit)
if ((addr&0x1fff) + et4000->mmu.base[bank] < svga->vram_max)
{
svga->vram[(addr & 0x1fff) + et4000->mmu.base[bank]] = val;
svga->changedvram[((addr & 0x1fff) + et4000->mmu.base[bank]) >> 12] = changeframecount;
@@ -609,7 +609,7 @@ uint8_t et4000w32p_mmu_read(uint32_t addr, void *p)
/*???*/
return temp;
}
if ((addr&0x1fff) + et4000->mmu.base[bank] >= svga->vram_limit)
if ((addr&0x1fff) + et4000->mmu.base[bank] >= svga->vram_max)
return 0xff;
return svga->vram[(addr&0x1fff) + et4000->mmu.base[bank]];

6
src/video/vid_nv_riva128.c
View File

@@ -2902,6 +2902,8 @@ void *riva128_init(device_t *info)
riva128_in, riva128_out,
NULL, NULL);
riva128->svga.decode_mask = 0x1fffff;
rom_init(&riva128->bios_rom, L"roms/video/nv_riva128/Diamond_V330_rev-e.vbi", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (PCI)
mem_mapping_disable(&riva128->bios_rom.mapping);
@@ -3151,6 +3153,8 @@ void *rivatnt_init(device_t *info)
riva128_in, riva128_out,
NULL, NULL);
riva128->svga.decode_mask = 0x1fffff;
rom_init(&riva128->bios_rom, L"roms/video/nv_riva128/NV4_diamond_revB.rom", 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL);
if (PCI)
mem_mapping_disable(&riva128->bios_rom.mapping);
@@ -3346,6 +3350,8 @@ void *rivatnt2_init(device_t *info)
riva128_in, riva128_out,
NULL, NULL);
riva128->svga.decode_mask = 0x1fffff;
switch(model)
{
case 0:

4
src/video/vid_oti067.c
View File

@@ -89,13 +89,13 @@ oti_out(uint16_t addr, uint8_t val, void *p)
oti->regs[oti->index] = val;
switch (oti->index) {
case 0xD:
svga->vrammask = (val & 0xc) ? oti->vram_mask : 0x3ffff;
svga->vram_display_mask = (val & 0xc) ? oti->vram_mask : 0x3ffff;
if ((val & 0x80) && oti->vram_size == 256)
mem_mapping_disable(&svga->mapping);
else
mem_mapping_enable(&svga->mapping);
if (!(val & 0x80))
svga->vrammask = 0x3ffff;
svga->vram_display_mask = 0x3ffff;
break;
case 0x11:

53
src/video/vid_s3.c
View File

@@ -807,7 +807,7 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
}
if (svga->seqaddr == 4) /*Chain-4 - update banking*/
{
if (val & 8 || (svga->crtc[0x31] & 8))
if (val & 8)
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
@@ -840,13 +840,9 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
{
case 0x31:
s3->ma_ext = (s3->ma_ext & 0x1c) | ((val & 0x30) >> 4);
if (svga->chain4 || (svga->crtc[0x31] & 8))
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
break;
case 0x32:
svga->vrammask = (val & 0x40) ? 0x3ffff : s3->vram_mask;
svga->vram_display_mask = (val & 0x40) ? 0x3ffff : s3->vram_mask;
break;
case 0x50:
@@ -867,14 +863,14 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
case 0x35:
s3->bank = (s3->bank & 0x70) | (val & 0xf);
if (svga->chain4 || (svga->crtc[0x31] & 8))
if (svga->chain4)
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
break;
case 0x51:
s3->bank = (s3->bank & 0x4f) | ((val & 0xc) << 2);
if (svga->chain4 || (svga->crtc[0x31] & 8))
if (svga->chain4)
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
@@ -882,7 +878,7 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
break;
case 0x6a:
s3->bank = val;
if (svga->chain4 || (svga->crtc[0x31] & 8))
if (svga->chain4)
svga->write_bank = svga->read_bank = s3->bank << 16;
else
svga->write_bank = svga->read_bank = s3->bank << 14;
@@ -1060,12 +1056,14 @@ void s3_updatemapping(s3_t *s3)
return;
}
if (svga->crtc[0x31] & 0x08)
/*Banked framebuffer*/
if (svga->crtc[0x31] & 0x08) /*Enhanced mode mappings*/
{
/* Enhanced mode forces 64kb at 0xa0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
}
else switch (svga->gdcreg[6] & 0xc) /*Banked framebuffer*/
else switch (svga->gdcreg[6] & 0xc) /*VGA mapping*/
{
case 0x0: /*128k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
@@ -1106,6 +1104,7 @@ void s3_updatemapping(s3_t *s3)
break;
}
s3->linear_base &= ~(s3->linear_size - 1);
svga->linear_base = s3->linear_base;
if (s3->linear_base == 0xa0000)
{
mem_mapping_disable(&s3->linear_mapping);
@@ -2191,6 +2190,33 @@ static void *s3_init(device_t *info, wchar_t *bios_fn, int chip)
s3_hwcursor_draw,
NULL);
svga->decode_mask = (4 << 20) - 1;
switch (vram)
{
case 0: /*512kb*/
svga->vram_mask = (1 << 19) - 1;
svga->vram_max = 2 << 20;
break;
case 1: /*1MB*/
/*VRAM in first MB, mirrored in 2nd MB, 3rd and 4th MBs are open bus*/
svga->vram_mask = (1 << 20) - 1;
svga->vram_max = 2 << 20;
break;
case 2: default: /*2MB*/
/*VRAM in first 2 MB, 3rd and 4th MBs are open bus*/
svga->vram_mask = (2 << 20) - 1;
svga->vram_max = 2 << 20;
break;
case 4: /*4MB*/
svga->vram_mask = (4 << 20) - 1;
svga->vram_max = 4 << 20;
break;
case 8: /*4MB*/
svga->vram_mask = (8 << 20) - 1;
svga->vram_max = 8 << 20;
break;
}
if (info->flags & DEVICE_PCI)
svga->crtc[0x36] = 2 | (3 << 2) | (1 << 4) | (vram_sizes[vram] << 5);
else
@@ -2460,11 +2486,8 @@ static device_config_t s3_phoenix_trio32_config[] =
static device_config_t s3_phoenix_trio64_config[] =
{
{
"memory", "Memory size", CONFIG_SELECTION, "", 2,
"memory", "Memory size", CONFIG_SELECTION, "", 4,
{
{
"512 KB", 0
},
{
"1 MB", 1
},

6
src/video/vid_s3_virge.c
View File

@@ -381,7 +381,7 @@ static void s3_virge_out(uint16_t addr, uint8_t val, void *p)
break;
case 0x32:
if ((svga->crtc[0x67] & 0xc) != 0xc)
svga->vrammask = (val & 0x40) ? 0x3ffff : ((virge->memory_size << 20) - 1);
svga->vram_display_mask = (val & 0x40) ? 0x3ffff : ((virge->memory_size << 20) - 1);
s3_virge_update_irqs(virge);
break;
@@ -585,7 +585,7 @@ static void s3_virge_recalctimings(svga_t *svga)
svga->rowoffset = (svga->rowoffset * 3) / 4; /*Hack*/
}
}
svga->vrammask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : ((virge->memory_size << 20) - 1);
svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : ((virge->memory_size << 20) - 1);
}
else /*Streams mode*/
{
@@ -631,7 +631,7 @@ static void s3_virge_recalctimings(svga_t *svga)
svga->render = svga_render_32bpp_highres;
break;
}
svga->vrammask = (virge->memory_size << 20) - 1;
svga->vram_display_mask = (virge->memory_size << 20) - 1;
}
if (((svga->miscout >> 2) & 3) == 3)

144
src/video/vid_svga.c
View File

@@ -708,26 +708,12 @@ uint32_t svga_mask_addr(uint32_t addr, svga_t *svga)
{
limit_shift = 1;
}
if (svga->vrammask == (svga->vram_limit - 1))
{
return addr % (svga->vram_limit >> limit_shift);
}
else
{
return addr & (svga->vrammask >> limit_shift);
}
return addr % (svga->vram_display_mask >> limit_shift);
}
uint32_t svga_mask_changedaddr(uint32_t addr, svga_t *svga)
{
if (svga->vrammask == (svga->vram_limit - 1))
{
return addr % (svga->vram_limit >> 12);
}
else
{
return addr & (svga->vrammask >> 12);
}
return addr & (svga->vram_display_mask >> 12);
}
void svga_poll(void *p)
@@ -871,7 +857,7 @@ void svga_poll(void *p)
svga->fullchange = 2;
svga->blink++;
for (x = 0; x < (svga->vram_limit >> 12); x++)
for (x = 0; x < ((svga->vram_mask + 1) >> 12); x++)
{
if (svga->changedvram[x])
svga->changedvram[x]--;
@@ -1003,8 +989,10 @@ int svga_init(svga_t *svga, void *p, int memsize,
ext_vram = svga->vram;
ext_memsize = memsize;
#endif
svga->vram_limit = memsize;
svga->vrammask = memsize - 1;
svga->vram_max = memsize;
svga->vram_display_mask = memsize - 1;
svga->vram_mask = memsize - 1;
svga->decode_mask = 0x7fffff;
svga->changedvram = malloc(/*(memsize >> 12) << 1*/memsize >> 12);
svga->recalctimings_ex = recalctimings_ex;
svga->video_in = video_in;
@@ -1097,10 +1085,12 @@ void svga_write(uint32_t addr, uint8_t val, void *p)
addr<<=2;
}
if (addr >= svga->vram_limit)
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr = svga_mask_addr(addr, svga);
addr &= svga->vram_mask;
if (svga_output) pclog("%08X (%i, %i) %02X %i %i %i %02X\n", addr, addr & 1023, addr >> 10, val, writemask2, svga->writemode, svga->chain4, svga->gdcreg[8]);
svga->changedvram[addr >> 12] = changeframecount;
@@ -1251,7 +1241,7 @@ void svga_write(uint32_t addr, uint8_t val, void *p)
if (svga->render == svga_render_text_80_12)
{
FILE *f = fopen("hecon.dmp", "wb");
fwrite(svga->vram, 1, svga->vram_limit, f);
fwrite(svga->vram, 1, svga->vram_max, f);
fclose(f);
}
#endif
@@ -1268,15 +1258,18 @@ uint8_t svga_read(uint32_t addr, void *p)
cycles_lost += video_timing_b;
egareads++;
addr &= svga->banked_mask;
addr += svga->read_bank;
latch_addr = svga_mask_addr(addr << 2, svga);
latch_addr = (addr << 2) & svga->decode_mask;
if (svga->chain4 || svga->fb_only)
{
if (addr >= svga->vram_limit)
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return 0xff;
return svga->vram[svga_mask_addr(addr, svga)];
return svga->vram[addr & svga->vram_mask];
}
else if (svga->chain2_read)
{
@@ -1292,20 +1285,25 @@ uint8_t svga_read(uint32_t addr, void *p)
else
addr<<=2;
if (addr >= svga->vram_limit)
return 0xff;
addr &= svga->decode_mask;
addr = svga_mask_addr(addr, svga);
if (latch_addr < svga->vram_limit)
if (latch_addr >= svga->vram_max)
{
svga->la = svga->lb = svga->lc = svga->ld = 0xff;
}
else
{
latch_addr &= svga->vram_mask;
svga->la = svga->vram[latch_addr];
svga->lb = svga->vram[latch_addr | 0x1];
svga->lc = svga->vram[latch_addr | 0x2];
svga->ld = svga->vram[latch_addr | 0x3];
}
else
svga->la = svga->lb = svga->lc = svga->ld = 0xff;
if (addr >= svga->vram_max)
return 0xff;
addr &= svga->vram_mask;
if (svga->readmode)
{
@@ -1372,13 +1370,11 @@ void svga_write_linear(uint32_t addr, uint8_t val, void *p)
{
addr<<=2;
}
if ((gfxcard != GFX_RIVA128) && (gfxcard != GFX_RIVATNT) && (gfxcard != GFX_RIVATNT2))
{
addr &= 0x7fffff;
}
if (addr >= svga->vram_limit)
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
if (svga_output) pclog("%08X\n", addr);
addr &= svga->vram_mask;
svga->changedvram[addr >> 12]=changeframecount;
switch (svga->writemode)
@@ -1539,13 +1535,10 @@ uint8_t svga_read_linear(uint32_t addr, void *p)
if (svga->chain4 || svga->fb_only)
{
if ((gfxcard != GFX_RIVA128) && (gfxcard != GFX_RIVATNT) && (gfxcard != GFX_RIVATNT2))
{
addr &= 0x7fffff;
}
if (addr >= svga->vram_limit)
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return 0xff;
return svga->vram[addr];
return svga->vram[addr & svga->vram_mask];
}
else if (svga->chain2_read)
{
@@ -1561,14 +1554,13 @@ uint8_t svga_read_linear(uint32_t addr, void *p)
else
addr<<=2;
if ((gfxcard != GFX_RIVA128) && (gfxcard != GFX_RIVATNT) && (gfxcard != GFX_RIVATNT2))
{
addr &= 0x7fffff;
}
addr &= svga->decode_mask;
if (addr >= svga->vram_limit)
if (addr >= svga->vram_max)
return 0xff;
addr &= svga->vram_mask;
svga->la = svga->vram[addr];
svga->lb = svga->vram[addr | 0x1];
svga->lc = svga->vram[addr | 0x2];
@@ -1713,8 +1705,10 @@ void svga_writew(uint32_t addr, uint16_t val, void *p)
if (svga_output) pclog("svga_writew: %05X ", addr);
addr = (addr & svga->banked_mask) + svga->write_bank;
if ((!svga->extvram) && (addr >= 0x10000)) return;
if (addr >= svga->vram_limit)
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr &= svga->vram_mask;
if (svga_output) pclog("%08X (%i, %i) %04X\n", addr, addr & 1023, addr >> 10, val);
svga->changedvram[addr >> 12] = changeframecount;
*(uint16_t *)&svga->vram[addr] = val;
@@ -1743,8 +1737,10 @@ void svga_writel(uint32_t addr, uint32_t val, void *p)
if (svga_output) pclog("svga_writel: %05X ", addr);
addr = (addr & svga->banked_mask) + svga->write_bank;
if ((!svga->extvram) && (addr >= 0x10000)) return;
if (addr >= svga->vram_limit)
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr &= svga->vram_mask;
if (svga_output) pclog("%08X (%i, %i) %08X\n", addr, addr & 1023, addr >> 10, val);
svga->changedvram[addr >> 12] = changeframecount;
@@ -1767,9 +1763,11 @@ uint16_t svga_readw(uint32_t addr, void *p)
addr = (addr & svga->banked_mask) + svga->read_bank;
if ((!svga->extvram) && (addr >= 0x10000)) return 0xffff;
if (addr >= svga->vram_limit) return 0xffff;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return 0xffff;
return *(uint16_t *)&svga->vram[addr];
return *(uint16_t *)&svga->vram[addr & svga->vram_mask];
}
uint32_t svga_readl(uint32_t addr, void *p)
@@ -1791,9 +1789,11 @@ uint32_t svga_readl(uint32_t addr, void *p)
addr = (addr & svga->banked_mask) + svga->read_bank;
if ((!svga->extvram) && (addr >= 0x10000)) return 0xffffffff;
if (addr >= svga->vram_limit) return 0xffffffff;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return 0xffffffff;
return *(uint32_t *)&svga->vram[addr];
return *(uint32_t *)&svga->vram[addr & svga->vram_mask];
}
void svga_writew_linear(uint32_t addr, uint16_t val, void *p)
@@ -1816,12 +1816,10 @@ void svga_writew_linear(uint32_t addr, uint16_t val, void *p)
if (svga_output) pclog("Write LFBw %08X %04X\n", addr, val);
addr -= svga->linear_base;
if ((gfxcard != GFX_RIVA128) && (gfxcard != GFX_RIVATNT) && (gfxcard != GFX_RIVATNT2))
{
addr &= 0x7fffff;
}
if (addr >= svga->vram_limit)
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr &= svga->vram_mask;
svga->changedvram[addr >> 12] = changeframecount;
*(uint16_t *)&svga->vram[addr] = val;
}
@@ -1848,12 +1846,10 @@ void svga_writel_linear(uint32_t addr, uint32_t val, void *p)
if (svga_output) pclog("Write LFBl %08X %08X\n", addr, val);
addr -= svga->linear_base;
if ((gfxcard != GFX_RIVA128) && (gfxcard != GFX_RIVATNT) && (gfxcard != GFX_RIVATNT2))
{
addr &= 0x7fffff;
}
if (addr >= svga->vram_limit)
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr &= svga->vram_mask;
svga->changedvram[addr >> 12] = changeframecount;
*(uint32_t *)&svga->vram[addr] = val;
}
@@ -1873,13 +1869,11 @@ uint16_t svga_readw_linear(uint32_t addr, void *p)
cycles_lost += video_timing_w;
addr -= svga->linear_base;
if ((gfxcard != GFX_RIVA128) && (gfxcard != GFX_RIVATNT) && (gfxcard != GFX_RIVATNT2))
{
addr &= 0x7fffff;
}
if (addr >= svga->vram_limit) return 0xffff;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return 0xffff;
return *(uint16_t *)&svga->vram[addr];
return *(uint16_t *)&svga->vram[addr & svga->vram_mask];
}
uint32_t svga_readl_linear(uint32_t addr, void *p)
@@ -1897,13 +1891,11 @@ uint32_t svga_readl_linear(uint32_t addr, void *p)
cycles_lost += video_timing_l;
addr -= svga->linear_base;
if ((gfxcard != GFX_RIVA128) && (gfxcard != GFX_RIVATNT) && (gfxcard != GFX_RIVATNT2))
{
addr &= 0x7fffff;
}
if (addr >= svga->vram_limit) return 0xffffffff;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return 0xffffffff;
return *(uint32_t *)&svga->vram[addr];
return *(uint32_t *)&svga->vram[addr & svga->vram_mask];
}

15
src/video/vid_svga.h
View File

@@ -33,7 +33,18 @@ typedef struct svga_t
uint8_t miscout;
int vidclock;
uint32_t vram_limit;
/*The three variables below allow us to implement memory maps like that seen on a 1MB Trio64 :
0MB-1MB - VRAM
1MB-2MB - VRAM mirror
2MB-4MB - open bus
4MB-xMB - mirror of above
For the example memory map, decode_mask would be 4MB-1 (4MB address space), vram_max would be 2MB
(present video memory only responds to first 2MB), vram_mask would be 1MB-1 (video memory wraps at 1MB)
*/
uint32_t decode_mask;
uint32_t vram_max;
uint32_t vram_mask;
uint8_t la, lb, lc, ld;
@@ -91,7 +102,7 @@ typedef struct svga_t
uint8_t *vram;
uint8_t *changedvram;
int vrammask;
int vram_display_mask;
uint32_t banked_mask;
uint32_t write_bank, read_bank;

2
src/video/vid_tvga.c
View File

@@ -149,7 +149,7 @@ void tvga_out(uint16_t addr, uint8_t val, void *p)
switch (svga->crtcreg)
{
case 0x1e:
svga->vrammask = (val & 0x80) ? tvga->vram_mask : 0x3ffff;
svga->vram_display_mask = (val & 0x80) ? tvga->vram_mask : 0x3ffff;
break;
}
return;

12
src/win/win.c
View File

@@ -392,7 +392,9 @@ MainWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam)
#ifdef USE_RDP
case IDM_VID_RDP:
#endif
CheckMenuItem(hmenu, IDM_VID_DDRAW + vid_api, MF_UNCHECKED);
plat_setvid(LOWORD(wParam) - IDM_VID_DDRAW);
CheckMenuItem(hmenu, IDM_VID_DDRAW + vid_api, MF_CHECKED);
config_save();
break;
@@ -1048,6 +1050,9 @@ WinMain(HINSTANCE hInst, HINSTANCE hPrev, LPSTR lpszArg, int nFunsterStil)
device_force_redraw();
}
#endif
if (start_in_fullscreen) {
plat_setfullscreen(1);
}
/* Set up the current window size. */
plat_resize(scrnsz_x, scrnsz_y);
@@ -1140,6 +1145,9 @@ ui_window_title(wchar_t *s)
s = wTitle;
SetWindowText(hwndMain, s);
} else {
if (s == NULL)
s = wTitle;
}
return(s);
@@ -1344,8 +1352,8 @@ plat_delay_ms(uint32_t count)
void
plat_pause(int p)
{
static wchar_t oldtitle[128];
wchar_t title[128];
static wchar_t oldtitle[512];
wchar_t title[512];
/* If un-pausing, as the renderer if that's OK. */
if (p == 0)

2
src/win/win_d3d.cc
View File

@@ -240,7 +240,7 @@ static void blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
RECT r;
int yy;
if (y1 == y2)
if ((y1 == y2) || (h <= 0))
{
video_blit_complete();
return; /*Nothing to do*/

2
src/win/win_d3d_fs.cc
View File

@@ -312,7 +312,7 @@ static void blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
int yy;
double l = 0, t = 0, r = 0, b = 0;
if (y1 == y2)
if ((y1 == y2) || (h <= 0))
{
video_blit_complete();
return; /*Nothing to do*/

2
src/win/win_ddraw.cc
View File

@@ -182,7 +182,7 @@ blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
return; /*Nothing to do*/
}
if (h <= 0) {
if ((y1 == y2) || (h <= 0)) {
video_blit_complete();
return;
}

13
src/win/win_ddraw_fs.cc
View File

@@ -58,8 +58,8 @@ int ddraw_fs_init(HWND h)
if (FAILED(lpdd7->SetDisplayMode(ddraw_w, ddraw_h, 32, 0 ,0)))
return 0;
// memset(&ddsd, 0, sizeof(ddsd));
// ddsd.dwSize = sizeof(ddsd);
memset(&ddsd, 0, sizeof(ddsd));
ddsd.dwSize = sizeof(ddsd);
ddsd.dwFlags = DDSD_CAPS | DDSD_BACKBUFFERCOUNT;
ddsd.dwBackBufferCount = 1;
@@ -190,6 +190,11 @@ static void blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
return; /*Nothing to do*/
}
if ((y1 == y2) || (h <= 0)) {
video_blit_complete();
return;
}
memset(&ddsd, 0, sizeof(ddsd));
ddsd.dwSize = sizeof(ddsd);
@@ -206,9 +211,7 @@ static void blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
return;
}
for (yy = y1; yy < y2; yy++)
{
if ((y + yy) >= 0) memcpy((unsigned char*)ddsd.lpSurface + (yy * ddsd.lPitch), &(((uint32_t *)buffer32->line[y + yy])[x]), w * 4);
}
memcpy((void *)((uintptr_t)ddsd.lpSurface + (yy * ddsd.lPitch)), &(((uint32_t *)buffer32->line[y + yy])[x]), w * 4);
video_blit_complete();
lpdds_back->Unlock(NULL);

30
src/win/win_video.c
View File

@@ -104,7 +104,7 @@ plat_vidapi(char *name)
{
int i;
if (!strcasecmp(name, "default") || !strcasecmp(name, "system")) return(0);
if (!strcasecmp(name, "default") || !strcasecmp(name, "system")) return(1);
for (i=0; i<4; i++) {
if (vid_apis[0][i].name &&
@@ -112,7 +112,28 @@ plat_vidapi(char *name)
}
/* Default value. */
return(0);
return(1);
}
char *
plat_vidapi_name(void)
{
switch(vid_api) {
case 0:
return("ddraw");
case 1:
default:
return("default"); /* Direct3D is default. */
#ifdef USE_VNC
case 2:
return("vnc");
#endif
#ifdef USE_RDP
case 3:
return("rdp");
#endif
}
}
@@ -162,6 +183,7 @@ void
plat_setfullscreen(int on)
{
static int flag = 0;
HWND *hw;
/* Want off and already off? */
if (!on && !video_fullscreen) return;
@@ -190,10 +212,12 @@ plat_setfullscreen(int on)
/* Close the current mode, and open the new one. */
vid_apis[video_fullscreen][vid_api].close();
video_fullscreen = on;
vid_apis[video_fullscreen][vid_api].init(NULL);
hw = (video_fullscreen) ? &hwndMain : &hwndRender;
vid_apis[video_fullscreen][vid_api].init((void *) *hw);
flag = 0;
mouse_init();
leave_fullscreen_flag = 0;
/* Release video and make it redraw the screen. */
endblit();