C&T 69000: Rewrite the PCI register handling and intialize the registers to sane default, fixes the card's detection by the Windows 98 driver installer.
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OBattler
@@ -107,6 +107,7 @@ typedef struct chips_69000_t {
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uint8_t mm_regs[256], mm_index;
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uint8_t flat_panel_regs[256], flat_panel_index;
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uint8_t ext_regs[256], ext_index;
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uint8_t pci_regs[256];
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union {
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uint32_t mem_regs[4];
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@@ -2156,57 +2157,74 @@ static uint8_t
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chips_69000_pci_read(UNUSED(int func), int addr, void *priv)
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{
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chips_69000_t *chips = (chips_69000_t *) priv;
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uint8_t ret = 0x00;
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{
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switch (addr) {
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case 0x00:
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return 0x2C;
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case 0x01:
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return 0x10;
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case 0x02:
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return 0xC0;
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case 0x03:
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return 0x00;
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case 0x04:
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return (chips->pci_conf_status & 0b11100011) | 0x80;
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case 0x06:
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return 0x80;
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case 0x07:
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return 0x02;
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case 0x08:
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case 0x09:
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case 0x0a:
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return 0x00;
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case 0x0b:
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return 0x03;
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case 0x13:
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return chips->linear_mapping.base >> 24;
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case 0x30:
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return chips->pci_rom_enable & 0x1;
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case 0x31:
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return 0x0;
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case 0x32:
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return chips->rom_addr & 0xFF;
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case 0x33:
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return (chips->rom_addr & 0xFF00) >> 8;
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case 0x3c:
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return chips->pci_line_interrupt;
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case 0x3d:
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return 0x01;
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case 0x2C:
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case 0x2D:
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case 0x6C:
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case 0x6D:
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return (chips->subsys_vid >> ((addr & 1) * 8)) & 0xFF;
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case 0x2E:
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case 0x2F:
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case 0x6E:
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case 0x6F:
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return (chips->subsys_pid >> ((addr & 1) * 8)) & 0xFF;
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default:
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return 0x00;
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}
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switch (addr) {
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case 0x00:
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ret = 0x2c;
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break;
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case 0x01:
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ret = 0x10;
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break;
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case 0x02:
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ret = 0xc0;
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break;
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case 0x03:
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ret = 0x00;
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break;
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case 0x04:
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ret = (chips->pci_conf_status & 0x73) | 0x80;
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break;
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case 0x05:
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ret = chips->pci_regs[addr] & 0x01;
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break;
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case 0x06:
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ret = 0x80;
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break;
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case 0x07:
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ret = chips->pci_regs[addr] | 0x02;
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break;
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case 0x0b:
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ret = 0x03;
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break;
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case 0x13:
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ret = chips->linear_mapping.base >> 24;
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break;
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case 0x2c ... 0x2d:
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case 0x6c ... 0x6d:
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ret = chips->subsys_vid_b[addr & 1];
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break;
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case 0x2e ... 0x2f:
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case 0x6e ... 0x6f:
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ret = chips->subsys_pid_b[addr & 1];
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break;
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case 0x30:
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ret = chips->pci_rom_enable & 0x1;
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break;
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case 0x32:
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ret = chips->rom_addr & 0xff;
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break;
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case 0x33:
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ret = (chips->rom_addr & 0xff00) >> 8;
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break;
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case 0x3c:
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ret = chips->pci_line_interrupt;
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break;
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case 0x3d:
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ret = 0x01;
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break;
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default:
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break;
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}
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return ret;
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}
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static void
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@@ -2214,67 +2232,77 @@ chips_69000_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
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{
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chips_69000_t *chips = (chips_69000_t *) priv;
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{
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switch (addr) {
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case 0x04:
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{
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chips->pci_conf_status = val;
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io_removehandler(0x03c0, 0x0020, chips_69000_in, NULL, NULL, chips_69000_out, NULL, NULL, chips);
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mem_mapping_disable(&chips->linear_mapping);
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mem_mapping_disable(&chips->svga.mapping);
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if (chips->pci_conf_status & PCI_COMMAND_IO) {
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io_sethandler(0x03c0, 0x0020, chips_69000_in, NULL, NULL, chips_69000_out, NULL, NULL, chips);
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}
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if (chips->pci_conf_status & PCI_COMMAND_MEM) {
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mem_mapping_enable(&chips->svga.mapping);
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if (chips->linear_mapping.base)
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mem_mapping_set_addr(&chips->linear_mapping, chips->linear_mapping.base, (1 << 24));
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}
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break;
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}
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case 0x13:
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{
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chips->linear_mapping.base = val << 24;
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if (chips->linear_mapping.base)
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mem_mapping_set_addr(&chips->linear_mapping, chips->linear_mapping.base, (1 << 24));
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break;
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}
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case 0x3c:
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chips->pci_line_interrupt = val;
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break;
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case 0x30:
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if (chips->on_board) break;
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switch (addr) {
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case 0x04:
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chips->pci_conf_status = val;
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io_removehandler(0x03c0, 0x0020, chips_69000_in, NULL, NULL, chips_69000_out, NULL, NULL, chips);
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mem_mapping_disable(&chips->linear_mapping);
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mem_mapping_disable(&chips->svga.mapping);
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if (!chips->on_board)
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mem_mapping_disable(&chips->bios_rom.mapping);
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if (val & PCI_COMMAND_IO)
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io_sethandler(0x03c0, 0x0020, chips_69000_in, NULL, NULL, chips_69000_out, NULL, NULL, chips);
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if (val & PCI_COMMAND_MEM) {
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if (!chips->on_board && (chips->pci_rom_enable & 1))
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mem_mapping_set_addr(&chips->bios_rom.mapping, chips->rom_addr << 16, 0x10000);
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mem_mapping_enable(&chips->svga.mapping);
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if (chips->linear_mapping.base > 0x00000000)
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mem_mapping_set_addr(&chips->linear_mapping, chips->linear_mapping.base, (1 << 24));
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}
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break;
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case 0x05:
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chips->pci_regs[addr] = val & 0x01;
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break;
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case 0x07:
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chips->pci_regs[addr] &= ~(val & 0xc8);
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break;
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case 0x13:
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chips->linear_mapping.base = val << 24;
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mem_mapping_disable(&chips->linear_mapping);
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if ((chips->pci_conf_status & PCI_COMMAND_MEM) &&
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(chips->linear_mapping.base > 0x00000000))
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mem_mapping_set_addr(&chips->linear_mapping, chips->linear_mapping.base, (1 << 24));
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break;
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case 0x30:
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if (!chips->on_board) {
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chips->pci_rom_enable = val & 0x1;
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mem_mapping_disable(&chips->bios_rom.mapping);
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if (chips->pci_rom_enable & 1) {
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if ((chips->pci_conf_status & PCI_COMMAND_MEM) &&
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(chips->pci_rom_enable & 1))
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mem_mapping_set_addr(&chips->bios_rom.mapping, chips->rom_addr << 16, 0x10000);
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}
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break;
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case 0x32:
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if (chips->on_board) break;
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chips->rom_addr &= ~0xFF;
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chips->rom_addr |= val & 0xFC;
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if (chips->pci_rom_enable & 1) {
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}
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break;
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case 0x32:
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if (!chips->on_board) {
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chips->rom_addr &= ~0xff;
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chips->rom_addr |= val & 0xfc;
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if ((chips->pci_conf_status & PCI_COMMAND_MEM) &&
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(chips->pci_rom_enable & 1))
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mem_mapping_set_addr(&chips->bios_rom.mapping, chips->rom_addr << 16, 0x10000);
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}
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break;
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case 0x33:
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if (chips->on_board) break;
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chips->rom_addr &= ~0xFF00;
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}
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break;
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case 0x33:
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if (!chips->on_board) {
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chips->rom_addr &= ~0xff00;
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chips->rom_addr |= (val << 8);
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if (chips->pci_rom_enable & 1) {
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if ((chips->pci_conf_status & PCI_COMMAND_MEM) &&
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(chips->pci_rom_enable & 1))
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mem_mapping_set_addr(&chips->bios_rom.mapping, chips->rom_addr << 16, 0x10000);
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}
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break;
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case 0x6C:
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case 0x6D:
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chips->subsys_vid_b[addr & 1] = val;
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break;
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case 0x6E:
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case 0x6F:
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chips->subsys_pid_b[addr & 1] = val;
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break;
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}
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}
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break;
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case 0x3c:
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chips->pci_line_interrupt = val;
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break;
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case 0x6c ... 0x6d:
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chips->subsys_vid_b[addr & 1] = val;
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break;
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case 0x6e ... 0x6f:
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chips->subsys_pid_b[addr & 1] = val;
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break;
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}
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}
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@@ -2839,6 +2867,18 @@ chips_69000_init(const device_t *info)
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chips->flat_panel_regs[0x01] = 1;
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chips->pci_conf_status = 0x00;
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chips->pci_rom_enable = 0x00;
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chips->rom_addr = 0x0000;
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chips->subsys_vid = 0x102c;
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chips->subsys_pid = 0x00c0;
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io_removehandler(0x03c0, 0x0020, chips_69000_in, NULL, NULL, chips_69000_out, NULL, NULL, chips);
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mem_mapping_disable(&chips->linear_mapping);
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mem_mapping_disable(&chips->svga.mapping);
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if (!chips->on_board)
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mem_mapping_disable(&chips->bios_rom.mapping);
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*reset_state = *chips;
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return chips;
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