LPT: Impelement ECP FIFO test mode, fixes printing in ECP mode on the ASUS P/I-P55T2P4.

This commit is contained in:
OBattler
2025-09-01 22:13:37 +02:00
parent b5e59b98cd
commit 5fa1c17154

View File

@@ -236,7 +236,7 @@ lpt_fifo_out_callback(void *priv)
{
lpt_t *dev = (lpt_t *) priv;
switch (dev->state) {
if ((dev->ecr & 0xe0) != 0xc0) switch (dev->state) {
default:
break;
@@ -281,7 +281,7 @@ lpt_fifo_out_callback(void *priv)
}
}
if (dev->ecr & 0x08) {
if (((dev->ecr & 0xe0) != 0xc0) && (dev->ecr & 0x08)) {
if (fifo_get_empty(dev->fifo)) {
if (dev->dma_stat) {
/* Now actually set the external flag. */
@@ -319,7 +319,8 @@ lpt_write(const uint16_t port, const uint8_t val, void *priv)
switch (port & mask) {
case 0x0000:
if (dev->ecp) {
if (((dev->ecr & 0xe0) == 0x40) || ((dev->ecr & 0xe0) == 0x60))
if (((dev->ecr & 0xe0) == 0x40) || ((dev->ecr & 0xe0) == 0x60) ||
((dev->ecr & 0xe0) == 0xc0))
/* AFIFO */
lpt_write_fifo(dev, val, 0x00);
else if (!(dev->ecr & 0xc0) && (!(dev->ecr & 0x20) || !(lpt_get_ctrl_raw(dev) & 0x20)) &&
@@ -398,18 +399,13 @@ lpt_write(const uint16_t port, const uint8_t val, void *priv)
switch (dev->ecr >> 5) {
default:
break;
case 2:
case 2: case 6:
lpt_write_fifo(dev, val, 0x01);
break;
case 3:
if (!(lpt_get_ctrl_raw(dev) & 0x20))
lpt_write_fifo(dev, val, 0x01);
break;
case 6:
/* TFIFO */
if (!fifo_get_full(dev->fifo))
fifo_write_evt(val, dev->fifo);
break;
}
break;
@@ -424,7 +420,8 @@ lpt_write(const uint16_t port, const uint8_t val, void *priv)
timer_set_delay_u64(&dev->fifo_out_timer, (uint64_t) ((1000000.0 / 2500000.0) * (double) TIMER_USEC));
} else {
dev->state = LPT_STATE_WRITE_FIFO;
if (((dev->ecr & 0xe0) == 0x40) || (lpt_get_ctrl_raw(dev) & 0x20))
if (((dev->ecr & 0xe0) == 0x40) || ((dev->ecr & 0xe0) == 0xc0) ||
(lpt_get_ctrl_raw(dev) & 0x20))
dev->fifo_stat = fifo_get_ready(dev->fifo) ? 0x04 : 0x00;
else
dev->fifo_stat = fifo_get_ready(dev->fifo) ? 0x00 : 0x04;
@@ -463,7 +460,8 @@ lpt_fifo_d_ready_evt(void *priv)
lpt_t *dev = (lpt_t *) priv;
if (!(dev->ecr & 0x08)) {
if (((dev->ecr & 0xe0) == 0x40) || (lpt_get_ctrl_raw(dev) & 0x20))
if (((dev->ecr & 0xe0) == 0xc0) || ((dev->ecr & 0xe0) == 0x40) ||
(lpt_get_ctrl_raw(dev) & 0x20))
dev->fifo_stat = fifo_get_ready(dev->fifo) ? 0x04 : 0x00;
else
dev->fifo_stat = fifo_get_ready(dev->fifo) ? 0x00 : 0x04;
@@ -482,11 +480,13 @@ lpt_write_to_fifo(void *priv, const uint8_t val)
dev->dat = val;
else if (((dev->ecr & 0xe0) == 0x40) && !fifo_get_full(dev->fifo))
fifo_write_evt_tagged(0x01, val, dev->fifo);
else if (((dev->ecr & 0xe0) == 0xc0) && !fifo_get_full(dev->fifo))
fifo_write_evt_tagged(0x01, val, dev->fifo);
else if (((dev->ecr & 0xe0) == 0x60) && (lpt_get_ctrl_raw(dev) & 0x20) &&
!fifo_get_full(dev->fifo))
fifo_write_evt_tagged(0x01, val, dev->fifo);
if (((dev->ecr & 0x0c) == 0x08) && (dev->dma != 0xff)) {
if (((dev->ecr & 0xe0) != 0xc0) && ((dev->ecr & 0x0c) == 0x08) && (dev->dma != 0xff)) {
const int ret = dma_channel_write(dev->dma, val);
if (ret & DMA_OVER)
@@ -565,7 +565,16 @@ lpt_read(const uint16_t port, void *priv)
switch (port & mask) {
case 0x0000:
if (dev->ecp) {
if (!(dev->ecr & 0xc0))
if (dev->ecr & 0xc0) {
if (((dev->ecr & 0xe0) == 0xc0) && !fifo_get_empty(dev->fifo)) {
uint8_t tag = 0x00;
ret = fifo_read_evt_tagged(&tag, dev->fifo);
} else if (((dev->ecr & 0xe0) == 0x60) && !(lpt_get_ctrl_raw(dev) & 0x20) &&
!fifo_get_empty(dev->fifo)) {
uint8_t tag = 0x00;
ret = fifo_read_evt_tagged(&tag, dev->fifo);
}
} else
ret = dev->dat;
} else {
/* DTR */