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Merge branch '86Box:master' into machine_23

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This commit is contained in:
BurnedPinguin
2023-07-06 20:37:55 +02:00
committed by GitHub
parent f480ca3668 8c94de0be1
commit 60e33817cd
9 changed files with 850 additions and 618 deletions
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6
src/chipset/vl82c480.c
View File

@@ -121,10 +121,13 @@ vl82c480_write(uint16_t addr, uint8_t val, void *priv)
}
break;
/* TODO: This is actually Fast A20 disable. */
#if 0
case 0xee:
if (mem_a20_alt)
outb(0x92, inb(0x92) & ~2);
break;
#endif
default:
break;
@@ -146,10 +149,13 @@ vl82c480_read(uint16_t addr, void *priv)
ret = dev->regs[dev->idx];
break;
/* TODO: This is actually Fast A20 enable. */
#if 0
case 0xee:
if (!mem_a20_alt)
outb(0x92, inb(0x92) | 2);
break;
#endif
case 0xef:
softresetx86();

850
src/cpu/808x.c
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File diff suppressed because it is too large Load Diff

1
src/cpu/cpu.c
View File

@@ -526,6 +526,7 @@ cpu_set(void)
cpu_set_agp_speed(0);
io_handler(cpu_iscyrix, 0x0022, 0x0002, cpu_read, NULL, NULL, cpu_write, NULL, NULL, NULL);
cpu_iscyrix = cpu_iscyrix || (cpu_s->cpu_type == CPU_386SX) || (cpu_s->cpu_type == CPU_386DX);
io_handler(hasfpu, 0x00f0, 0x000f, cpu_read, NULL, NULL, cpu_write, NULL, NULL, NULL);
io_handler(hasfpu, 0xf007, 0x0001, cpu_read, NULL, NULL, cpu_write, NULL, NULL, NULL);

19
src/include/86box/pci.h
View File

@@ -91,13 +91,30 @@ enum {
typedef union {
uint32_t addr;
uint8_t addr_regs[4];
uint8_t addr_regs[4];
} bar_t;
#define PCI_IO_ON 0x01
#define PCI_IO_DEV0 0x02
extern int pci_burst_time;
extern int agp_burst_time;
extern int pci_nonburst_time;
extern int agp_nonburst_time;
extern int pci_take_over_io;
extern uint32_t pci_base;
extern uint32_t pci_size;
extern void pci_type2_write(uint16_t port, uint8_t val, void *priv);
extern void pci_type2_writew(uint16_t port, uint16_t val, void *priv);
extern void pci_type2_writel(uint16_t port, uint32_t val, void *priv);
extern uint8_t pci_type2_read(uint16_t port, void *priv);
extern uint16_t pci_type2_readw(uint16_t port, void *priv);
extern uint32_t pci_type2_readl(uint16_t port, void *priv);
extern void pci_set_irq_routing(int pci_int, int irq);
extern void pci_set_irq_level(int pci_int, int level);

313
src/io.c
View File

@@ -29,6 +29,7 @@
#include <86box/timer.h>
#include "cpu.h"
#include <86box/m_amstrad.h>
#include <86box/pci.h>
#define NPORTS 65536 /* PC/AT supports 64K ports */
@@ -287,15 +288,25 @@ inb(uint16_t port)
int found = 0;
int qfound = 0;
p = io[port];
while (p) {
q = p->next;
if (p->inb) {
ret &= p->inb(port, p->priv);
found |= 1;
qfound++;
if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) {
ret = pci_type2_read(port, NULL);
found = 1;
qfound = 1;
} else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) {
ret = pci_type2_read(port, NULL);
found = 1;
qfound = 1;
} else {
p = io[port];
while (p) {
q = p->next;
if (p->inb) {
ret &= p->inb(port, p->priv);
found |= 1;
qfound++;
}
p = q;
}
p = q;
}
if (amstrad_latch & 0x80000000) {
@@ -329,15 +340,25 @@ outb(uint16_t port, uint8_t val)
int found = 0;
int qfound = 0;
p = io[port];
while (p) {
q = p->next;
if (p->outb) {
p->outb(port, val, p->priv);
found |= 1;
qfound++;
if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) {
pci_type2_write(port, val, NULL);
found = 1;
qfound = 1;
} else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) {
pci_type2_write(port, val, NULL);
found = 1;
qfound = 1;
} else {
p = io[port];
while (p) {
q = p->next;
if (p->outb) {
p->outb(port, val, p->priv);
found |= 1;
qfound++;
}
p = q;
}
p = q;
}
if (!found) {
@@ -363,32 +384,42 @@ inw(uint16_t port)
int qfound = 0;
uint8_t ret8[2];
p = io[port];
while (p) {
q = p->next;
if (p->inw) {
ret &= p->inw(port, p->priv);
found |= 2;
qfound++;
}
p = q;
}
ret8[0] = ret & 0xff;
ret8[1] = (ret >> 8) & 0xff;
for (uint8_t i = 0; i < 2; i++) {
p = io[(port + i) & 0xffff];
if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) {
ret = pci_type2_readw(port, NULL);
found = 2;
qfound = 1;
} else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) {
ret = pci_type2_readw(port, NULL);
found = 2;
qfound = 1;
} else {
p = io[port];
while (p) {
q = p->next;
if (p->inb && !p->inw) {
ret8[i] &= p->inb(port + i, p->priv);
found |= 1;
if (p->inw) {
ret &= p->inw(port, p->priv);
found |= 2;
qfound++;
}
p = q;
}
ret8[0] = ret & 0xff;
ret8[1] = (ret >> 8) & 0xff;
for (uint8_t i = 0; i < 2; i++) {
p = io[(port + i) & 0xffff];
while (p) {
q = p->next;
if (p->inb && !p->inw) {
ret8[i] &= p->inb(port + i, p->priv);
found |= 1;
qfound++;
}
p = q;
}
}
ret = (ret8[1] << 8) | ret8[0];
}
ret = (ret8[1] << 8) | ret8[0];
if (amstrad_latch & 0x80000000) {
if (port & 0x80)
@@ -415,28 +446,38 @@ outw(uint16_t port, uint16_t val)
int found = 0;
int qfound = 0;
p = io[port];
while (p) {
q = p->next;
if (p->outw) {
p->outw(port, val, p->priv);
found |= 2;
qfound++;
}
p = q;
}
for (uint8_t i = 0; i < 2; i++) {
p = io[(port + i) & 0xffff];
if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) {
pci_type2_writew(port, val, NULL);
found = 2;
qfound = 1;
} else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) {
pci_type2_writew(port, val, NULL);
found = 2;
qfound = 1;
} else {
p = io[port];
while (p) {
q = p->next;
if (p->outb && !p->outw) {
p->outb(port + i, val >> (i << 3), p->priv);
found |= 1;
if (p->outw) {
p->outw(port, val, p->priv);
found |= 2;
qfound++;
}
p = q;
}
for (uint8_t i = 0; i < 2; i++) {
p = io[(port + i) & 0xffff];
while (p) {
q = p->next;
if (p->outb && !p->outw) {
p->outb(port + i, val >> (i << 3), p->priv);
found |= 1;
qfound++;
}
p = q;
}
}
}
if (!found) {
@@ -463,59 +504,69 @@ inl(uint16_t port)
int found = 0;
int qfound = 0;
p = io[port];
while (p) {
q = p->next;
if (p->inl) {
ret &= p->inl(port, p->priv);
found |= 4;
qfound++;
}
p = q;
}
ret16[0] = ret & 0xffff;
ret16[1] = (ret >> 16) & 0xffff;
p = io[port & 0xffff];
while (p) {
q = p->next;
if (p->inw && !p->inl) {
ret16[0] &= p->inw(port, p->priv);
found |= 2;
qfound++;
}
p = q;
}
p = io[(port + 2) & 0xffff];
while (p) {
q = p->next;
if (p->inw && !p->inl) {
ret16[1] &= p->inw(port + 2, p->priv);
found |= 2;
qfound++;
}
p = q;
}
ret = (ret16[1] << 16) | ret16[0];
ret8[0] = ret & 0xff;
ret8[1] = (ret >> 8) & 0xff;
ret8[2] = (ret >> 16) & 0xff;
ret8[3] = (ret >> 24) & 0xff;
for (uint8_t i = 0; i < 4; i++) {
p = io[(port + i) & 0xffff];
if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) {
ret = pci_type2_readl(port, NULL);
found = 4;
qfound = 1;
} else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) {
ret = pci_type2_readl(port, NULL);
found = 4;
qfound = 1;
} else {
p = io[port];
while (p) {
q = p->next;
if (p->inb && !p->inw && !p->inl) {
ret8[i] &= p->inb(port + i, p->priv);
found |= 1;
if (p->inl) {
ret &= p->inl(port, p->priv);
found |= 4;
qfound++;
}
p = q;
}
ret16[0] = ret & 0xffff;
ret16[1] = (ret >> 16) & 0xffff;
p = io[port & 0xffff];
while (p) {
q = p->next;
if (p->inw && !p->inl) {
ret16[0] &= p->inw(port, p->priv);
found |= 2;
qfound++;
}
p = q;
}
p = io[(port + 2) & 0xffff];
while (p) {
q = p->next;
if (p->inw && !p->inl) {
ret16[1] &= p->inw(port + 2, p->priv);
found |= 2;
qfound++;
}
p = q;
}
ret = (ret16[1] << 16) | ret16[0];
ret8[0] = ret & 0xff;
ret8[1] = (ret >> 8) & 0xff;
ret8[2] = (ret >> 16) & 0xff;
ret8[3] = (ret >> 24) & 0xff;
for (uint8_t i = 0; i < 4; i++) {
p = io[(port + i) & 0xffff];
while (p) {
q = p->next;
if (p->inb && !p->inw && !p->inl) {
ret8[i] &= p->inb(port + i, p->priv);
found |= 1;
qfound++;
}
p = q;
}
}
ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0];
}
ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0];
if (amstrad_latch & 0x80000000) {
if (port & 0x80)
@@ -543,42 +594,52 @@ outl(uint16_t port, uint32_t val)
int qfound = 0;
int i = 0;
p = io[port];
if (p) {
while (p) {
q = p->next;
if (p->outl) {
p->outl(port, val, p->priv);
found |= 4;
qfound++;
if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) {
pci_type2_writel(port, val, NULL);
found = 4;
qfound = 1;
} else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) {
pci_type2_writel(port, val, NULL);
found = 4;
qfound = 1;
} else {
p = io[port];
if (p) {
while (p) {
q = p->next;
if (p->outl) {
p->outl(port, val, p->priv);
found |= 4;
qfound++;
}
p = q;
}
p = q;
}
}
for (i = 0; i < 4; i += 2) {
p = io[(port + i) & 0xffff];
while (p) {
q = p->next;
if (p->outw && !p->outl) {
p->outw(port + i, val >> (i << 3), p->priv);
found |= 2;
qfound++;
for (i = 0; i < 4; i += 2) {
p = io[(port + i) & 0xffff];
while (p) {
q = p->next;
if (p->outw && !p->outl) {
p->outw(port + i, val >> (i << 3), p->priv);
found |= 2;
qfound++;
}
p = q;
}
p = q;
}
}
for (i = 0; i < 4; i++) {
p = io[(port + i) & 0xffff];
while (p) {
q = p->next;
if (p->outb && !p->outw && !p->outl) {
p->outb(port + i, val >> (i << 3), p->priv);
found |= 1;
qfound++;
for (i = 0; i < 4; i++) {
p = io[(port + i) & 0xffff];
while (p) {
q = p->next;
if (p->outb && !p->outw && !p->outl) {
p->outb(port + i, val >> (i << 3), p->priv);
found |= 1;
qfound++;
}
p = q;
}
p = q;
}
}

13
src/machine/m_at_386dx_486.c
View File

@@ -1103,14 +1103,20 @@ machine_at_486sp3_init(const machine_t *model)
{
int ret;
#if 0
ret = bios_load_linear("roms/machines/486sp3/awsi2737.bin",
0x000e0000, 131072, 0);
#else
ret = bios_load_linear("roms/machines/486sp3/140394.BIN",
0x000e0000, 131072, 0);
#endif
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&ide_isa_device);
device_add(&ide_vlb_device);
// device_add(&ide_isa_device);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -1122,8 +1128,9 @@ machine_at_486sp3_init(const machine_t *model)
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&keyboard_ps2_ami_pci_device); /* Uses the AMIKEY KBC */
device_add(&sio_device);
device_add(&fdc37c663_ide_device);
device_add(&sst_flash_29ee010_device);
device_add(&fdc_at_device);
// device_add(&fdc37c663_ide_device);
// device_add(&sst_flash_29ee010_device);
device_add(&i420tx_device);
device_add(&ncr53c810_onboard_pci_device);

3
src/machine/machine.c
View File

@@ -41,6 +41,7 @@
#include <86box/video.h>
#include <86box/machine.h>
#include <86box/isamem.h>
#include <86box/pci.h>
int bios_only = 0;
int machine;
@@ -103,6 +104,8 @@ machine_init_ex(int m)
/* Reset the fast off stuff. */
cpu_fast_off_reset();
pci_take_over_io = 0x00000000;
}
/* All good, boot the machine! */

255
src/pci.c
View File

@@ -56,6 +56,10 @@ int pci_burst_time;
int agp_burst_time;
int pci_nonburst_time;
int agp_nonburst_time;
int pci_take_over_io;
uint32_t pci_base = 0xc000;
uint32_t pci_size = 0x1000;
static pci_card_t pci_cards[32];
static uint8_t pci_pmc = 0;
@@ -77,8 +81,6 @@ static int pci_bus;
static int pci_enable;
static int pci_key;
static int trc_reg = 0;
static uint32_t pci_base = 0xc000;
static uint32_t pci_size = 0x1000;
static void pci_reset_regs(void);
@@ -413,9 +415,6 @@ pci_readl(uint16_t port, UNUSED(void *priv))
return ret;
}
static void pci_type2_write(uint16_t port, uint8_t val, void *priv);
static uint8_t pci_type2_read(uint16_t port, void *priv);
void
pci_set_pmc(uint8_t pmc)
{
@@ -425,9 +424,8 @@ pci_set_pmc(uint8_t pmc)
#endif
if (!pci_pmc && (pmc & 0x01)) {
io_removehandler(pci_base, pci_size,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
pci_log("PMC: Dellocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1);
pci_take_over_io &= ~PCI_IO_ON;
io_removehandler(0x0cf8, 1,
pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL);
@@ -440,13 +438,11 @@ pci_set_pmc(uint8_t pmc)
io_sethandler(0x0cfc, 4,
pci_read, pci_readw, pci_readl, pci_write, pci_writew, pci_writel, NULL);
} else if (pci_pmc && !(pmc & 0x01)) {
io_removehandler(pci_base, pci_size,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
pci_log("PMC: Redellocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1);
pci_take_over_io &= ~PCI_IO_ON;
if (pci_key) {
io_sethandler(pci_base, pci_size,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
pci_log("PMC: Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1);
pci_take_over_io |= PCI_IO_ON;
}
io_removehandler(0x0cf8, 1,
@@ -465,67 +461,97 @@ pci_set_pmc(uint8_t pmc)
}
static void
pci_type2_write(uint16_t port, uint8_t val, UNUSED(void *priv))
pci_type2_write_reg(uint16_t port, uint8_t val)
{
uint8_t slot = 0;
if (port == 0xcf8) {
pci_func = (val >> 1) & 7;
pci_card = (port >> 8) & 0xf;
pci_index = port & 0xff;
if (!pci_key && (val & 0xf0)) {
io_removehandler(pci_base, pci_size,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
io_sethandler(pci_base, pci_size,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
} else if (pci_key && !(val & 0xf0))
io_removehandler(pci_base, pci_size,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
pci_key = val & 0xf0;
} else if (port == 0xcfa) {
pci_bus = val;
pci_log("Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1);
/* Evidently, writing here, we should also enable the
configuration space. */
io_removehandler(pci_base, pci_size,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
io_sethandler(pci_base, pci_size,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
/* Mark as enabled. */
pci_key |= 0x100;
} else if (port == 0xcfb) {
pci_log("Write %02X to port 0CFB\n", val);
pci_set_pmc(val);
} else {
pci_card = (port >> 8) & 0xf;
pci_index = port & 0xff;
slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card];
if (slot != 0xff) {
if (pci_cards[slot].write)
pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv);
#ifdef ENABLE_PCI_LOG
else
pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
#endif
}
slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card];
if (slot != 0xff) {
if (pci_cards[slot].write)
pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv);
#ifdef ENABLE_PCI_LOG
else
pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
pci_log("Writing to empty PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index);
#endif
}
#ifdef ENABLE_PCI_LOG
else
pci_log("Writing to unassigned PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index);
#endif
}
void
pci_type2_write(uint16_t port, uint8_t val, UNUSED(void *priv))
{
switch (port) {
case 0xcf8:
pci_func = (val >> 1) & 7;
if (val & 0xf0) {
pci_log("CF8: Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1);
pci_take_over_io |= PCI_IO_ON;
} else {
pci_log("CF8: Dellocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1);
pci_take_over_io &= ~PCI_IO_ON;
}
pci_key = val & 0xf0;
break;
case 0xcfa:
pci_bus = val;
pci_log("CFA: Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1);
/* Evidently, writing here, we should also enable the
configuration space. */
pci_take_over_io |= PCI_IO_ON;
/* Mark as enabled. */
pci_key |= 0x100;
break;
case 0xcfb:
pci_log("Write %02X to port 0CFB\n", val);
pci_set_pmc(val);
break;
case 0xc000 ... 0xc0ff:
if (pci_take_over_io == 0x00000000)
break;
pci_type2_write_reg(port, val);
break;
case 0xc100 ... 0xcfff:
if (!(pci_take_over_io & PCI_IO_ON))
break;
pci_type2_write_reg(port, val);
break;
default:
break;
}
}
static void
void
pci_type2_writew(uint16_t port, uint16_t val, void *priv)
{
pci_type2_write(port, val & 0xff, priv);
pci_type2_write(port + 1, val >> 8, priv);
}
void
pci_type2_writel(uint16_t port, uint32_t val, void *priv)
{
pci_type2_writew(port, val & 0xffff, priv);
pci_type2_writew(port + 2, val >> 16, priv);
}
static void
pci_type2_cfb_writel(uint16_t port, uint32_t val, void *priv)
{
for (uint8_t i = 0; i < 4; i++) {
/* Make sure to have the DWORD write not pass through to PMC if mechanism 1 is in use,
@@ -536,41 +562,88 @@ pci_type2_writel(uint16_t port, uint32_t val, void *priv)
}
static uint8_t
pci_type2_read(uint16_t port, UNUSED(void *priv))
pci_type2_read_reg(uint16_t port)
{
uint8_t slot = 0;
uint8_t ret = 0xff;
if (port == 0xcf8)
ret = pci_key | (pci_func << 1);
else if (port == 0xcfa)
ret = pci_bus;
else if (port == 0xcfb)
ret = pci_pmc;
else {
pci_card = (port >> 8) & 0xf;
pci_index = port & 0xff;
pci_card = (port >> 8) & 0xf;
pci_index = port & 0xff;
slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card];
if (slot != 0xff) {
if (pci_cards[slot].read)
ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv);
#ifdef ENABLE_PCI_LOG
else
pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
#endif
}
slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card];
if (slot != 0xff) {
if (pci_cards[slot].read)
ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv);
#ifdef ENABLE_PCI_LOG
else
pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
pci_log("Reading from empty PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index);
#endif
}
#ifdef ENABLE_PCI_LOG
else
pci_log("Reading from unasisgned PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index);
#endif
pci_log("Reading %02X at PCI register %02X at bus %02X, card %02X, function %02X\n", ret, pci_index, pci_bus, pci_card, pci_func);
pci_log("Reading %02X at PCI register %02X at bus %02X, card %02X, function %02X\n", ret, pci_index, pci_bus, pci_card, pci_func);
return ret;
}
uint8_t
pci_type2_read(uint16_t port, UNUSED(void *priv))
{
uint8_t ret = 0xff;
switch (port) {
case 0xcf8:
ret = pci_key | (pci_func << 1);
break;
case 0xcfa:
ret = pci_bus;
break;
case 0xcfb:
ret = pci_pmc;
break;
case 0xc000 ... 0xc0ff:
if (pci_take_over_io == 0x00000000)
break;
ret = pci_type2_read_reg(port);
break;
case 0xc100 ... 0xcfff:
if (!(pci_take_over_io & PCI_IO_ON))
break;
ret = pci_type2_read_reg(port);
break;
default:
break;
}
return ret;
}
uint16_t
pci_type2_readw(uint16_t port, void *priv)
{
uint16_t ret = pci_type2_read(port, priv);
ret |= ((uint16_t) pci_type2_read(port + 1, priv)) << 8;
return ret;
}
uint32_t
pci_type2_readl(uint16_t port, void *priv)
{
uint32_t ret = pci_type2_readw(port, priv);
ret |= ((uint32_t) pci_type2_readw(port + 2, priv)) << 16;
return ret;
}
void
pci_set_irq_routing(int pci_int, int irq)
{
@@ -852,9 +925,7 @@ pci_reset_regs(void)
{
pci_index = pci_card = pci_func = pci_bus = pci_key = 0;
io_removehandler(pci_base, pci_size,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
pci_take_over_io &= ~PCI_IO_ON;
}
void
@@ -1021,7 +1092,7 @@ pci_init(int type)
pci_pmc = 0x00;
io_sethandler(0x0cfb, 1,
pci_type2_read, NULL, NULL, pci_type2_write, NULL, pci_type2_writel, NULL);
pci_type2_read, NULL, NULL, pci_type2_write, NULL, pci_type2_cfb_writel, NULL);
}
if (type & PCI_NO_IRQ_STEERING) {
@@ -1032,6 +1103,8 @@ pci_init(int type)
pic_elcr_set_enabled(1);
}
pci_take_over_io = 0x00000000;
if ((type & PCI_CONFIG_TYPE_MASK) == PCI_CONFIG_TYPE_1) {
pci_log("PCI: Configuration mechanism #1\n");
io_sethandler(0x0cf8, 1,
@@ -1052,9 +1125,7 @@ pci_init(int type)
pci_base = 0xc100;
pci_size = 0x0f00;
io_sethandler(0xc000, 0x0100,
pci_type2_read, NULL, NULL,
pci_type2_write, NULL, NULL, NULL);
pci_take_over_io |= PCI_IO_DEV0;
}
}

8
src/video/vid_cga.c
View File

@@ -77,7 +77,7 @@ cga_out(uint16_t addr, uint8_t val, void *p)
cga->cgamode = val;
if (old ^ val) {
if ((old ^ val) & 0x05)
if ((old ^ val) & 0x07)
update_cga16_color(val);
cga_recalctimings(cga);
@@ -352,10 +352,7 @@ cga_poll(void *p)
x = (cga->crtc[1] << 4) + 16;
if (cga->composite) {
if (cga->cgamode & 0x10)
border = 0x00;
else
border = cga->cgacol & 0x0f;
border = ((cga->cgamode & 0x12) == 0x12) ? 0 : (cga->cgacol & 15);
Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[cga->displine << 1]);
Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[(cga->displine << 1) + 1]);
@@ -536,6 +533,7 @@ cga_standalone_init(const device_t *info)
cga->rgb_type = device_get_config_int("rgb_type");
cga_palette = (cga->rgb_type << 1);
cgapal_rebuild();
update_cga16_color(cga->cgamode);
return cga;
}