Merge branch 'master' of ssh://github.com/86Box/86Box into version/4.1

This commit is contained in:
RichardG867
2023-11-07 21:28:51 -03:00
15 changed files with 899 additions and 1492 deletions

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@@ -46,6 +46,8 @@ int acpi_enabled = 0;
static double cpu_to_acpi;
static int acpi_power_on = 0;
#ifdef ENABLE_ACPI_LOG
int acpi_do_log = ENABLE_ACPI_LOG;
@@ -1656,6 +1658,12 @@ acpi_reset(void *priv)
dev->regs.gpi_val |= 0x00000004;
}
if (acpi_power_on) {
/* Power on always generates a resume event. */
dev->regs.pmsts |= 0x8100;
acpi_power_on = 0;
}
acpi_rtc_status = 0;
acpi_update_irq(dev);
@@ -1762,10 +1770,9 @@ acpi_init(const device_t *info)
acpi_reset(dev);
/* Power on always generates a resume event. */
dev->regs.pmsts |= 0x8100;
acpi_enabled = 1;
acpi_power_on = 1;
acpi_enabled = 1;
return dev;
}

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@@ -176,6 +176,8 @@ sis_85c4xx_out(uint16_t port, uint8_t val, void *priv)
valxor = val ^ dev->regs[rel_reg];
if (rel_reg == 0x19)
dev->regs[rel_reg] &= ~val;
else if (rel_reg == 0x00)
dev->regs[rel_reg] = (dev->regs[rel_reg] & 0x1f) | (val & 0xe0);
else
dev->regs[rel_reg] = val;

File diff suppressed because it is too large Load Diff

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@@ -1389,7 +1389,6 @@ cpu_set(void)
cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME;
if (cpu_s->cpu_type == CPU_PENTIUMMMX)
cpu_features |= CPU_FEATURE_MMX;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PCE;
#ifdef USE_DYNAREC
codegen_timing_set(&codegen_timing_pentium);
@@ -1503,7 +1502,6 @@ cpu_set(void)
cpu_features |= CPU_FEATURE_MSR | CPU_FEATURE_CR4;
if (cpu_s->cpu_type == CPU_Cx6x86MX)
cpu_features |= CPU_FEATURE_MMX;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
if (cpu_s->cpu_type >= CPU_CxGX1)
cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_PCE;
@@ -1598,7 +1596,6 @@ cpu_set(void)
cpu_features |= CPU_FEATURE_3DNOW;
if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P))
cpu_features |= CPU_FEATURE_3DNOWE;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
#if defined(DEV_BRANCH) && defined(USE_AMD_K5)
cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE;
if (cpu_s->cpu_type >= CPU_K6) {
@@ -1701,7 +1698,6 @@ cpu_set(void)
cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME;
if (cpu_s->cpu_type >= CPU_PENTIUM2)
cpu_features |= CPU_FEATURE_MMX;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PAE | CR4_PCE | CR4_PGE;
if (cpu_s->cpu_type == CPU_PENTIUM2D)
cpu_CR4_mask |= CR4_OSFXSR;
@@ -1749,8 +1745,8 @@ cpu_set(void)
timing_misaligned = 2;
cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_3DNOW;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21);
cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE;
msr.fcr = (1 << 7) | (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21);
cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE | CR4_PGE;
cpu_cyrix_alignment = 1;
@@ -1816,12 +1812,13 @@ cpu_set_isa_speed(int speed)
{
if (speed) {
cpu_isa_speed = speed;
pc_speed_changed();
} else if (cpu_busspeed >= 8000000)
cpu_isa_speed = 8000000;
else
cpu_isa_speed = cpu_busspeed;
pc_speed_changed();
cpu_log("cpu_set_isa_speed(%d) = %d\n", speed, cpu_isa_speed);
}
@@ -2459,6 +2456,8 @@ cpu_CPUID(void)
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_MMX | CPUID_MTRR;
if (cpu_has_feature(CPU_FEATURE_CX8))
EDX |= CPUID_CMPXCHG8B;
if (msr.fcr & (1 << 7))
EDX |= CPUID_PGE;
break;
case 0x80000000:
EAX = 0x80000005;
@@ -2468,6 +2467,8 @@ cpu_CPUID(void)
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_MMX | CPUID_MTRR | CPUID_3DNOW;
if (cpu_has_feature(CPU_FEATURE_CX8))
EDX |= CPUID_CMPXCHG8B;
if (msr.fcr & (1 << 7))
EDX |= CPUID_PGE;
break;
case 0x80000002: /* Processor name string */
EAX = 0x20414956; /* VIA Samuel */
@@ -2494,6 +2495,13 @@ cpu_ven_reset(void)
memset(&msr, 0, sizeof(msr));
switch (cpu_s->cpu_type) {
case CPU_WINCHIP:
case CPU_WINCHIP2:
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
if (cpu_s->cpu_type == CPU_WINCHIP2)
msr.fcr |= (1 << 18) | (1 << 20);
break;
case CPU_K6_2P:
case CPU_K6_3P:
case CPU_K6_3:
@@ -2514,6 +2522,11 @@ cpu_ven_reset(void)
case CPU_PENTIUM2D:
msr.mtrr_cap = 0x00000508ULL;
break;
case CPU_CYRIX3S:
msr.fcr = (1 << 7) | (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 18) | (1 << 19) |
(1 << 20) | (1 << 21);
break;
}
}
@@ -3112,6 +3125,10 @@ cpu_WRMSR(void)
cpu_features |= CPU_FEATURE_CX8;
else
cpu_features &= ~CPU_FEATURE_CX8;
if (EAX & (1 << 7))
cpu_CR4_mask |= CR4_PGE;
else
cpu_CR4_mask &= ~CR4_PGE;
break;
case 0x1108:
msr.fcr2 = EAX | ((uint64_t) EDX << 32);

View File

@@ -54,19 +54,22 @@
#define STAT_IFULL 0x02
#define STAT_OFULL 0x01
// Keyboard Types
#define KBD_TYPE_PC81 0
#define KBD_TYPE_PC82 1
#define KBD_TYPE_XT82 2
#define KBD_TYPE_XT86 3
#define KBD_TYPE_COMPAQ 4
#define KBD_TYPE_TANDY 5
#define KBD_TYPE_TOSHIBA 6
#define KBD_TYPE_VTECH 7
#define KBD_TYPE_OLIVETTI 8
#define KBD_TYPE_ZENITH 9
#define KBD_TYPE_PRAVETZ 10
#define KBD_TYPE_XTCLONE 11
/* Keyboard Types */
enum {
KBD_TYPE_PC81 = 0,
KBD_TYPE_PC82,
KBD_TYPE_XT82,
KBD_TYPE_XT86,
KBD_TYPE_COMPAQ,
KBD_TYPE_TANDY,
KBD_TYPE_TOSHIBA,
KBD_TYPE_VTECH,
KBD_TYPE_OLIVETTI,
KBD_TYPE_ZENITH,
KBD_TYPE_PRAVETZ,
KBD_TYPE_HYUNDAI,
KBD_TYPE_XTCLONE
};
typedef struct xtkbd_t {
int want_irq;
@@ -530,7 +533,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
switch (port) {
case 0x61: /* Keyboard Control Register (aka Port B) */
if (!(val & 0x80)) {
if (!(val & 0x80) || (kbd->type == KBD_TYPE_HYUNDAI)) {
new_clock = !!(val & 0x40);
if (!kbd->clock && new_clock) {
key_queue_start = key_queue_end = 0;
@@ -540,7 +543,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
}
}
kbd->pb = val;
if (!(kbd->pb & 0x80))
if (!(kbd->pb & 0x80) || (kbd->type == KBD_TYPE_HYUNDAI))
kbd->clock = !!(kbd->pb & 0x40);
ppi.pb = val;
@@ -603,10 +606,10 @@ kbd_read(uint16_t port, void *priv)
(kbd->type == KBD_TYPE_PC82) || (kbd->type == KBD_TYPE_PRAVETZ) ||
(kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86) ||
(kbd->type == KBD_TYPE_XTCLONE) || (kbd->type == KBD_TYPE_COMPAQ) ||
(kbd->type == KBD_TYPE_ZENITH))) {
(kbd->type == KBD_TYPE_ZENITH) || (kbd->type == KBD_TYPE_HYUNDAI))) {
if ((kbd->type == KBD_TYPE_PC81) || (kbd->type == KBD_TYPE_PC82) ||
(kbd->type == KBD_TYPE_XTCLONE) || (kbd->type == KBD_TYPE_COMPAQ) ||
(kbd->type == KBD_TYPE_PRAVETZ))
(kbd->type == KBD_TYPE_PRAVETZ) || (kbd->type == KBD_TYPE_HYUNDAI))
ret = (kbd->pd & ~0x02) | (hasfpu ? 0x02 : 0x00);
else if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86))
/* According to Ruud on the PCem forum, this is supposed to
@@ -696,7 +699,7 @@ kbd_read(uint16_t port, void *priv)
case 0x63: /* Keyboard Configuration Register (aka Port D) */
if ((kbd->type == KBD_TYPE_XT82) || (kbd->type == KBD_TYPE_XT86) ||
(kbd->type == KBD_TYPE_XTCLONE) || (kbd->type == KBD_TYPE_COMPAQ) ||
(kbd->type == KBD_TYPE_TOSHIBA))
(kbd->type == KBD_TYPE_TOSHIBA) || (kbd->type == KBD_TYPE_HYUNDAI))
ret = kbd->pd;
break;
@@ -762,7 +765,7 @@ kbd_init(const device_t *info)
(kbd->type == KBD_TYPE_PRAVETZ) || (kbd->type == KBD_TYPE_XT82) ||
(kbd->type <= KBD_TYPE_XT86) || (kbd->type == KBD_TYPE_XTCLONE) ||
(kbd->type == KBD_TYPE_COMPAQ) || (kbd->type == KBD_TYPE_TOSHIBA) ||
(kbd->type == KBD_TYPE_OLIVETTI)) {
(kbd->type == KBD_TYPE_OLIVETTI) || (kbd->type == KBD_TYPE_HYUNDAI)) {
/* DIP switch readout: bit set = OFF, clear = ON. */
if (kbd->type == KBD_TYPE_OLIVETTI)
/* Olivetti M19
@@ -781,7 +784,8 @@ kbd_init(const device_t *info)
/* Switches 3, 4 - memory size. */
if ((kbd->type == KBD_TYPE_XT86) || (kbd->type == KBD_TYPE_XTCLONE) ||
(kbd->type == KBD_TYPE_COMPAQ) || (kbd->type == KBD_TYPE_TOSHIBA)) {
(kbd->type == KBD_TYPE_HYUNDAI) || (kbd->type == KBD_TYPE_COMPAQ) ||
(kbd->type == KBD_TYPE_TOSHIBA)) {
switch (mem_size) {
case 256:
kbd->pd |= 0x00;
@@ -1076,6 +1080,20 @@ const device_t keyboard_xt_zenith_device = {
.config = NULL
};
const device_t keyboard_xt_hyundai_device = {
.name = "Hyundai XT Keyboard",
.internal_name = "keyboard_x_hyundai",
.flags = 0,
.local = KBD_TYPE_HYUNDAI,
.init = kbd_init,
.close = kbd_close,
.reset = kbd_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t keyboard_xtclone_device = {
.name = "XT (Clone) Keyboard",
.internal_name = "keyboard_xtclone",

View File

@@ -2651,7 +2651,7 @@ ide_board_close(int board)
if (dev->type == IDE_ATAPI)
dev->tf->atastat = DRDY_STAT | DSC_STAT;
else if (dev->tf != NULL) {
else if (!(dev->type & IDE_SHADOW) && (dev->tf != NULL)) {
free(dev->tf);
dev->tf = NULL;
}

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@@ -226,6 +226,7 @@ extern const device_t keyboard_xt_lxt3_device;
# endif /*defined(DEV_BRANCH) && defined(USE_LASERXT) */
extern const device_t keyboard_xt_olivetti_device;
extern const device_t keyboard_xt_zenith_device;
extern const device_t keyboard_xt_hyundai_device;
extern const device_t keyboard_xtclone_device;
extern const device_t keyboard_at_device;
extern const device_t keyboard_at_siemens_device;

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@@ -493,6 +493,14 @@ machine_xt_vendex_init(const machine_t *model)
return ret;
}
static void
machine_xt_hyundai_common_init(const machine_t *model)
{
device_add(&keyboard_xt_hyundai_device);
machine_xt_common_init(model);
}
int
machine_xt_super16t_init(const machine_t *model)
{
@@ -504,7 +512,7 @@ machine_xt_super16t_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_xt_clone_init(model);
machine_xt_hyundai_common_init(model);
/* On-board FDC cannot be disabled */
device_add(&fdc_xt_device);
@@ -523,7 +531,7 @@ machine_xt_super16te_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_xt_clone_init(model);
machine_xt_hyundai_common_init(model);
/* On-board FDC cannot be disabled */
device_add(&fdc_xt_device);

View File

@@ -112,12 +112,8 @@ static const device_t zenith_scratchpad_device = {
void
machine_zenith_init(const machine_t *model)
{
machine_common_init(model);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_xt_device);
device_add(&zenith_scratchpad_device);
pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt);
@@ -144,6 +140,9 @@ machine_xt_z184_init(const machine_t *model)
machine_zenith_init(model);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_xt_device);
lpt1_remove(); /* only one parallel port */
lpt2_remove();
lpt1_init(0x278);
@@ -171,6 +170,9 @@ machine_xt_z151_init(const machine_t *model)
machine_zenith_init(model);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_xt_tandy_device);
return ret;
}
@@ -191,6 +193,9 @@ machine_xt_z159_init(const machine_t *model)
machine_zenith_init(model);
if (fdc_type == FDC_INTERNAL)
device_add(&fdc_xt_tandy_device);
/* parallel port is on the memory board */
lpt1_remove(); /* only one parallel port */
lpt2_remove();

View File

@@ -168,13 +168,15 @@ pit_irq0_timer(int new_out, int old_out)
void
machine_common_init(UNUSED(const machine_t *model))
{
uint8_t cpu_requires_fast_pit = is486 || (is8086 && (cpu_s->rspeed >= 8000000));
/* System devices first. */
pic_init();
dma_init();
int pit_type = IS_AT(machine) ? PIT_8254 : PIT_8253;
/* Select fast PIT if needed */
if (((pit_mode == -1) && is486) || (pit_mode == 1))
if (((pit_mode == -1) && cpu_requires_fast_pit) || (pit_mode == 1))
pit_type += 2;
pit_common_init(pit_type, pit_irq0_timer, NULL);

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@@ -1083,7 +1083,7 @@ const machine_t machines[] = {
.ram = {
.min = 256,
.max = 640,
.step = 256
.step = 128
},
.nvrmask = 0,
.kbc_device = &keyboard_xt_olivetti_device,
@@ -1161,7 +1161,7 @@ const machine_t machines[] = {
.ram = {
.min = 256,
.max = 640,
.step = 256
.step = 128
},
.nvrmask = 0,
.kbc_device = &keyboard_xtclone_device,
@@ -1317,7 +1317,7 @@ const machine_t machines[] = {
.ram = {
.min = 256,
.max = 640,
.step = 256
.step = 128
},
.nvrmask = 0,
.kbc_device = &keyboard_xtclone_device,

View File

@@ -404,6 +404,8 @@ pitf_write(uint16_t addr, uint8_t val, void *priv)
pit_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv);
cycles -= ISA_CYCLES(8);
switch (addr & 3) {
case 3: /* control */
t = val >> 6;
@@ -541,6 +543,8 @@ pitf_read(uint16_t addr, void *priv)
int t = (addr & 3);
ctrf_t *ctr;
cycles -= ISA_CYCLES(8);
switch (addr & 3) {
case 3: /* Control. */
/* This is 8254-only, 8253 returns 0x00. */

View File

@@ -37,6 +37,7 @@
#include <86box/video.h>
#include <86box/port_6x.h>
#include <86box/plat_unused.h>
#include <86box/random.h>
#define PS2_REFRESH_TIME (16 * TIMER_USEC)
@@ -52,6 +53,8 @@ port_6x_write(uint16_t port, uint8_t val, void *priv)
port &= 3;
cycles -= ISA_CYCLES(8);
if ((port == 3) && (dev->flags & PORT_6X_MIRROR))
port = 1;
@@ -80,6 +83,8 @@ port_61_read_simple(UNUSED(uint16_t port), UNUSED(void *priv))
{
uint8_t ret = ppi.pb & 0x1f;
cycles -= ISA_CYCLES(8);
if (ppispeakon)
ret |= 0x20;
@@ -92,6 +97,8 @@ port_61_read(UNUSED(uint16_t port), void *priv)
const port_6x_t *dev = (port_6x_t *) priv;
uint8_t ret = 0xff;
cycles -= ISA_CYCLES(8);
if (dev->flags & PORT_6X_EXT_REF) {
ret = ppi.pb & 0x0f;

View File

@@ -439,6 +439,7 @@ pc87306_reset_common(void *priv)
fdc_reset(dev->fdc);
pc87306_gpio_init(dev);
nvr_lock_set(0x00, 256, 0, dev->nvr);
nvr_at_handler(0, 0x0070, dev->nvr);
nvr_at_handler(1, 0x0070, dev->nvr);
nvr_bank_set(0, 0, dev->nvr);
nvr_wp_set(0, 0, dev->nvr);

View File

@@ -945,7 +945,7 @@ sb_ct1745_mixer_write(uint16_t addr, uint8_t val, void *priv)
break;
case 0xff:
if (sb->dsp.sb_type >= SB16) {
if (sb->dsp.sb_type > SBAWE32) {
/*
Bit 5: High DMA channel enabled (0 = yes, 1 = no);
Bit 2: ????;
@@ -1173,7 +1173,7 @@ sb_ct1745_mixer_read(uint16_t addr, void *priv)
- Register FF = FF: Volume playback normal.
- Register FF = Not FF: Volume playback low unless
bit 6 of 82h is set. */
if (sb->dsp.sb_type >= SB16)
if (sb->dsp.sb_type > SBAWE32)
ret = mixer->regs[mixer->index];
break;
@@ -1599,8 +1599,14 @@ sb_16_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv)
sb_dsp_setdma8(&sb->dsp, val);
val = config->dma[1].dma;
if (val != ISAPNP_DMA_DISABLED)
sb_dsp_setdma16(&sb->dsp, val);
sb_dsp_setdma16_enabled(&sb->dsp, val != ISAPNP_DMA_DISABLED);
sb_dsp_setdma16_translate(&sb->dsp, val < ISAPNP_DMA_DISABLED);
if (val != ISAPNP_DMA_DISABLED) {
if (sb->dsp.sb_16_dma_supported)
sb_dsp_setdma16(&sb->dsp, val);
else
sb_dsp_setdma16_8(&sb->dsp, val);
}
}
break;
@@ -1635,90 +1641,8 @@ sb_vibra16_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *
switch (ld) {
case 0: /* Audio */
io_removehandler(addr, 0x0004,
sb->opl.read, NULL, NULL,
sb->opl.write, NULL, NULL,
sb->opl.priv);
io_removehandler(addr + 8, 0x0002,
sb->opl.read, NULL, NULL,
sb->opl.write, NULL, NULL,
sb->opl.priv);
io_removehandler(addr + 4, 0x0002,
sb_ct1745_mixer_read, NULL, NULL,
sb_ct1745_mixer_write, NULL, NULL,
sb);
addr = sb->opl_pnp_addr;
if (addr) {
sb->opl_pnp_addr = 0;
io_removehandler(addr, 0x0004,
sb->opl.read, NULL, NULL,
sb->opl.write, NULL, NULL,
sb->opl.priv);
}
sb_dsp_setaddr(&sb->dsp, 0);
sb_dsp_setirq(&sb->dsp, 0);
sb_dsp_setdma8(&sb->dsp, ISAPNP_DMA_DISABLED);
sb_dsp_setdma16(&sb->dsp, ISAPNP_DMA_DISABLED);
mpu401_change_addr(sb->mpu, 0);
if (config->activate) {
addr = config->io[0].base;
if (addr != ISAPNP_IO_DISABLED) {
io_sethandler(addr, 0x0004,
sb->opl.read, NULL, NULL,
sb->opl.write, NULL, NULL,
sb->opl.priv);
io_sethandler(addr + 8, 0x0002,
sb->opl.read, NULL, NULL,
sb->opl.write, NULL, NULL,
sb->opl.priv);
io_sethandler(addr + 4, 0x0002,
sb_ct1745_mixer_read, NULL, NULL,
sb_ct1745_mixer_write, NULL, NULL,
sb);
sb_dsp_setaddr(&sb->dsp, addr);
}
addr = config->io[1].base;
if (addr != ISAPNP_IO_DISABLED)
mpu401_change_addr(sb->mpu, addr);
addr = config->io[2].base;
if (addr != ISAPNP_IO_DISABLED) {
sb->opl_pnp_addr = addr;
io_sethandler(addr, 0x0004,
sb->opl.read, NULL, NULL,
sb->opl.write, NULL, NULL,
sb->opl.priv);
}
val = config->irq[0].irq;
if (val != ISAPNP_IRQ_DISABLED)
sb_dsp_setirq(&sb->dsp, val);
val = config->dma[0].dma;
if (val != ISAPNP_DMA_DISABLED)
sb_dsp_setdma8(&sb->dsp, val);
val = config->dma[1].dma;
sb_dsp_setdma16_enabled(&sb->dsp, val != ISAPNP_DMA_DISABLED);
sb_dsp_setdma16_translate(&sb->dsp, val < ISAPNP_DMA_DISABLED);
if (val != ISAPNP_DMA_DISABLED) {
if (sb->dsp.sb_16_dma_supported)
sb_dsp_setdma16(&sb->dsp, val);
else
sb_dsp_setdma16_8(&sb->dsp, val);
}
}
break;
case 1: /* Game */
gameport_remap(sb->gameport, (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) ? config->io[0].base : 0);
sb_16_pnp_config_changed(ld * 3, config, sb);
break;
default:
@@ -2179,6 +2103,7 @@ sb_16_init(UNUSED(const device_t *info))
sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma"));
sb_dsp_setdma16(&sb->dsp, device_get_config_int("dma16"));
sb_dsp_setdma16_supported(&sb->dsp, 1);
sb_dsp_setdma16_enabled(&sb->dsp, 1);
sb_ct1745_mixer_reset(sb);
if (sb->opl_enabled) {
@@ -2233,6 +2158,7 @@ sb_16_reply_mca_init(UNUSED(const device_t *info))
sb_dsp_init(&sb->dsp, SB16, SB_SUBTYPE_DEFAULT, sb);
sb_dsp_setdma16_supported(&sb->dsp, 1);
sb_dsp_setdma16_enabled(&sb->dsp, 1);
sb_ct1745_mixer_reset(sb);
sb->mixer_enabled = 1;
@@ -2415,6 +2341,7 @@ sb_16_compat_init(const device_t *info)
sb_dsp_init(&sb->dsp, SB16, SB_SUBTYPE_DEFAULT, sb);
sb_dsp_setdma16_supported(&sb->dsp, 1);
sb_dsp_setdma16_enabled(&sb->dsp, 1);
sb_ct1745_mixer_reset(sb);
sb->mixer_enabled = 1;
@@ -2488,6 +2415,7 @@ sb_awe32_init(UNUSED(const device_t *info))
sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma"));
sb_dsp_setdma16(&sb->dsp, device_get_config_int("dma16"));
sb_dsp_setdma16_supported(&sb->dsp, 1);
sb_dsp_setdma16_enabled(&sb->dsp, 1);
sb_ct1745_mixer_reset(sb);
if (sb->opl_enabled) {