Merge branch 'master' of https://github.com/86Box/86Box
This commit is contained in:
@@ -33,8 +33,10 @@
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*
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*
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* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
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* Jasmine Iwanek <jriwanek@gmail.com>
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*
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* Copyright 2018 Fred N. van Kempen.
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* Copyright 2018 Fred N. van Kempen.
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* Copyright 2022-2024 Jasmine Iwanek.
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*
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* Redistribution and use in source and binary forms, with
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* or without modification, are permitted provided that the
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@@ -98,6 +100,7 @@
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#define ISAMEM_ABOVEBOARD_CARD 12
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#define ISAMEM_BRAT_CARD 13
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#define ISAMEM_EV165A_CARD 14
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#define ISAMEM_LOTECH_CARD 15
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#define ISAMEM_DEBUG 0
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@@ -105,7 +108,7 @@
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#define RAM_UMAMEM (384 << 10) /* upper memory block */
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#define RAM_EXTMEM (1024 << 10) /* start of high memory */
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#define EMS_MAXSIZE (2048 << 10) /* max EMS memory size */
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#define EMS_MAXSIZE (4096 << 10) /* max EMS memory size */
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#define EMS_PGSIZE (16 << 10) /* one page is this big */
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#define EMS_MAXPAGE 4 /* number of viewport pages */
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@@ -318,6 +321,26 @@ ems_read(uint16_t port, void *priv)
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return ret;
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}
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/* Handle a READ operation from one of our registers. */
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static uint8_t
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consecutive_ems_read(uint16_t port, void *priv)
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{
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const memdev_t *dev = (memdev_t *) priv;
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uint8_t ret = 0xff;
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int vpage;
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/* Get the viewport page number. */
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vpage = (port - dev->base_addr);
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isamem_log("ISAMEM: read(%04x) = %02x) page=%d\n", port, ret, vpage);
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ret = dev->ems[vpage].page;
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if (dev->ems[vpage].enabled)
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ret |= 0x80;
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return ret;
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}
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/* Handle a WRITE operation to one of our registers. */
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static void
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ems_write(uint16_t port, uint8_t val, void *priv)
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@@ -393,6 +416,47 @@ ems_write(uint16_t port, uint8_t val, void *priv)
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}
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}
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/* Handle a WRITE operation to one of our registers. */
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static void
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consecutive_ems_write(uint16_t port, uint8_t val, void *priv)
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{
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memdev_t *dev = (memdev_t *) priv;
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int vpage;
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/* Get the viewport page number. */
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vpage = (port - dev->base_addr);
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isamem_log("ISAMEM: write(%04x, %02x) page=%d\n", port, val, vpage);
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isamem_log("EMS: write(%02x) to register 0! (%02x)\n", val);
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/* Set the page number. */
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dev->ems[vpage].enabled = (val & 0xff);
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dev->ems[vpage].page = (val & 0xff);
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/* Make sure we can do that.. */
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if (dev->flags & FLAG_CONFIG) {
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if (dev->ems[vpage].page < dev->ems_pages) {
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/* Pre-calculate the page address in EMS RAM. */
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dev->ems[vpage].addr = dev->ram + dev->ems_start + ((val & 0xff) * EMS_PGSIZE);
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} else {
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/* That page does not exist. */
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dev->ems[vpage].enabled = 0;
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}
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if (dev->ems[vpage].enabled) {
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/* Update the EMS RAM address for this page. */
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mem_mapping_set_exec(&dev->ems[vpage].mapping,
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dev->ems[vpage].addr);
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/* Enable this page. */
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mem_mapping_enable(&dev->ems[vpage].mapping);
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} else {
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/* Disable this page. */
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mem_mapping_disable(&dev->ems[vpage].mapping);
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}
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}
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}
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/* Initialize the device for use. */
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static void *
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isamem_init(const device_t *info)
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@@ -435,6 +499,7 @@ isamem_init(const device_t *info)
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case ISAMEM_EMS5150_CARD: /* Micro Mainframe EMS-5150(T) */
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dev->base_addr = device_get_config_hex16("base");
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dev->total_size = device_get_config_int("size");
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dev->start_addr = 0;
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dev->frame_addr = 0xD0000;
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dev->flags |= (FLAG_EMS | FLAG_CONFIG);
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break;
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@@ -476,6 +541,13 @@ isamem_init(const device_t *info)
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dev->flags |= FLAG_FAST;
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break;
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case ISAMEM_LOTECH_CARD:
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dev->base_addr = device_get_config_hex16("base");
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dev->total_size = device_get_config_int("size");
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dev->start_addr = 0;
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dev->frame_addr = device_get_config_hex20("frame");
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dev->flags |= (FLAG_EMS | FLAG_CONFIG);
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default:
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break;
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}
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@@ -625,7 +697,7 @@ isamem_init(const device_t *info)
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/* If EMS is enabled, use the remainder for EMS. */
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if (dev->flags & FLAG_EMS) {
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/* EMS 3.2 cannot have more than 2048KB per board. */
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/* EMS 3.2 cannot have more than 4096KB per board. */
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t = k;
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if (t > EMS_MAXSIZE)
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t = EMS_MAXSIZE;
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@@ -663,9 +735,14 @@ isamem_init(const device_t *info)
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mem_mapping_disable(&dev->ems[i].mapping);
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/* Set up an I/O port handler. */
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io_sethandler(dev->base_addr + (EMS_PGSIZE * i), 2,
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ems_read, NULL, NULL, ems_write, NULL, NULL, dev);
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if (dev->board != ISAMEM_LOTECH_CARD)
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io_sethandler(dev->base_addr + (EMS_PGSIZE * i), 2,
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ems_read, NULL, NULL, ems_write, NULL, NULL, dev);
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}
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if (dev->board == ISAMEM_LOTECH_CARD)
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io_sethandler(dev->base_addr, 4,
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consecutive_ems_read, NULL, NULL, consecutive_ems_write, NULL, NULL, dev);
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}
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/* Let them know our device instance. */
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@@ -1439,6 +1516,72 @@ static const device_t brat_device = {
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};
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#endif
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static const device_config_t lotech_config[] = {
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// clang-format off
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{
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.name = "base",
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.description = "Address",
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.type = CONFIG_HEX16,
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.default_string = "",
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.default_int = 0x0260,
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.file_filter = "",
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.spinner = { 0 },
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.selection = {
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{ .description = "260H", .value = 0x0260 },
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{ .description = "264H", .value = 0x0264 },
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{ .description = "268H", .value = 0x0268 },
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{ .description = "26CH", .value = 0x026C },
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{ .description = "" }
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},
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},
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{
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.name = "frame",
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.description = "Frame Address",
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.type = CONFIG_HEX20,
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.default_string = "",
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.default_int = 0xe0000,
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.file_filter = "",
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.spinner = { 0 },
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.selection = {
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{ .description = "Disabled", .value = 0x00000 },
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{ .description = "C000H", .value = 0xC0000 },
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{ .description = "D000H", .value = 0xD0000 },
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{ .description = "E000H", .value = 0xE0000 },
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{ .description = "" }
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},
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},
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{
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.name = "size",
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.description = "Memory Size",
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.type = CONFIG_SPINNER,
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.default_string = "",
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.default_int = 2048,
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.file_filter = "",
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.spinner = {
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.min = 512,
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.max = 4096,
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.step = 512
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},
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.selection = { { 0 } }
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},
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{ .name = "", .description = "", .type = CONFIG_END }
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// clang-format on
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};
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static const device_t lotech_device = {
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.name = "Lo-tech EMS Board",
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.internal_name = "lotechems",
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.flags = DEVICE_ISA,
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.local = ISAMEM_LOTECH_CARD,
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.init = isamem_init,
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.close = isamem_close,
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.reset = NULL,
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{ .available = NULL },
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = lotech_config
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};
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#if defined(DEV_BRANCH) && defined(USE_ISAMEM_RAMPAGE)
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static const device_config_t rampage_config[] = {
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// clang-format off
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@@ -1676,6 +1819,7 @@ static const struct {
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#if defined(DEV_BRANCH) && defined(USE_ISAMEM_IAB)
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{ &iab_device },
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#endif
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{ &lotech_device },
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{ NULL }
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// clang-format on
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};
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@@ -528,6 +528,7 @@ extern const device_t s3_diamond_stealth_2000_pci_device;
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extern const device_t s3_diamond_stealth_3000_pci_device;
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extern const device_t s3_stb_velocity_3d_pci_device;
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extern const device_t s3_virge_375_pci_device;
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extern const device_t s3_virge_375_onboard_pci_device;
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extern const device_t s3_diamond_stealth_2000pro_pci_device;
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extern const device_t s3_virge_385_pci_device;
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extern const device_t s3_virge_357_pci_device;
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@@ -33,6 +33,7 @@
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#include <86box/timer.h>
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#include <86box/nvr.h>
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#include <86box/sio.h>
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#include <86box/sound.h>
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#include <86box/hwm.h>
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#include <86box/spd.h>
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#include <86box/video.h>
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@@ -322,6 +323,12 @@ machine_at_ap440fx_init(const machine_t *model)
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device_add(&pc87307_device);
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device_add(&intel_flash_bxt_ami_device);
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if (sound_card_current[0] == SOUND_INTERNAL)
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device_add(&cs4236b_device);
|
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if (gfxcard[0] == VID_INTERNAL)
|
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device_add(&s3_virge_375_onboard_pci_device);
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return ret;
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}
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||||
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||||
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@@ -58,28 +58,28 @@ extern const device_t ps1_2011_device;
|
||||
|
||||
const machine_filter_t machine_types[] = {
|
||||
{ "None", MACHINE_TYPE_NONE },
|
||||
{ "8088", MACHINE_TYPE_8088 },
|
||||
{ "8086", MACHINE_TYPE_8086 },
|
||||
{ "80286", MACHINE_TYPE_286 },
|
||||
{ "i386SX", MACHINE_TYPE_386SX },
|
||||
{ "486SLC", MACHINE_TYPE_486SLC },
|
||||
{ "i386DX", MACHINE_TYPE_386DX },
|
||||
{ "i386DX/i486", MACHINE_TYPE_386DX_486 },
|
||||
{ "i486 (Socket 168 and 1)", MACHINE_TYPE_486 },
|
||||
{ "i486 (Socket 2)", MACHINE_TYPE_486_S2 },
|
||||
{ "i486 (Socket 3)", MACHINE_TYPE_486_S3 },
|
||||
{ "i486 (Miscellaneous)", MACHINE_TYPE_486_MISC },
|
||||
{ "Socket 4", MACHINE_TYPE_SOCKET4 },
|
||||
{ "Socket 5", MACHINE_TYPE_SOCKET5 },
|
||||
{ "Socket 7 (Single Voltage)", MACHINE_TYPE_SOCKET7_3V },
|
||||
{ "Socket 7 (Dual Voltage)", MACHINE_TYPE_SOCKET7 },
|
||||
{ "Super Socket 7", MACHINE_TYPE_SOCKETS7 },
|
||||
{ "Socket 8", MACHINE_TYPE_SOCKET8 },
|
||||
{ "Slot 1", MACHINE_TYPE_SLOT1 },
|
||||
{ "Slot 1/2", MACHINE_TYPE_SLOT1_2 },
|
||||
{ "Slot 1/Socket 370", MACHINE_TYPE_SLOT1_370 },
|
||||
{ "Slot 2", MACHINE_TYPE_SLOT2 },
|
||||
{ "Socket 370", MACHINE_TYPE_SOCKET370 },
|
||||
{ "[1979] 8088", MACHINE_TYPE_8088 },
|
||||
{ "[1978] 8086", MACHINE_TYPE_8086 },
|
||||
{ "[1982] 80286", MACHINE_TYPE_286 },
|
||||
{ "[1988] i386SX", MACHINE_TYPE_386SX },
|
||||
{ "[1992] 486SLC", MACHINE_TYPE_486SLC },
|
||||
{ "[1985] i386DX", MACHINE_TYPE_386DX },
|
||||
{ "[1989] i386DX/i486", MACHINE_TYPE_386DX_486 },
|
||||
{ "[1992] i486 (Socket 168 and 1)", MACHINE_TYPE_486 },
|
||||
{ "[1992] i486 (Socket 2)", MACHINE_TYPE_486_S2 },
|
||||
{ "[1994] i486 (Socket 3)", MACHINE_TYPE_486_S3 },
|
||||
{ "[1992] i486 (Miscellaneous)", MACHINE_TYPE_486_MISC },
|
||||
{ "[1993] Socket 4", MACHINE_TYPE_SOCKET4 },
|
||||
{ "[1994] Socket 5", MACHINE_TYPE_SOCKET5 },
|
||||
{ "[1995] Socket 7 (Single Voltage)", MACHINE_TYPE_SOCKET7_3V },
|
||||
{ "[1995] Socket 7 (Dual Voltage)", MACHINE_TYPE_SOCKET7 },
|
||||
{ "[1998] Super Socket 7", MACHINE_TYPE_SOCKETS7 },
|
||||
{ "[1995] Socket 8", MACHINE_TYPE_SOCKET8 },
|
||||
{ "[1996] Slot 1", MACHINE_TYPE_SLOT1 },
|
||||
{ "[1998] Slot 1/2", MACHINE_TYPE_SLOT1_2 },
|
||||
{ "[1998] Slot 1/Socket 370", MACHINE_TYPE_SLOT1_370 },
|
||||
{ "[1998] Slot 2", MACHINE_TYPE_SLOT2 },
|
||||
{ "[1998] Socket 370", MACHINE_TYPE_SOCKET370 },
|
||||
{ "Miscellaneous", MACHINE_TYPE_MISC }
|
||||
};
|
||||
|
||||
@@ -5182,7 +5182,7 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
/* The board has a "ASII KB-100" which I was not able to find any information about,
|
||||
/* The board has a "ASII KB-100" which I was not able to find any information about,
|
||||
but the BIOS sends commands C9 without a parameter and D5, both of which are
|
||||
Phoenix MultiKey commands. */
|
||||
{
|
||||
@@ -10606,7 +10606,7 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
/* [TEST] The board doesn't seem to have a KBC at all, which probably means it's an on-chip one on the PC87306 SIO.
|
||||
/* [TEST] The board doesn't seem to have a KBC at all, which probably means it's an on-chip one on the PC87306 SIO.
|
||||
A list on a Danish site shows the BIOS as having a -0 string, indicating non-AMI KBC firmware. */
|
||||
{
|
||||
.name = "[i430HX] Supermicro P55T2S",
|
||||
@@ -12658,7 +12658,7 @@ const machine_t machines[] = {
|
||||
.snd_device = NULL,
|
||||
.net_device = NULL
|
||||
},
|
||||
|
||||
|
||||
/* ALi ALADDiN IV+ */
|
||||
/* Has the ALi M1543 southbridge with on-chip KBC. */
|
||||
{
|
||||
@@ -13051,7 +13051,7 @@ const machine_t machines[] = {
|
||||
.max_multi = 5.5
|
||||
},
|
||||
.bus_flags = MACHINE_PS2_A97 | MACHINE_BUS_USB,
|
||||
.flags = MACHINE_IDE_DUAL | MACHINE_SOUND | MACHINE_APM | MACHINE_ACPI | MACHINE_GAMEPORT | MACHINE_USB,
|
||||
.flags = MACHINE_IDE_DUAL | MACHINE_SOUND | MACHINE_APM | MACHINE_ACPI | MACHINE_GAMEPORT | MACHINE_USB,
|
||||
.ram = {
|
||||
.min = 8192,
|
||||
.max = 786432,
|
||||
@@ -13462,7 +13462,7 @@ const machine_t machines[] = {
|
||||
.max_multi = 3.5
|
||||
},
|
||||
.bus_flags = MACHINE_PS2_PCI | MACHINE_BUS_USB,
|
||||
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_USB, /* Machine has internal video: S3 ViRGE/DX and sound: Crystal CS4236B */
|
||||
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_SOUND | MACHINE_VIDEO | MACHINE_USB, /* Machine has internal video: S3 ViRGE/DX and sound: Crystal CS4236B */
|
||||
.ram = {
|
||||
.min = 8192,
|
||||
.max = 131072,
|
||||
@@ -13476,8 +13476,8 @@ const machine_t machines[] = {
|
||||
.device = NULL,
|
||||
.fdc_device = NULL,
|
||||
.sio_device = NULL,
|
||||
.vid_device = NULL,
|
||||
.snd_device = NULL,
|
||||
.vid_device = &s3_virge_375_onboard_pci_device,
|
||||
.snd_device = &cs4236b_device,
|
||||
.net_device = NULL
|
||||
},
|
||||
/* According to tests from real hardware: This has AMI MegaKey KBC firmware on the
|
||||
|
||||
@@ -146,8 +146,8 @@ ncr53c400_write(uint32_t addr, uint8_t val, void *priv)
|
||||
if (ncr400->buffer_host_pos == MIN(128, dev->buffer_length)) {
|
||||
ncr400->status_ctrl |= STATUS_BUFFER_NOT_READY;
|
||||
ncr400->busy = 1;
|
||||
if (!(ncr->mode & MODE_MONITOR_BUSY))
|
||||
timer_on_auto(&ncr400->timer, ncr->period / 280.0);
|
||||
if (!(ncr->mode & MODE_MONITOR_BUSY) && ((scsi_device_get_callback(dev) > 0.0)))
|
||||
timer_on_auto(&ncr400->timer, ncr->period / 250.0);
|
||||
}
|
||||
}
|
||||
break;
|
||||
@@ -182,9 +182,12 @@ ncr53c400_write(uint32_t addr, uint8_t val, void *priv)
|
||||
memset(ncr400->buffer, 0, MIN(128, dev->buffer_length));
|
||||
if (ncr->mode & MODE_MONITOR_BUSY)
|
||||
timer_on_auto(&ncr400->timer, ncr->period);
|
||||
else
|
||||
else if (scsi_device_get_callback(dev) > 0.0)
|
||||
timer_on_auto(&ncr400->timer, 40.0);
|
||||
ncr53c400_log("DMA timer on, callback=%lf, scsi buflen=%d, waitdata=%d, waitcomplete=%d, clearreq=%d, datawait=%d, enabled=%d.\n", scsi_device_get_callback(dev), dev->buffer_length, ncr->wait_complete, ncr->wait_data, ncr->wait_complete, ncr->clear_req, ncr->data_wait, timer_is_enabled(&ncr400->timer));
|
||||
else
|
||||
timer_on_auto(&ncr400->timer, ncr->period);
|
||||
|
||||
ncr53c400_log("DMA timer on=%02x, callback=%lf, scsi buflen=%d, waitdata=%d, waitcomplete=%d, clearreq=%d, datawait=%d, enabled=%d.\n", ncr->mode & MODE_MONITOR_BUSY, scsi_device_get_callback(dev), dev->buffer_length, ncr->wait_complete, ncr->wait_data, ncr->wait_complete, ncr->clear_req, ncr->data_wait, timer_is_enabled(&ncr400->timer));
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -239,8 +242,8 @@ ncr53c400_read(uint32_t addr, void *priv)
|
||||
if (ncr400->buffer_host_pos == MIN(128, dev->buffer_length)) {
|
||||
ncr400->status_ctrl |= STATUS_BUFFER_NOT_READY;
|
||||
ncr53c400_log("Transfer busy read, status = %02x.\n", ncr400->status_ctrl);
|
||||
if (!(ncr->mode & MODE_MONITOR_BUSY))
|
||||
timer_on_auto(&ncr400->timer, ncr->period / 280.0);
|
||||
if (!(ncr->mode & MODE_MONITOR_BUSY) && (scsi_device_get_callback(dev) > 0.0))
|
||||
timer_on_auto(&ncr400->timer, ncr->period / 250.0);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -145,7 +145,6 @@ static video_timings_t timing_s3_stealth64_vlb = { .type = VIDEO_BUS, .write_b =
|
||||
static video_timings_t timing_s3_stealth64_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 26, .read_w = 26, .read_l = 42 };
|
||||
static video_timings_t timing_s3_vision864_vlb = { .type = VIDEO_BUS, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 };
|
||||
static video_timings_t timing_s3_vision864_pci = { .type = VIDEO_PCI, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 };
|
||||
static video_timings_t timing_s3_vision868_vlb = { .type = VIDEO_BUS, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 };
|
||||
static video_timings_t timing_s3_vision868_pci = { .type = VIDEO_PCI, .write_b = 4, .write_w = 4, .write_l = 5, .read_b = 20, .read_w = 20, .read_l = 35 };
|
||||
static video_timings_t timing_s3_vision964_vlb = { .type = VIDEO_BUS, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 20, .read_w = 20, .read_l = 35 };
|
||||
static video_timings_t timing_s3_vision964_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 4, .read_b = 20, .read_w = 20, .read_l = 35 };
|
||||
|
||||
@@ -295,6 +295,8 @@ typedef struct virge_t {
|
||||
void *i2c, *ddc;
|
||||
|
||||
int waiting;
|
||||
|
||||
int onboard;
|
||||
} virge_t;
|
||||
|
||||
static video_timings_t timing_diamond_stealth3d_2000_pci = { .type = VIDEO_PCI, .write_b = 2, .write_w = 2, .write_l = 3, .read_b = 28, .read_w = 28, .read_l = 45 };
|
||||
@@ -1073,11 +1075,10 @@ s3_virge_updatemapping(virge_t *virge)
|
||||
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
|
||||
mem_mapping_disable(&virge->linear_mapping);
|
||||
} else {
|
||||
if (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X) {
|
||||
if (virge->chip == S3_VIRGEVX || virge->chip == S3_TRIO3D2X)
|
||||
virge->linear_base &= 0xfe000000;
|
||||
} else {
|
||||
else
|
||||
virge->linear_base &= 0xfc000000;
|
||||
}
|
||||
|
||||
mem_mapping_set_addr(&virge->linear_mapping, virge->linear_base, virge->linear_size);
|
||||
}
|
||||
@@ -4069,16 +4070,16 @@ s3_virge_pci_read(UNUSED(int func), int addr, void *priv)
|
||||
break;
|
||||
|
||||
case 0x30:
|
||||
ret = virge->pci_regs[0x30] & 0x01;
|
||||
ret = (!virge->onboard) ? (virge->pci_regs[0x30] & 0x01) : 0x00;
|
||||
break; /*BIOS ROM address*/
|
||||
case 0x31:
|
||||
ret = 0x00;
|
||||
break;
|
||||
case 0x32:
|
||||
ret = virge->pci_regs[0x32];
|
||||
ret = (!virge->onboard) ? virge->pci_regs[0x32] : 0x00;
|
||||
break;
|
||||
case 0x33:
|
||||
ret = virge->pci_regs[0x33];
|
||||
ret = (!virge->onboard) ? virge->pci_regs[0x33] : 0x00;
|
||||
break;
|
||||
|
||||
case 0x34:
|
||||
@@ -4202,6 +4203,8 @@ s3_virge_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
|
||||
case 0x30:
|
||||
case 0x32:
|
||||
case 0x33:
|
||||
if (virge->onboard)
|
||||
return;
|
||||
virge->pci_regs[addr] = val;
|
||||
if (virge->pci_regs[0x30] & 0x01) {
|
||||
uint32_t biosaddr = (virge->pci_regs[0x32] << 16) | (virge->pci_regs[0x33] << 24);
|
||||
@@ -4337,7 +4340,8 @@ s3_virge_reset(void *priv)
|
||||
virge->svga.crtc[0x37] = 1 | (7 << 5);
|
||||
virge->svga.crtc[0x53] = 8;
|
||||
|
||||
mem_mapping_disable(&virge->bios_rom.mapping);
|
||||
if (!virge->onboard)
|
||||
mem_mapping_disable(&virge->bios_rom.mapping);
|
||||
|
||||
s3_virge_updatemapping(virge);
|
||||
|
||||
@@ -4360,6 +4364,8 @@ s3_virge_init(const device_t *info)
|
||||
else
|
||||
virge->memory_size = device_get_config_int("memory");
|
||||
|
||||
virge->onboard = !!(info->local & 0x100);
|
||||
|
||||
switch (info->local) {
|
||||
case S3_VIRGE_325:
|
||||
bios_fn = ROM_VIRGE_325;
|
||||
@@ -4374,7 +4380,7 @@ s3_virge_init(const device_t *info)
|
||||
bios_fn = ROM_STB_VELOCITY_3D;
|
||||
break;
|
||||
case S3_VIRGE_DX:
|
||||
bios_fn = ROM_VIRGE_DX;
|
||||
bios_fn = virge->onboard ? NULL : ROM_VIRGE_DX;
|
||||
break;
|
||||
case S3_DIAMOND_STEALTH3D_2000PRO:
|
||||
bios_fn = ROM_DIAMOND_STEALTH3D_2000PRO;
|
||||
@@ -4408,11 +4414,12 @@ s3_virge_init(const device_t *info)
|
||||
rom_init(&virge->bios_rom, bios_fn, 0xc0000, 0x10000, 0xffff, 0, MEM_MAPPING_EXTERNAL);
|
||||
else
|
||||
rom_init(&virge->bios_rom, bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
|
||||
|
||||
mem_mapping_disable(&virge->bios_rom.mapping);
|
||||
}
|
||||
|
||||
mem_mapping_disable(&virge->bios_rom.mapping);
|
||||
|
||||
mem_mapping_add(&virge->linear_mapping, 0, 0, svga_read_linear,
|
||||
mem_mapping_add(&virge->linear_mapping, 0, 0,
|
||||
svga_read_linear,
|
||||
svga_readw_linear,
|
||||
svga_readl_linear,
|
||||
svga_write_linear,
|
||||
@@ -4421,7 +4428,8 @@ s3_virge_init(const device_t *info)
|
||||
NULL,
|
||||
MEM_MAPPING_EXTERNAL,
|
||||
&virge->svga);
|
||||
mem_mapping_add(&virge->mmio_mapping, 0, 0, s3_virge_mmio_read,
|
||||
mem_mapping_add(&virge->mmio_mapping, 0, 0,
|
||||
s3_virge_mmio_read,
|
||||
s3_virge_mmio_read_w,
|
||||
s3_virge_mmio_read_l,
|
||||
s3_virge_mmio_write,
|
||||
@@ -4430,7 +4438,8 @@ s3_virge_init(const device_t *info)
|
||||
NULL,
|
||||
MEM_MAPPING_EXTERNAL,
|
||||
virge);
|
||||
mem_mapping_add(&virge->new_mmio_mapping, 0, 0, s3_virge_mmio_read,
|
||||
mem_mapping_add(&virge->new_mmio_mapping, 0, 0,
|
||||
s3_virge_mmio_read,
|
||||
s3_virge_mmio_read_w,
|
||||
s3_virge_mmio_read_l,
|
||||
s3_virge_mmio_write,
|
||||
@@ -4896,6 +4905,20 @@ const device_t s3_virge_375_pci_device = {
|
||||
.config = s3_virge_config
|
||||
};
|
||||
|
||||
const device_t s3_virge_375_onboard_pci_device = {
|
||||
.name = "S3 ViRGE/DX (375) On-Board PCI",
|
||||
.internal_name = "virge375_onboard_pci",
|
||||
.flags = DEVICE_PCI,
|
||||
.local = S3_VIRGE_DX | 0x100,
|
||||
.init = s3_virge_init,
|
||||
.close = s3_virge_close,
|
||||
.reset = s3_virge_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = s3_virge_speed_changed,
|
||||
.force_redraw = s3_virge_force_redraw,
|
||||
.config = s3_virge_config
|
||||
};
|
||||
|
||||
const device_t s3_diamond_stealth_2000pro_pci_device = {
|
||||
.name = "S3 ViRGE/DX (Diamond Stealth 3D 2000 Pro) PCI",
|
||||
.internal_name = "stealth3d_2000pro_pci",
|
||||
|
||||
Reference in New Issue
Block a user