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Remove 32-bit core dynarec

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This commit is contained in:
starfrost013
2025-09-14 15:50:01 +01:00
parent 02b0960148
commit a44ad7e776
13 changed files with 28 additions and 291 deletions
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3
src/86box.c
View File

@@ -1805,9 +1805,6 @@ pc_close(UNUSED(thread_t *ptr))
gdbstub_close();
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
mem_free();
#endif
}
#ifdef __APPLE__

4
src/arch_detect.c
View File

@@ -15,9 +15,7 @@
* Copyright 2020-2021 David Hrdlička.
*/
#if defined(__arm__) || defined(__TARGET_ARCH_ARM)
# error ARCH arm
#elif defined(__aarch64__) || defined(_M_ARM64)
#if defined(__aarch64__) || defined(_M_ARM64)
# error ARCH arm64
#elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64) || defined(_M_X64)
# error ARCH x86_64

5
src/chipset/compaq_386.c
View File

@@ -714,11 +714,6 @@ compaq_386_init(UNUSED(const device_t *info))
mem_mapping_disable(&ram_low_mapping);
mem_mapping_disable(&ram_mid_mapping);
mem_mapping_disable(&ram_high_mapping);
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
/* Should never be the case, but you never know what a user may set. */
if (mem_size > 1048576)
mem_mapping_disable(&ram_2gb_mapping);
#endif
/* Initialize in reverse order for memory mapping precedence
reasons. */

44
src/cpu/386_common.h
View File

@@ -357,22 +357,17 @@ fastreadb(uint32_t a)
mem_debug_check_addr(a, read_type);
read_type = 4;
# endif
if ((a >> 12) == pccache)
# if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return *((uint8_t *) (((uintptr_t) &pccache2[a] & 0x00000000ffffffffULL) | ((uintptr_t) &pccache2[0] & 0xffffffff00000000ULL)));
# else
return *((uint8_t *) &pccache2[a]);
# endif
t = getpccache(a);
if (cpu_state.abrt)
return 0;
pccache = a >> 12;
pccache2 = t;
# if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return *((uint8_t *) (((uintptr_t) &pccache2[a] & 0x00000000ffffffffULL) | ((uintptr_t) &pccache2[0] & 0xffffffff00000000ULL)));
# else
return *((uint8_t *) &pccache2[a]);
# endif
}
static __inline uint16_t
@@ -392,22 +387,16 @@ fastreadw(uint32_t a)
return val;
}
if ((a >> 12) == pccache)
# if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return *((uint16_t *) (((uintptr_t) &pccache2[a] & 0x00000000ffffffffULL) | ((uintptr_t) &pccache2[0] & 0xffffffff00000000ULL)));
# else
return *((uint16_t *) &pccache2[a]);
# endif
t = getpccache(a);
if (cpu_state.abrt)
return 0;
pccache = a >> 12;
pccache2 = t;
# if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return *((uint16_t *) (((uintptr_t) &pccache2[a] & 0x00000000ffffffffULL) | ((uintptr_t) &pccache2[0] & 0xffffffff00000000ULL)));
# else
return *((uint16_t *) &pccache2[a]);
# endif
}
static __inline uint32_t
@@ -431,11 +420,8 @@ fastreadl(uint32_t a)
pccache2 = t;
pccache = a >> 12;
}
# if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return *((uint32_t *) (((uintptr_t) &pccache2[a] & 0x00000000ffffffffULL) | ((uintptr_t) &pccache2[0] & 0xffffffff00000000ULL)));
# else
return *((uint32_t *) &pccache2[a]);
# endif
}
val = fastreadw(a);
val |= (fastreadw(a + 2) << 16);
@@ -447,18 +433,10 @@ static __inline void *
get_ram_ptr(uint32_t a)
{
if ((a >> 12) == pccache)
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return (void *) (((uintptr_t) &pccache2[a] & 0x00000000ffffffffULL) | ((uintptr_t) &pccache2[0] & 0xffffffff00000000ULL));
#else
return &pccache2[a];
#endif
else {
uint8_t *t = getpccache(a);
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return (void *) (((uintptr_t) &t[a] & 0x00000000ffffffffULL) | ((uintptr_t) &t[0] & 0xffffffff00000000ULL));
#else
return &t[a];
#endif
}
}
@@ -528,22 +506,16 @@ fastreadw_fetch(uint32_t a)
return val;
}
if ((a >> 12) == pccache)
# if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return *((uint16_t *) (((uintptr_t) &pccache2[a] & 0x00000000ffffffffULL) | ((uintptr_t) &pccache2[0] & 0xffffffff00000000ULL)));
# else
return *((uint16_t *) &pccache2[a]);
# endif
t = getpccache(a);
if (cpu_state.abrt)
return 0;
pccache = a >> 12;
pccache2 = t;
# if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return *((uint16_t *) (((uintptr_t) &pccache2[a] & 0x00000000ffffffffULL) | ((uintptr_t) &pccache2[0] & 0xffffffff00000000ULL)));
# else
return *((uint16_t *) &pccache2[a]);
# endif
}
static __inline uint32_t

4
src/cpu/cpu.h
View File

@@ -388,10 +388,6 @@ typedef struct {
uint32_t old_fp_control;
uint32_t new_fp_control;
# endif
# if defined _M_IX86
uint16_t old_fp_control2;
uint16_t new_fp_control2;
# endif
# if defined __amd64__ || defined _M_X64
uint32_t trunc_fp_control;
# endif

6
src/include/86box/machine.h
View File

@@ -174,11 +174,7 @@
#define CPU_BLOCK_NONE 0
/* Make sure it's always an invalid value to avoid misdetections. */
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
# define MACHINE_AVAILABLE 0xffffffffffffffffULL
#else
# define MACHINE_AVAILABLE 0xffffffff
#endif
#define MACHINE_AVAILABLE 0xffffffffffffffffULL
enum {
MACHINE_TYPE_NONE = 0,

17
src/include/86box/mem.h
View File

@@ -265,24 +265,17 @@ extern uint32_t biosmask;
extern uint32_t biosaddr;
extern int readlookup[256];
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
extern uintptr_t *readlookup2;
#endif
extern uintptr_t old_rl2;
extern uint8_t uncached;
extern int readlnext;
extern int writelookup[256];
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
extern uintptr_t *writelookup2;
#endif
extern int writelnext;
extern uint32_t ram_mapped_addr[64];
extern uint8_t page_ff[4096];
extern mem_mapping_t ram_low_mapping;
#if 1
extern mem_mapping_t ram_mid_mapping;
#endif
extern mem_mapping_t ram_remapped_mapping;
extern mem_mapping_t ram_high_mapping;
extern mem_mapping_t ram_2gb_mapping;
@@ -292,16 +285,11 @@ extern mem_mapping_t bios_high_mapping;
extern uint32_t mem_logical_addr;
extern page_t *pages;
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
extern page_t **page_lookup;
#endif
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
/* The lookup tables. */
extern page_t *page_lookup[1048576];
extern uintptr_t readlookup2[1048576];
extern uintptr_t writelookup2[1048576];
#endif
extern uint32_t get_phys_virt;
extern uint32_t get_phys_phys;
@@ -470,9 +458,6 @@ extern void mem_a20_init(void);
extern void mem_a20_recalc(void);
extern void mem_init(void);
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
extern void mem_free(void);
#endif
extern void mem_close(void);
extern void mem_zero(void);
extern void mem_reset(void);

4
src/machine/machine_table.c
View File

@@ -19589,11 +19589,7 @@ machine_get_min_ram(int m)
int
machine_get_max_ram(int m)
{
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
return MIN(((int) machines[m].ram.max), 2097152);
#else
return MIN(((int) machines[m].ram.max), 3145728);
#endif
}
int

177
src/mem/mem.c
View File

@@ -67,9 +67,6 @@ mem_mapping_t bios_mapping;
mem_mapping_t bios_high_mapping;
page_t *pages; /* RAM page table */
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
page_t **page_lookup; /* pagetable lookup */
#endif
uint32_t pages_sz; /* #pages in table */
uint8_t *ram; /* the virtual RAM */
@@ -87,23 +84,16 @@ uint8_t *pccache2;
int readlnext;
int readlookup[256];
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
uintptr_t *readlookup2;
#endif
uintptr_t old_rl2;
uint8_t uncached = 0;
int writelnext;
int writelookup[256];
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
uintptr_t *writelookup2;
#endif
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
/* The lookup tables. */
page_t *page_lookup[1048576] = { 0 };
uintptr_t readlookup2[1048576] = { 0 };
uintptr_t writelookup2[1048576] = { 0 };
#endif
uint32_t mem_logical_addr;
@@ -147,12 +137,7 @@ static uint8_t ff_pccache[4] = { 0xff, 0xff, 0xff, 0xff };
static mem_state_t _mem_state[MEM_MAPPINGS_NO];
static uint32_t remap_start_addr;
static uint32_t remap_start_addr2;
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
static size_t ram_size = 0;
static size_t ram2_size = 0;
#else
static size_t ram_size = 0;
#endif
#ifdef ENABLE_MEM_LOG
int mem_do_log = ENABLE_MEM_LOG;
@@ -274,24 +259,10 @@ void
mem_flush_write_page(uint32_t addr, uint32_t virt)
{
const page_t *page_target = &pages[addr >> 12];
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
uint32_t a;
#endif
for (uint16_t c = 0; c < 256; c++) {
if (writelookup[c] != (int) 0xffffffff) {
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
uintptr_t target = (uintptr_t) &ram[(uintptr_t) (addr & ~0xfff) - (virt & ~0xfff)];
#else
a = (uintptr_t) (addr & ~0xfff) - (virt & ~0xfff);
uintptr_t target;
if ((addr & ~0xfff) >= (1 << 30))
target = (uintptr_t) &ram2[a - (1 << 30)];
else
target = (uintptr_t) &ram[a];
#endif
if (writelookup2[writelookup[c]] == target || page_lookup[writelookup[c]] == page_target) {
writelookup2[writelookup[c]] = LOOKUP_INV;
page_lookup[writelookup[c]] = NULL;
@@ -599,10 +570,6 @@ mem_addr_translate(uint32_t addr, uint32_t chunk_start, uint32_t len)
void
addreadlookup(uint32_t virt, uint32_t phys)
{
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
uint32_t a;
#endif
if (virt == 0xffffffff)
return;
@@ -615,16 +582,7 @@ addreadlookup(uint32_t virt, uint32_t phys)
readlookup2[readlookup[readlnext]] = LOOKUP_INV;
}
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
readlookup2[virt >> 12] = (uintptr_t) &ram[(uintptr_t) (phys & ~0xFFF) - (uintptr_t) (virt & ~0xfff)];
#else
a = ((uint32_t) (phys & ~0xfff) - (uint32_t) (virt & ~0xfff));
if ((phys & ~0xfff) >= (1 << 30))
readlookup2[virt >> 12] = (uintptr_t) &ram2[a - (1 << 30)];
else
readlookup2[virt >> 12] = (uintptr_t) &ram[a];
#endif
readlookup[readlnext++] = virt >> 12;
readlnext &= (cachesize - 1);
@@ -635,10 +593,6 @@ addreadlookup(uint32_t virt, uint32_t phys)
void
addwritelookup(uint32_t virt, uint32_t phys)
{
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
uint32_t a;
#endif
if (virt == 0xffffffff)
return;
@@ -665,16 +619,8 @@ addwritelookup(uint32_t virt, uint32_t phys)
#endif
page_lookup[virt >> 12] = &pages[phys >> 12];
} else {
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
writelookup2[virt >> 12] = (uintptr_t) &ram[(uintptr_t) (phys & ~0xFFF) - (uintptr_t) (virt & ~0xfff)];
#else
a = ((uint32_t) (phys & ~0xfff) - (uint32_t) (virt & ~0xfff));
if ((phys & ~0xfff) >= (1 << 30))
writelookup2[virt >> 12] = (uintptr_t) &ram2[a - (1 << 30)];
else
writelookup2[virt >> 12] = (uintptr_t) &ram[a];
#endif
writelookup2[virt >> 12] = (uintptr_t) &ram[(uintptr_t) (phys & ~0xFFF) - (uintptr_t) (virt & ~0xfff)];
}
writelookup[writelnext++] = virt >> 12;
@@ -687,9 +633,7 @@ uint8_t *
getpccache(uint32_t a)
{
uint64_t a64 = (uint64_t) a;
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
uint8_t *p;
#endif
uint32_t a2;
a2 = a;
@@ -710,12 +654,8 @@ getpccache(uint32_t a)
cpu_prefetch_cycles = cpu_mem_prefetch_cycles;
}
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
p = &_mem_exec[a64 >> MEM_GRANULARITY_BITS][(uintptr_t) (a64 & MEM_GRANULARITY_PAGE) - (uintptr_t) (a2 & ~0xfff)];
return (uint8_t *) (((uintptr_t) p & 0x00000000ffffffffULL) | ((uintptr_t) &_mem_exec[a64 >> MEM_GRANULARITY_BITS][0] & 0xffffffff00000000ULL));
#else
return &_mem_exec[a64 >> MEM_GRANULARITY_BITS][(uintptr_t) (a64 & MEM_GRANULARITY_PAGE) - (uintptr_t) (a2 & ~0xfff)];
#endif
}
mem_log("Bad getpccache %08X%08X\n", (uint32_t) (a64 >> 32), (uint32_t) (a64 & 0xffffffffULL));
@@ -2771,11 +2711,6 @@ mem_init_ram_mapping(mem_mapping_t *mapping, uint32_t base, uint32_t size)
void
mem_zero(void)
{
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (mem_size > 1048576)
memset(ram2, 0x00, ram2_size + 16);
#endif
memset(ram, 0x00, ram_size + 16);
}
@@ -2810,55 +2745,17 @@ mem_reset(void)
ram = NULL;
ram_size = 0;
}
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (ram2 != NULL) {
plat_munmap(ram2, ram2_size);
ram2 = NULL;
ram2_size = 0;
}
if (mem_size > 2097152)
mem_size = 2097152;
#endif
m = 1024UL * (size_t) mem_size;
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (mem_size > 1048576) {
ram_size = 1 << 30;
ram = (uint8_t *) plat_mmap(ram_size, 0); /* allocate and clear the RAM block of the first 1 GB */
if (ram == NULL) {
fatal("Failed to allocate primary RAM block. Make sure you have enough RAM available.\n");
return;
}
memset(ram, 0x00, ram_size);
ram2_size = m - (1 << 30);
/* Allocate 16 extra bytes of RAM to mitigate some dynarec recompiler memory access quirks. */
ram2 = (uint8_t *) plat_mmap(ram2_size + 16, 0); /* allocate and clear the RAM block above 1 GB */
if (ram2 == NULL) {
if (config_changed == 2)
fatal(EMU_NAME " must be restarted for the memory amount change to be applied.\n");
else
fatal("Failed to allocate secondary RAM block. Make sure you have enough RAM available.\n");
return;
}
memset(ram2, 0x00, ram2_size + 16);
} else
#endif
{
ram_size = m;
/* Allocate 16 extra bytes of RAM to mitigate some dynarec recompiler memory access quirks. */
ram = (uint8_t *) plat_mmap(ram_size + 16, 0); /* allocate and clear the RAM block */
if (ram == NULL) {
fatal("Failed to allocate RAM block. Make sure you have enough RAM available.\n");
return;
}
memset(ram, 0x00, ram_size + 16);
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (mem_size > 1048576)
ram2 = &(ram[1 << 30]);
#endif
ram_size = m;
/* Allocate 16 extra bytes of RAM to mitigate some dynarec recompiler memory access quirks. */
ram = (uint8_t *) plat_mmap(ram_size + 16, 0); /* allocate and clear the RAM block */
if (ram == NULL) {
fatal("Failed to allocate RAM block. Make sure you have enough RAM available.\n");
return;
}
memset(ram, 0x00, ram_size + 16);
/*
* Allocate the page table based on how much RAM we have.
@@ -2905,17 +2802,8 @@ mem_reset(void)
if ((c << 12) >= (mem_size << 10))
pages[c].mem = page_ff;
else {
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (mem_size > 1048576) {
if ((c << 12) < (1 << 30))
pages[c].mem = &ram[c << 12];
else
pages[c].mem = &ram2[(c << 12) - (1 << 30)];
} else
pages[c].mem = &ram[c << 12];
#else
pages[c].mem = &ram[c << 12];
#endif
}
if (c < m) {
pages[c].write_b = mem_write_ramb_page;
@@ -2951,22 +2839,7 @@ mem_reset(void)
else if (cpu_16bitbus && is6117 && mem_size > 65408)
mem_init_ram_mapping(&ram_high_mapping, 0x100000, (65408 - 1024) * 1024);
else {
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (mem_size > 1048576) {
mem_init_ram_mapping(&ram_high_mapping, 0x100000, (1048576 - 1024) * 1024);
mem_set_mem_state_both((1 << 30), (mem_size - 1048576) * 1024,
MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
mem_mapping_add(&ram_2gb_mapping, (1 << 30),
((mem_size - 1048576) * 1024),
mem_read_ram_2gb, mem_read_ram_2gbw, mem_read_ram_2gbl,
mem_write_ram, mem_write_ramw, mem_write_raml,
ram2, MEM_MAPPING_INTERNAL, NULL);
} else
mem_init_ram_mapping(&ram_high_mapping, 0x100000, (mem_size - 1024) * 1024);
#else
mem_init_ram_mapping(&ram_high_mapping, 0x100000, (mem_size - 1024) * 1024);
#endif
mem_init_ram_mapping(&ram_high_mapping, 0x100000, (mem_size - 1024) * 1024);
}
}
@@ -3005,26 +2878,8 @@ mem_init(void)
ram = rom = NULL;
ram2 = NULL;
pages = NULL;
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
/* Allocate the lookup tables. */
page_lookup = (page_t **) malloc((1 << 20) * sizeof(page_t *));
readlookup2 = malloc((1 << 20) * sizeof(uintptr_t));
writelookup2 = malloc((1 << 20) * sizeof(uintptr_t));
#endif
}
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
void
mem_free(void)
{
free(page_lookup);
free(readlookup2);
free(writelookup2);
}
#endif
static void
umc_page_recalc(uint32_t c, uint32_t phys, int set)
{
@@ -3125,17 +2980,7 @@ mem_remap_top_ex_common(int kb, uint32_t start, int mid)
if (sis_mode || ((c << 12) >= (mem_size << 10)))
pages[c].mem = page_ff;
else {
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (mem_size > 1048576) {
if ((c << 12) < (1 << 30))
pages[c].mem = &ram[c << 12];
else
pages[c].mem = &ram2[(c << 12) - (1 << 30)];
} else
pages[c].mem = &ram[c << 12];
#else
pages[c].mem = &ram[c << 12];
#endif
}
if (!sis_mode && (c < addr_space_size)) {
pages[c].write_b = mem_write_ramb_page;

22
src/mem/row.c
View File

@@ -155,18 +155,9 @@ row_allocate(uint8_t row_id, uint8_t set)
mem_mapping_set_exec(&rows[row_id].mapping, rows[row_id].buf + rows[row_id].ram_base);
mem_mapping_set_mask(&rows[row_id].mapping, rows[row_id].ram_mask);
if ((rows[row_id].host_base == rows[row_id].ram_base) && (rows[row_id].host_size == rows[row_id].ram_size)) {
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
mem_mapping_set_handler(&rows[row_id].mapping, mem_read_ram,mem_read_ramw,mem_read_raml,
mem_write_ram,mem_write_ramw,mem_write_raml);
#else
if (rows[row_id].buf == ram2) {
mem_mapping_set_handler(&rows[row_id].mapping, mem_read_ram_2gb,mem_read_ram_2gbw,mem_read_ram_2gbl,
mem_write_ram,mem_write_ramw,mem_write_raml);
} else {
mem_mapping_set_handler(&rows[row_id].mapping, mem_read_ram,mem_read_ramw,mem_read_raml,
mem_write_ram,mem_write_ramw,mem_write_raml);
}
#endif
} else {
mem_mapping_set_handler(&rows[row_id].mapping, row_read, row_readw, row_readl,
row_write, row_writew, row_writel);
@@ -268,10 +259,6 @@ row_init(const device_t *info)
mem_mapping_disable(&ram_low_mapping);
mem_mapping_disable(&ram_mid_mapping);
mem_mapping_disable(&ram_high_mapping);
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (mem_size > 1048576)
mem_mapping_disable(&ram_2gb_mapping);
#endif
for (uint32_t c = 0; c < pages_sz; c++) {
pages[c].mem = page_ff;
@@ -303,12 +290,7 @@ row_init(const device_t *info)
rows[i].ram_size -= rows[i].ram_base;
rows[i].buf = ram;
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (rows[i].ram_base >= (1 << 30)) {
rows[i].ram_base -= (1 << 30);
rows[i].buf = ram2;
}
#endif
rows[i].ram_mask = rows[i].ram_size - 1;

15
src/mem/smram.c
View File

@@ -59,11 +59,6 @@ smram_read(uint32_t addr, void *priv)
const smram_t *dev = (smram_t *) priv;
uint32_t new_addr = addr - dev->host_base + dev->ram_base;
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (new_addr >= (1 << 30))
return mem_read_ram_2gb(new_addr, priv);
else
#endif
if (!use_separate_smram || (new_addr >= 0xa0000))
return mem_read_ram(new_addr, priv);
else
@@ -76,11 +71,6 @@ smram_readw(uint32_t addr, void *priv)
smram_t *dev = (smram_t *) priv;
uint32_t new_addr = addr - dev->host_base + dev->ram_base;
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (new_addr >= (1 << 30))
return mem_read_ram_2gbw(new_addr, priv);
else
#endif
if (!use_separate_smram || (new_addr >= 0xa0000))
return mem_read_ramw(new_addr, priv);
else
@@ -93,11 +83,6 @@ smram_readl(uint32_t addr, void *priv)
smram_t *dev = (smram_t *) priv;
uint32_t new_addr = addr - dev->host_base + dev->ram_base;
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
if (new_addr >= (1 << 30))
return mem_read_ram_2gbl(new_addr, priv);
else
#endif
if (!use_separate_smram || (new_addr >= 0xa0000))
return mem_read_raml(new_addr, priv);
else

9
src/printer/prt_ps.c
View File

@@ -48,13 +48,8 @@
#define gs_error_Quit -101
#ifdef _WIN32
# if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
# define PATH_GHOSTSCRIPT_DLL "gsdll32.dll"
# define PATH_GHOSTPCL_DLL "gpcl6dll32.dll"
# else
# define PATH_GHOSTSCRIPT_DLL "gsdll64.dll"
# define PATH_GHOSTPCL_DLL "gpcl6dll64.dll"
# endif
# define PATH_GHOSTSCRIPT_DLL "gsdll64.dll"
# define PATH_GHOSTPCL_DLL "gpcl6dll64.dll"
#elif defined __APPLE__
# define PATH_GHOSTSCRIPT_DLL "libgs.dylib"
# define PATH_GHOSTPCL_DLL "libgpcl6.9.54.dylib"

9
src/qt/qt_platform.cpp
View File

@@ -614,13 +614,8 @@ c16stombs(char dst[], const uint16_t src[], int len)
#endif
#ifdef _WIN32
# if defined(__amd64__) || defined(_M_X64) || defined(__aarch64__) || defined(_M_ARM64)
# define LIB_NAME_GS "gsdll64.dll"
# define LIB_NAME_GPCL "gpcl6dll64.dll"
# else
# define LIB_NAME_GS "gsdll32.dll"
# define LIB_NAME_GPCL "gpcl6dll32.dll"
# endif
# define LIB_NAME_GS "gsdll64.dll"
# define LIB_NAME_GPCL "gpcl6dll64.dll"
# define LIB_NAME_PCAP "Npcap"
#else
# define LIB_NAME_GS "libgs"