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S3 refactoring:

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1. Made the 924 BIOS use the AT&T 491 ramdac since it supports such (tested).
2. Tweaks to the 928 Brooktree ID detection to make sure the cursor is shown correctly in 16bpp+ modes (it uses the BT485 ID detection so that it knows what BT is using to accommodate the cursor model).
3. Refactored the mode (CRTC50) and pitch timing stuff (moved to recalctimings for example) so that drivers/games/operating systems and what not can be used normally. (Warning, more stuff is to be tested due to a gazillion of combinations used by said stuff).
4. VRAM wraparound is now working as it should, fixes Commander Keen games.
5. Indentation fixes.
6. Attempt to fix 15/16bpp mode acceleration used by the 911/924 chips (not perfect and still has bugs).
7. Added the remaining missing stuff of the Sierra SC1502x RAMDAC including its 8BIT setting.
8. Some drivers use FIFO bits in non-FIFO configurations, should fix hang ups in some instances (namely the 928 S3 2.3 NT 3.1 drivers and possibly more).
9. Separated the 911/924 acceleration from the 80x/928+ one though the use of a function pointer.
10. Fixed the inverted colors in some instances using the S3 Trio64 driver in Win9x (mainly on soft reboots).
11. CX/CY (non-Blits) and DX/DY (Blits) wraparound correctly during their respective operations, fixes OS/2 software cursor once again while keeping existing stuff working.
12. Added some comments to keep track of some anomalies.
13. Fixed some badly formatted if's and switches.
14. Limited the SPEA Mercury Lite VRAM to 1MB per real world configurations.
This commit is contained in:
TC1995
2024-01-03 22:58:18 +01:00
parent d2a05f77c5
commit b7a4fa2a7c
2 changed files with 1909 additions and 453 deletions
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2170
src/video/vid_s3.c
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File diff suppressed because it is too large Load Diff

192
src/video/vid_sc1502x_ramdac.c
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@@ -34,84 +34,126 @@
typedef struct sc1502x_ramdac_t {
int state;
uint8_t ctrl;
uint8_t idx;
uint8_t regs[256];
uint32_t pixel_mask;
uint8_t enable_ext;
} sc1502x_ramdac_t;
void
sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga)
static void
sc1502x_ramdac_bpp(uint8_t val, sc1502x_ramdac_t *ramdac, svga_t *svga)
{
sc1502x_ramdac_t *ramdac = (sc1502x_ramdac_t *) priv;
int oldbpp = 0;
switch (addr) {
case 0x3C6:
if (ramdac->state == 4) {
ramdac->state = 0;
if (val == 0xFF)
int oldbpp = 0;
if (val == 0xff)
return;
ramdac->ctrl = val;
oldbpp = svga->bpp;
switch ((val & 1) | ((val & 0xc0) >> 5)) {
case 0:
svga->bpp = 8;
break;
case 2:
case 3:
switch (val & 0x20) {
case 0x00:
svga->bpp = 32;
break;
case 0x20:
svga->bpp = 24;
break;
ramdac->ctrl = val;
oldbpp = svga->bpp;
switch ((val & 1) | ((val & 0xc0) >> 5)) {
case 0:
svga->bpp = 8;
break;
case 2:
case 3:
switch (val & 0x20) {
case 0x00:
svga->bpp = 32;
break;
case 0x20:
svga->bpp = 24;
break;
default:
break;
}
default:
break;
}
break;
case 4:
case 5:
svga->bpp = 15;
break;
case 6:
svga->bpp = 16;
break;
case 7:
if (val & 4) {
switch (val & 0x20) {
case 0x00:
svga->bpp = 32;
break;
case 4:
case 5:
svga->bpp = 15;
break;
case 6:
svga->bpp = 16;
break;
case 7:
if (val & 4) {
switch (val & 0x20) {
case 0x00:
svga->bpp = 32;
break;
case 0x20:
svga->bpp = 24;
break;
default:
break;
}
} else {
svga->bpp = 16;
}
case 0x20:
svga->bpp = 24;
break;
default:
break;
}
if (oldbpp != svga->bpp)
svga_recalctimings(svga);
} else
svga->bpp = 16;
break;
default:
break;
}
if (oldbpp != svga->bpp)
svga_recalctimings(svga);
}
void
sc1502x_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga)
{
sc1502x_ramdac_t *ramdac = (sc1502x_ramdac_t *) priv;
switch (addr) {
case 0x3C6:
if (ramdac->state == 0)
ramdac->enable_ext = (val == 0x10);
if (ramdac->state == 4) {
ramdac->state = 0;
sc1502x_ramdac_bpp(val, ramdac, svga);
return;
}
ramdac->state = 0;
break;
case 0x3C7:
if (ramdac->enable_ext) {
ramdac->idx = val;
return;
}
ramdac->state = 0;
break;
case 0x3C8:
if (ramdac->enable_ext) {
switch (ramdac->idx) {
case 8:
ramdac->regs[ramdac->idx] = val;
svga_set_ramdac_type(svga, (ramdac->regs[ramdac->idx] & 1) ? RAMDAC_8BIT : RAMDAC_6BIT);
break;
case 0x0d:
ramdac->pixel_mask = val & svga->dac_mask;
break;
case 0x0e:
ramdac->pixel_mask |= ((val & svga->dac_mask) << 8);
break;
case 0x0f:
ramdac->pixel_mask |= ((val & svga->dac_mask) << 16);
break;
default:
ramdac->regs[ramdac->idx] = val;
break;
}
return;
}
ramdac->state = 0;
break;
case 0x3C9:
if (ramdac->enable_ext)
return;
ramdac->state = 0;
break;
default:
break;
}
svga_out(addr, val, svga);
}
@@ -131,10 +173,45 @@ sc1502x_ramdac_in(uint16_t addr, void *priv, svga_t *svga)
ramdac->state++;
break;
case 0x3C7:
case 0x3C8:
case 0x3C9:
ramdac->state = 0;
break;
case 0x3C8:
if (ramdac->enable_ext) {
switch (ramdac->idx) {
case 9:
temp = 0x53;
break;
case 0x0a:
temp = 0x3a;
break;
case 0x0b:
temp = 0xb1;
break;
case 0x0c:
temp = 0x41;
break;
case 0x0d:
temp = ramdac->pixel_mask & 0xff;
break;
case 0x0e:
temp = ramdac->pixel_mask >> 8;
break;
case 0x0f:
temp = ramdac->pixel_mask >> 16;
break;
default:
temp = ramdac->regs[ramdac->idx];
break;
}
} else
ramdac->state = 0;
break;
case 0x3C9:
if (ramdac->enable_ext)
temp = ramdac->idx;
else
ramdac->state = 0;
break;
default:
break;
@@ -149,6 +226,9 @@ sc1502x_ramdac_init(UNUSED(const device_t *info))
sc1502x_ramdac_t *ramdac = (sc1502x_ramdac_t *) malloc(sizeof(sc1502x_ramdac_t));
memset(ramdac, 0, sizeof(sc1502x_ramdac_t));
ramdac->ctrl = 0;
ramdac->pixel_mask = 0xffffff;
return ramdac;
}