Finished the NE1000 (per patch from TheCollector1995) and added the RTL8019AS ISA PnP, finalizing the work on NE1000/NE2000-compatible network cards;

Disabled excess ZIP logging;
Applied the PCem video and SCAT commits;
Restored the video initialization line in pc.c back to where it was before.
This commit is contained in:
OBattler
2018-01-28 03:15:01 +01:00
parent cb9b6ed371
commit bd7e955b64
14 changed files with 892 additions and 311 deletions

View File

@@ -537,7 +537,7 @@ load_video(void)
} }
gfxcard = video_get_video_from_internal_name(p); gfxcard = video_get_video_from_internal_name(p);
video_speed = config_get_int(cat, "video_speed", 3); video_speed = config_get_int(cat, "video_speed", -1);
voodoo_enabled = !!config_get_int(cat, "voodoo", 0); voodoo_enabled = !!config_get_int(cat, "voodoo", 0);
} }

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@@ -10,7 +10,7 @@
* *
* Re-worked version based on the 82C235 datasheet and errata. * Re-worked version based on the 82C235 datasheet and errata.
* *
* Version: @(#)m_at_scat.c 1.0.8 2018/01/16 * Version: @(#)m_at_scat.c 1.0.9 2018/01/28
* *
* Authors: Original by GreatPsycho for PCem. * Authors: Original by GreatPsycho for PCem.
* Fred N. van Kempen, <decwiz@yahoo.com> * Fred N. van Kempen, <decwiz@yahoo.com>
@@ -487,6 +487,7 @@ ics_write(uint8_t idx, uint8_t val)
pclog("SCAT: icr_write(%02x, %02x)\n", idx, val); pclog("SCAT: icr_write(%02x, %02x)\n", idx, val);
#endif #endif
switch (idx) { switch (idx) {
case SCAT_DMA_WS_CTL:
case SCAT_CLOCK_CTL: case SCAT_CLOCK_CTL:
case SCAT_PERIPH_CTL: case SCAT_PERIPH_CTL:
reg_valid = 1; reg_valid = 1;
@@ -631,7 +632,7 @@ scat_init(void)
for (i=0; i<128; i++) for (i=0; i<128; i++)
scat_regs[i] = 0xff; scat_regs[i] = 0xff;
scat_regs[SCAT_DMA_WS_CTL] = 0x00; scat_regs[SCAT_DMA_WS_CTL] = 0x00;
scat_regs[SCAT_VERSION] = 0x0a; scat_regs[SCAT_VERSION] = 0x04;
scat_regs[SCAT_CLOCK_CTL] = 0x02; scat_regs[SCAT_CLOCK_CTL] = 0x02;
scat_regs[SCAT_PERIPH_CTL] = 0x80; scat_regs[SCAT_PERIPH_CTL] = 0x80;
scat_regs[SCAT_MISC_STATUS] = 0x37; scat_regs[SCAT_MISC_STATUS] = 0x37;
@@ -717,7 +718,7 @@ scat_init(void)
(i<<14) + 0xFC0000, 0x04000, (i<<14) + 0xFC0000, 0x04000,
mem_read_bios, mem_read_biosw, mem_read_biosl, mem_read_bios, mem_read_biosw, mem_read_biosl,
mem_write_null, mem_write_nullw, mem_write_nulll, mem_write_null, mem_write_nullw, mem_write_nulll,
rom+(i<<14), rom + ((i << 14) & biosmask),
0, NULL); 0, NULL);
} }

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@@ -11,7 +11,7 @@
* NOTES: OpenAT wip for 286-class machine with open BIOS. * NOTES: OpenAT wip for 286-class machine with open BIOS.
* PS2_M80-486 wip, pending receipt of TRM's for machine. * PS2_M80-486 wip, pending receipt of TRM's for machine.
* *
* Version: @(#)machine_table.c 1.0.15 2018/01/25 * Version: @(#)machine_table.c 1.0.16 2018/01/28
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -105,13 +105,13 @@ machine_t machines[] = {
{ "[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL, nvr_at_close }, { "[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL, nvr_at_close },
{ "[486 ISA] Award 486 clone", ROM_AWARD486_OPTI495, "award486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL, nvr_at_close }, { "[486 ISA] Award 486 clone", ROM_AWARD486_OPTI495, "award486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL, nvr_at_close },
{ "[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 127, machine_at_dtk486_init, NULL, nvr_at_close }, { "[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 127, machine_at_dtk486_init, NULL, nvr_at_close },
{ "[486 ISA] IBM PS/1 model 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL, nvr_at_close }, { "[486 ISA] IBM PS/1 model 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL, nvr_at_close },
#ifdef WALTJE #ifdef WALTJE
{ "[486 MCA] IBM PS/2 model 80-486", ROM_IBMPS2_M80_486, "ibmps2_m80-486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 32, 1, 63, machine_ps2_model_80_486_init, NULL, nvr_at_close }, { "[486 MCA] IBM PS/2 model 80-486", ROM_IBMPS2_M80_486, "ibmps2_m80-486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 32, 1, 63, machine_ps2_model_80_486_init, NULL, nvr_at_close },
#endif #endif
{ "[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 127, machine_at_r418_init, NULL, nvr_at_close }, { "[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 127, machine_at_r418_init, NULL, nvr_at_close },
#ifdef DEV_BRANCH #ifdef DEV_BRANCH
#ifdef USE_GREENB #ifdef USE_GREENB

File diff suppressed because it is too large Load Diff

View File

@@ -8,7 +8,7 @@
* *
* Definitions for the NE2000 ethernet controller. * Definitions for the NE2000 ethernet controller.
* *
* Version: @(#)net_ne2000.h 1.0.3 2017/05/17 * Version: @(#)net_ne2000.h 1.0.4 2018/01/26
* *
* Author: Fred N. van Kempen, <decwiz@yahoo.com> * Author: Fred N. van Kempen, <decwiz@yahoo.com>
*/ */
@@ -16,13 +16,18 @@
# define NET_NE2000_H # define NET_NE2000_H
#define NE2K_NE1000 1 /* 8bit ISA NE1000 */ enum {
#define NE2K_NE2000 2 /* 16bit ISA NE2000 */ NE2K_NONE = 0,
#define NE2K_RTL8029AS 3 /* 32bi PCI Realtek 8029AS */ NE2K_NE1000, /* 8bit ISA NE1000 */
NE2K_NE2000, /* 16bit ISA NE2000 */
NE2K_RTL8019AS, /* 16bit? ISA? PnP Realtek 8019AS */
NE2K_RTL8029AS /* 32bit PCI Realtek 8029AS */
};
extern device_t ne1000_device; extern device_t ne1000_device;
extern device_t ne2000_device; extern device_t ne2000_device;
extern device_t rtl8019as_device;
extern device_t rtl8029as_device; extern device_t rtl8029as_device;

View File

@@ -12,11 +12,11 @@
* it should be malloc'ed and then linked to the NETCARD def. * it should be malloc'ed and then linked to the NETCARD def.
* Will be done later. * Will be done later.
* *
* Version: @(#)network.c 1.0.19 2017/11/04 * Version: @(#)network.c 1.0.20 2018/01/26
* *
* Author: Fred N. van Kempen, <decwiz@yahoo.com> * Author: Fred N. van Kempen, <decwiz@yahoo.com>
* *
* Copyright 2017 Fred N. van Kempen. * Copyright 2017,2018 Fred N. van Kempen.
*/ */
#include <stdio.h> #include <stdio.h>
#include <stdint.h> #include <stdint.h>
@@ -34,13 +34,13 @@
static netcard_t net_cards[] = { static netcard_t net_cards[] = {
{ "None", "none", NULL, { "None", "none", NULL,
NULL, NULL }, NULL, NULL },
#if defined(DEV_BRANCH) && defined(USE_NE1000) { "[ISA] Novell NE1000", "ne1k", &ne1000_device,
{ "Novell NE1000", "ne1k", &ne1000_device,
NULL, NULL }, NULL, NULL },
#endif { "[ISA] Novell NE2000", "ne2k", &ne2000_device,
{ "Novell NE2000", "ne2k", &ne2000_device,
NULL, NULL }, NULL, NULL },
{ "Realtek RTL8029AS", "ne2kpci", &rtl8029as_device, { "[ISA] Realtek RTL8019AS", "ne2kpnp", &rtl8019as_device,
NULL, NULL },
{ "[PCI] Realtek RTL8029AS", "ne2kpci", &rtl8029as_device,
NULL, NULL }, NULL, NULL },
{ "", "", NULL, { "", "", NULL,
NULL, NULL } NULL, NULL }

View File

@@ -8,7 +8,7 @@
* *
* Definitions for the network module. * Definitions for the network module.
* *
* Version: @(#)network.h 1.0.10 2017/11/01 * Version: @(#)network.h 1.0.11 2018/01/26
* *
* Author: Fred N. van Kempen, <decwiz@yahoo.com> * Author: Fred N. van Kempen, <decwiz@yahoo.com>
*/ */
@@ -23,9 +23,13 @@
#define NET_TYPE_SLIRP 2 /* use the SLiRP port forwarder */ #define NET_TYPE_SLIRP 2 /* use the SLiRP port forwarder */
/* Supported network cards. */ /* Supported network cards. */
#define NE1000 1 enum {
#define NE2000 2 NONE = 0,
#define RTL8029AS 3 NE1000,
NE2000,
RTL8019AS,
RTL8029AS
};
typedef void (*NETRXCB)(void *, uint8_t *, int); typedef void (*NETRXCB)(void *, uint8_t *, int);

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@@ -8,7 +8,7 @@
* *
* Main emulator module where most things are controlled. * Main emulator module where most things are controlled.
* *
* Version: @(#)pc.c 1.0.54 2018/01/21 * Version: @(#)pc.c 1.0.55 2018/01/28
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -823,7 +823,7 @@ pc_reset_hard_init(void)
mouse_reset(); mouse_reset();
/* Reset the video card. */ /* Reset the video card. */
// video_reset(gfxcard); video_reset(gfxcard);
/* Reset the Hard Disk Controller module. */ /* Reset the Hard Disk Controller module. */
hdc_reset(); hdc_reset();
@@ -881,8 +881,6 @@ pc_reset_hard_init(void)
pic_reset(); pic_reset();
cpu_cache_int_enabled = cpu_cache_ext_enabled = 0; cpu_cache_int_enabled = cpu_cache_ext_enabled = 0;
video_reset(gfxcard);
if (AT) if (AT)
setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed); setpitclock(machines[machine].cpu[cpu_manufacturer].cpus[cpu].rspeed);
else else

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@@ -8,7 +8,7 @@
* *
* Define all known video cards. * Define all known video cards.
* *
* Version: @(#)vid_table.c 1.0.12 2018/01/25 * Version: @(#)vid_table.c 1.0.13 2018/01/27
* *
* Authors: Miran Grca, <mgrca8@gmail.com> * Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com> * Fred N. van Kempen, <decwiz@yahoo.com>
@@ -68,108 +68,106 @@
#include "vid_wy700.h" #include "vid_wy700.h"
enum {
VIDEO_ISA = 0,
VIDEO_BUS
};
typedef struct { typedef struct {
char name[64]; char name[64];
char internal_name[24]; char internal_name[24];
device_t *device; device_t *device;
int legacy_id; int legacy_id;
struct {
int type;
int b, w, l;
} timing;
} VIDEO_CARD; } VIDEO_CARD;
static VIDEO_CARD static VIDEO_CARD
video_cards[] = { video_cards[] = {
{ "None", "none", { "None", "none", NULL, GFX_NONE },
NULL, GFX_NONE }, { "Internal", "internal", NULL, GFX_INTERNAL, {VIDEO_ISA, 8, 16, 32}},
{ "Internal", "internal", {"[ISA] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_isa", &mach64gx_isa_device, GFX_MACH64GX_ISA, {VIDEO_ISA, 3, 3, 6}},
NULL, GFX_INTERNAL }, { "[ISA] ATI VGA Charger (ATI-28800-5)", "ati28800", &ati28800_device, GFX_VGACHARGER, {VIDEO_ISA, 3, 3, 6}},
{"[ISA] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_isa", { "[ISA] ATI VGA Wonder XL24 (ATI-28800-6)", "ati28800w", &ati28800_wonderxl24_device, GFX_VGAWONDERXL24, {VIDEO_ISA, 3, 3, 6}},
&mach64gx_isa_device, GFX_MACH64GX_ISA }, { "[ISA] ATI VGA Edge-16 (ATI-18800)", "ati18800", &ati18800_device, GFX_VGAEDGE16, {VIDEO_ISA, 3, 3, 6}},
{ "[ISA] ATI VGA Charger (ATI-28800-5)", "ati28800", { "[ISA] CGA", "cga", &cga_device, GFX_CGA, {VIDEO_ISA, 8, 16, 32}},
&ati28800_device, GFX_VGACHARGER }, { "[ISA] Chips & Technologies SuperEGA", "superega", &sega_device, GFX_SUPER_EGA, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] ATI VGA Wonder XL24 (ATI-28800-6)", "ati28800w",
&ati28800_wonderxl24_device, GFX_VGAWONDERXL24 },
{ "[ISA] ATI VGA Edge-16 (ATI-18800)", "ati18800",
&ati18800_device, GFX_VGAEDGE16 },
{ "[ISA] CGA", "cga",
&cga_device, GFX_CGA },
{ "[ISA] Chips & Technologies SuperEGA", "superega",
&sega_device, GFX_SUPER_EGA },
#if defined(DEV_BRANCH) && defined(USE_CIRRUS) #if defined(DEV_BRANCH) && defined(USE_CIRRUS)
{ "[ISA] Cirrus Logic CL-GD5422", "cl_gd5422", { "[ISA] Cirrus Logic CL-GD5422", "cl_gd5422", &gd5422_device, GFX_CL_GD5422, {VIDEO_ISA, 6, 8, 16}},
&gd5422_device, GFX_CL_GD5422 }, { "[ISA] Cirrus Logic CL-GD5430", "cl_gd5430", &gd5430_device, GFX_CL_GD5430, {VIDEO_ISA, 3, 3, 6}},
{ "[ISA] Cirrus Logic CL-GD5430", "cl_gd5430", { "[ISA] Cirrus Logic CL-GD5434", "cl_gd5434", &gd5434_device, GFX_CL_GD5434, {VIDEO_ISA, 3, 3, 6}},
&gd5430_device, GFX_CL_GD5430 }, { "[ISA] Cirrus Logic CL-GD5436", "cl_gd5436", &gd5436_device, GFX_CL_GD5436, {VIDEO_ISA, 3, 3, 6}},
{ "[ISA] Cirrus Logic CL-GD5434", "cl_gd5434", &gd5434_device, GFX_CL_GD5434 }, { "[ISA] Cirrus Logic CL-GD5440", "cl_gd5440", &gd5440_device, GFX_CL_GD5440, {VIDEO_ISA, 3, 3, 6}},
{ "[ISA] Cirrus Logic CL-GD5436", "cl_gd5436", &gd5436_device, GFX_CL_GD5436 },
{ "[ISA] Cirrus Logic CL-GD5440", "cl_gd5440", &gd5440_device, GFX_CL_GD5440 },
#endif #endif
{ "[ISA] Compaq ATI VGA Wonder XL (ATI-28800-5)","compaq_ati28800", &compaq_ati28800_device, GFX_VGAWONDERXL }, { "[ISA] Compaq ATI VGA Wonder XL (ATI-28800-5)","compaq_ati28800", &compaq_ati28800_device, GFX_VGAWONDERXL, {VIDEO_ISA, 3, 3, 6}},
{ "[ISA] Compaq CGA", "compaq_cga", &compaq_cga_device, GFX_COMPAQ_CGA }, { "[ISA] Compaq CGA", "compaq_cga", &compaq_cga_device, GFX_COMPAQ_CGA, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] Compaq CGA 2", "compaq_cga_2", &compaq_cga_2_device, GFX_COMPAQ_CGA_2 }, { "[ISA] Compaq CGA 2", "compaq_cga_2", &compaq_cga_2_device, GFX_COMPAQ_CGA_2, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] Compaq EGA", "compaq_ega", &cpqega_device, GFX_COMPAQ_EGA }, { "[ISA] Compaq EGA", "compaq_ega", &cpqega_device, GFX_COMPAQ_EGA, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] EGA", "ega", &ega_device, GFX_EGA }, { "[ISA] EGA", "ega", &ega_device, GFX_EGA, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] Hercules", "hercules", &hercules_device, GFX_HERCULES }, { "[ISA] Hercules", "hercules", &hercules_device, GFX_HERCULES, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] Hercules Plus", "hercules_plus", &herculesplus_device, GFX_HERCULESPLUS }, { "[ISA] Hercules Plus", "hercules_plus", &herculesplus_device, GFX_HERCULESPLUS, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] Hercules InColor", "incolor", &incolor_device, GFX_INCOLOR }, { "[ISA] Hercules InColor", "incolor", &incolor_device, GFX_INCOLOR, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] MDA", "mda", &mda_device, GFX_MDA }, { "[ISA] MDA", "mda", &mda_device, GFX_MDA, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] MDSI Genius", "genius", &genius_device, GFX_GENIUS }, { "[ISA] MDSI Genius", "genius", &genius_device, GFX_GENIUS, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] OAK OTI-067", "oti067", &oti067_device, GFX_OTI067 }, { "[ISA] OAK OTI-067", "oti067", &oti067_device, GFX_OTI067, {VIDEO_ISA, 6, 8, 16}},
{ "[ISA] OAK OTI-077", "oti077", &oti077_device, GFX_OTI077 }, { "[ISA] OAK OTI-077", "oti077", &oti077_device, GFX_OTI077, {VIDEO_ISA, 6, 8, 16}},
{ "[ISA] Paradise PVGA1A", "pvga1a", &paradise_pvga1a_device, GFX_PVGA1A }, { "[ISA] Paradise PVGA1A", "pvga1a", &paradise_pvga1a_device, GFX_PVGA1A, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] Paradise WD90C11-LR", "wd90c11", &paradise_wd90c11_device, GFX_WD90C11 }, { "[ISA] Paradise WD90C11-LR", "wd90c11", &paradise_wd90c11_device, GFX_WD90C11, {VIDEO_ISA, 8, 16, 32}},
{ "[ISA] Paradise WD90C30-LR", "wd90c30", &paradise_wd90c30_device, GFX_WD90C30 }, { "[ISA] Paradise WD90C30-LR", "wd90c30", &paradise_wd90c30_device, GFX_WD90C30, {VIDEO_ISA, 6, 8, 16}},
{ "[ISA] Plantronics ColorPlus", "plantronics", &colorplus_device, GFX_COLORPLUS }, { "[ISA] Plantronics ColorPlus", "plantronics", &colorplus_device, GFX_COLORPLUS, {VIDEO_ISA, 8, 16, 32}},
#if defined(DEV_BRANCH) && defined(USE_TI) #if defined(DEV_BRANCH) && defined(USE_TI)
{"[ISA] TI CF62011 SVGA", "ti_cf62011", {"[ISA] TI CF62011 SVGA", "ti_cf62011", &ti_cf62011_device, GFX_TICF62011, {VIDEO_ISA, 8, 16, 32}},
&ti_cf62011_device, GFX_TICF62011 },
#endif #endif
{ "[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, GFX_TVGA }, { "[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, GFX_TVGA, {VIDEO_ISA, 3, 3, 6}},
{ "[ISA] Tseng ET4000AX", "et4000ax", &et4000_device, GFX_ET4000 }, { "[ISA] Tseng ET4000AX", "et4000ax", &et4000_device, GFX_ET4000, {VIDEO_ISA, 3, 3, 6}},
{"[ISA] VGA", "vga", &vga_device, GFX_VGA }, {"[ISA] VGA", "vga", &vga_device, GFX_VGA, {VIDEO_ISA, 8, 16, 32}},
{"[ISA] Wyse 700", "wy700", &wy700_device, GFX_WY700 }, {"[ISA] Wyse 700", "wy700", &wy700_device, GFX_WY700, {VIDEO_ISA, 8, 16, 32}},
{"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI }, {"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI, {VIDEO_BUS, 4, 8, 16}},
{"[PCI] ATI Video Xpression (Mach64 VT2)", "mach64vt2", &mach64vt2_device, GFX_MACH64VT2 }, {"[PCI] ATI Video Xpression (Mach64 VT2)", "mach64vt2", &mach64vt2_device, GFX_MACH64VT2, {VIDEO_BUS, 3, 3, 4}},
{"[PCI] Cardex Tseng ET4000/w32p", "et4000w32p_pci", &et4000w32p_cardex_pci_device, GFX_ET4000W32_CARDEX_PCI }, {"[PCI] Cardex Tseng ET4000/w32p", "et4000w32p_pci", &et4000w32p_cardex_pci_device, GFX_ET4000W32_CARDEX_PCI, {VIDEO_BUS, 4, 5, 10}},
#if defined(DEV_BRANCH) && defined(USE_STEALTH32) #if defined(DEV_BRANCH) && defined(USE_STEALTH32)
{"[PCI] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_pci", &et4000w32p_pci_device, GFX_ET4000W32_PCI }, {"[PCI] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_pci", &et4000w32p_pci_device, GFX_ET4000W32_PCI, {VIDEO_BUS, 4, 5, 10}},
#endif #endif
{"[PCI] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_pci", &s3_virge_pci_device, GFX_VIRGE_PCI }, {"[PCI] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_pci", &s3_virge_pci_device, GFX_VIRGE_PCI, {VIDEO_BUS, 3, 5, 10}},
{"[PCI] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_pci", &s3_virge_988_pci_device, GFX_VIRGEVX_PCI }, {"[PCI] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_pci", &s3_virge_988_pci_device, GFX_VIRGEVX_PCI, {VIDEO_BUS, 3, 4, 7}},
{"[PCI] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_pci", &s3_diamond_stealth64_pci_device, GFX_STEALTH64_PCI }, {"[PCI] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_pci", &s3_diamond_stealth64_pci_device, GFX_STEALTH64_PCI, {VIDEO_BUS, 3, 4, 7}},
#if defined(DEV_BRANCH) && defined(USE_RIVA) #if defined(DEV_BRANCH) && defined(USE_RIVA)
{"[PCI] nVidia RIVA 128", "riva128", &riva128_device, GFX_RIVA128 }, {"[PCI] nVidia RIVA 128", "riva128", &riva128_device, GFX_RIVA128, {VIDEO_BUS, 2, 3, 4}},
{"[PCI] nVidia RIVA TNT", "rivatnt", &rivatnt_device, GFX_RIVATNT }, {"[PCI] nVidia RIVA TNT", "rivatnt", &rivatnt_device, GFX_RIVATNT, {VIDEO_BUS, 2, 3, 4}},
{"[PCI] nVidia RIVA TNT2", "rivatnt2", &rivatnt2_device, GFX_RIVATNT2 }, {"[PCI] nVidia RIVA TNT2", "rivatnt2", &rivatnt2_device, GFX_RIVATNT2, {VIDEO_BUS, 2, 3, 4}},
#endif #endif
{"[PCI] Number Nine 9FX (S3 Trio64)", "n9_9fx_pci", &s3_9fx_pci_device, GFX_N9_9FX_PCI }, {"[PCI] Number Nine 9FX (S3 Trio64)", "n9_9fx_pci", &s3_9fx_pci_device, GFX_N9_9FX_PCI, {VIDEO_BUS, 3, 5, 10}},
{"[PCI] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_pci", &s3_bahamas64_pci_device, GFX_BAHAMAS64_PCI }, {"[PCI] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_pci", &s3_bahamas64_pci_device, GFX_BAHAMAS64_PCI, {VIDEO_BUS, 4, 5, 10}},
{"[PCI] Phoenix S3 Vision864", "px_vision864_pci", &s3_phoenix_vision864_pci_device, GFX_PHOENIX_VISION864_PCI }, {"[PCI] Phoenix S3 Vision864", "px_vision864_pci", &s3_phoenix_vision864_pci_device, GFX_PHOENIX_VISION864_PCI, {VIDEO_BUS, 3, 5, 10}},
{"[PCI] Phoenix S3 Trio32", "px_trio32_pci", &s3_phoenix_trio32_pci_device, GFX_PHOENIX_TRIO32_PCI }, {"[PCI] Phoenix S3 Trio32", "px_trio32_pci", &s3_phoenix_trio32_pci_device, GFX_PHOENIX_TRIO32_PCI, {VIDEO_BUS, 4, 5, 10}},
{"[PCI] Phoenix S3 Trio64", "px_trio64_pci", &s3_phoenix_trio64_pci_device, GFX_PHOENIX_TRIO64_PCI }, {"[PCI] Phoenix S3 Trio64", "px_trio64_pci", &s3_phoenix_trio64_pci_device, GFX_PHOENIX_TRIO64_PCI, {VIDEO_BUS, 3, 5, 10}},
{"[PCI] S3 ViRGE/DX", "virge375_pci", &s3_virge_375_pci_device, GFX_VIRGEDX_PCI }, {"[PCI] S3 ViRGE/DX", "virge375_pci", &s3_virge_375_pci_device, GFX_VIRGEDX_PCI, {VIDEO_BUS, 2, 3, 4}},
{"[PCI] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_pci", &s3_virge_375_4_pci_device, GFX_VIRGEDX4_PCI }, {"[PCI] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_pci", &s3_virge_375_4_pci_device, GFX_VIRGEDX4_PCI, {VIDEO_BUS, 2, 3, 4}},
{"[PCI] Trident TGUI9440", "tgui9440_pci", &tgui9440_pci_device, GFX_TGUI9440_PCI }, {"[PCI] Trident TGUI9440", "tgui9440_pci", &tgui9440_pci_device, GFX_TGUI9440_PCI, {VIDEO_BUS, 4, 8, 16}},
{"[VLB] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_vlb", &mach64gx_vlb_device, GFX_MACH64GX_VLB }, {"[VLB] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_vlb", &mach64gx_vlb_device, GFX_MACH64GX_VLB, {VIDEO_BUS, 4, 8, 16}},
{"[VLB] Cardex Tseng ET4000/w32p", "et4000w32p_vlb", &et4000w32p_cardex_vlb_device, GFX_ET4000W32_CARDEX_VLB }, {"[VLB] Cardex Tseng ET4000/w32p", "et4000w32p_vlb", &et4000w32p_cardex_vlb_device, GFX_ET4000W32_CARDEX_VLB, {VIDEO_BUS, 4, 5, 10}},
#if defined(DEV_BRANCH) && defined(USE_CIRRUS) #if defined(DEV_BRANCH) && defined(USE_CIRRUS)
{"[VLB] Cirrus Logic CL-GD5429", "cl_gd5429", &gd5429_device, GFX_CL_GD5429 }, {"[VLB] Cirrus Logic CL-GD5429", "cl_gd5429", &gd5429_device, GFX_CL_GD5429, {VIDEO_BUS, 4, 8, 16}},
{"[VLB] Cirrus Logic CL-GD5430", "cl_gd5430_vlb", &dia5430_device, GFX_CL_GD5430 }, {"[VLB] Cirrus Logic CL-GD5430", "cl_gd5430_vlb", &dia5430_device, GFX_CL_GD5430, {VIDEO_BUS, 4, 8, 16}},
{"[VLB] Cirrus Logic CL-GD5446", "cl_gd5446", &gd5446_device, GFX_CL_GD5446 }, {"[VLB] Cirrus Logic CL-GD5446", "cl_gd5446", &gd5446_device, GFX_CL_GD5446, {VIDEO_BUS, 4, 5, 10}},
#endif #endif
#if defined(DEV_BRANCH) && defined(USE_STEALTH32) #if defined(DEV_BRANCH) && defined(USE_STEALTH32)
{"[VLB] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_vlb", &et4000w32p_vlb_device, GFX_ET4000W32_VLB }, {"[VLB] Diamond Stealth 32 (Tseng ET4000/w32p)","stealth32_vlb", &et4000w32p_vlb_device, GFX_ET4000W32_VLB, {VIDEO_BUS, 4, 5, 10}},
#endif #endif
{"[VLB] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_vlb", &s3_virge_vlb_device, GFX_VIRGE_VLB }, {"[VLB] Diamond Stealth 3D 2000 (S3 ViRGE)", "stealth3d_2000_vlb", &s3_virge_vlb_device, GFX_VIRGE_VLB, {VIDEO_BUS, 3, 5, 10}},
{"[VLB] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_vlb", &s3_virge_988_vlb_device, GFX_VIRGEVX_VLB }, {"[VLB] Diamond Stealth 3D 3000 (S3 ViRGE/VX)", "stealth3d_3000_vlb", &s3_virge_988_vlb_device, GFX_VIRGEVX_VLB, {VIDEO_BUS, 3, 4, 7}},
{"[VLB] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_vlb", &s3_diamond_stealth64_vlb_device, GFX_STEALTH64_VLB }, {"[VLB] Diamond Stealth 64 DRAM (S3 Trio64)", "stealth64d_vlb", &s3_diamond_stealth64_vlb_device, GFX_STEALTH64_VLB, {VIDEO_BUS, 3, 4, 7}},
{"[VLB] Number Nine 9FX (S3 Trio64)", "n9_9fx_vlb", &s3_9fx_vlb_device, GFX_N9_9FX_VLB }, {"[VLB] Number Nine 9FX (S3 Trio64)", "n9_9fx_vlb", &s3_9fx_vlb_device, GFX_N9_9FX_VLB, {VIDEO_BUS, 3, 5, 10}},
{"[VLB] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_vlb", &s3_bahamas64_vlb_device, GFX_BAHAMAS64_VLB }, {"[VLB] Paradise Bahamas 64 (S3 Vision864)", "bahamas64_vlb", &s3_bahamas64_vlb_device, GFX_BAHAMAS64_VLB, {VIDEO_BUS, 4, 5, 10}},
{"[VLB] Phoenix S3 Vision864", "px_vision864_vlb", &s3_phoenix_vision864_vlb_device, GFX_PHOENIX_VISION864_VLB }, {"[VLB] Phoenix S3 Vision864", "px_vision864_vlb", &s3_phoenix_vision864_vlb_device, GFX_PHOENIX_VISION864_VLB, {VIDEO_BUS, 3, 5, 10}},
{"[VLB] Phoenix S3 Trio32", "px_trio32_vlb", &s3_phoenix_trio32_vlb_device, GFX_PHOENIX_TRIO32_VLB }, {"[VLB] Phoenix S3 Trio32", "px_trio32_vlb", &s3_phoenix_trio32_vlb_device, GFX_PHOENIX_TRIO32_VLB, {VIDEO_BUS, 4, 5, 10}},
{"[VLB] Phoenix S3 Trio64", "px_trio64_vlb", &s3_phoenix_trio64_vlb_device, GFX_PHOENIX_TRIO64_VLB }, {"[VLB] Phoenix S3 Trio64", "px_trio64_vlb", &s3_phoenix_trio64_vlb_device, GFX_PHOENIX_TRIO64_VLB, {VIDEO_BUS, 3, 5, 10}},
{"[VLB] S3 ViRGE/DX", "virge375_vlb", &s3_virge_375_vlb_device, GFX_VIRGEDX_VLB }, {"[VLB] S3 ViRGE/DX", "virge375_vlb", &s3_virge_375_vlb_device, GFX_VIRGEDX_VLB, {VIDEO_BUS, 2, 3, 4}},
{"[VLB] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_vlb", &s3_virge_375_4_vlb_device, GFX_VIRGEDX4_VLB }, {"[VLB] S3 ViRGE/DX (VBE 2.0)", "virge375_vbe20_vlb", &s3_virge_375_4_vlb_device, GFX_VIRGEDX4_VLB, {VIDEO_BUS, 2, 3, 4}},
{"[VLB] Trident TGUI9440", "tgui9440_vlb", &tgui9440_vlb_device, GFX_TGUI9440_VLB }, {"[VLB] Trident TGUI9440", "tgui9440_vlb", &tgui9440_vlb_device, GFX_TGUI9440_VLB, {VIDEO_BUS, 4, 8, 16}},
{"", "", NULL, -1 } {"", "", NULL, -1 }
}; };
@@ -231,6 +229,34 @@ video_card_has_config(int card)
} }
int
video_card_timing_gettype(int card)
{
return(video_cards[card].timing.type);
}
int
video_card_timing_getb(int card)
{
return(video_cards[card].timing.b);
}
int
video_card_timing_getw(int card)
{
return(video_cards[card].timing.w);
}
int
video_card_timing_getl(int card)
{
return(video_cards[card].timing.l);
}
int int
video_card_getid(char *s) video_card_getid(char *s)
{ {

View File

@@ -40,13 +40,13 @@
* W = 3 bus clocks * W = 3 bus clocks
* L = 4 bus clocks * L = 4 bus clocks
* *
* Version: @(#)video.c 1.0.12 2017/12/31 * Version: @(#)video.c 1.0.13 2018/01/27
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
* *
* Copyright 2008-2017 Sarah Walker. * Copyright 2008-2018 Sarah Walker.
* Copyright 2016,2017 Miran Grca. * Copyright 2016-2018 Miran Grca.
*/ */
#include <stdio.h> #include <stdio.h>
#include <stdint.h> #include <stdint.h>
@@ -341,14 +341,36 @@ cgapal_rebuild(void)
void void
video_update_timing(void) video_update_timing(void)
{ {
if (video_timing[video_speed][0] == VIDEO_ISA) { int new_gfxcard;
video_timing_b = (int)(isa_timing * video_timing[video_speed][1]); int type, b, w, l;
video_timing_w = (int)(isa_timing * video_timing[video_speed][2]);
video_timing_l = (int)(isa_timing * video_timing[video_speed][3]); if (video_speed == -1) {
} else { new_gfxcard = video_old_to_new(gfxcard);
video_timing_b = (int)(bus_timing * video_timing[video_speed][1]);
video_timing_w = (int)(bus_timing * video_timing[video_speed][2]); type = video_card_timing_gettype(new_gfxcard);
video_timing_l = (int)(bus_timing * video_timing[video_speed][3]); b = video_card_timing_getb(new_gfxcard);
w = video_card_timing_getw(new_gfxcard);
l = video_card_timing_getl(new_gfxcard);
if (type == VIDEO_ISA) {
video_timing_b = (int)(isa_timing * b);
video_timing_w = (int)(isa_timing * w);
video_timing_l = (int)(isa_timing * l);
} else {
video_timing_b = (int)(bus_timing * b);
video_timing_w = (int)(bus_timing * w);
video_timing_l = (int)(bus_timing * l);
}
} else {
if (video_timing[video_speed][0] == VIDEO_ISA) {
video_timing_b = (int)(isa_timing * video_timing[video_speed][1]);
video_timing_w = (int)(isa_timing * video_timing[video_speed][2]);
video_timing_l = (int)(isa_timing * video_timing[video_speed][3]);
} else {
video_timing_b = (int)(bus_timing * video_timing[video_speed][1]);
video_timing_w = (int)(bus_timing * video_timing[video_speed][2]);
video_timing_l = (int)(bus_timing * video_timing[video_speed][3]);
}
} }
if (cpu_16bitbus) if (cpu_16bitbus)

View File

@@ -8,7 +8,7 @@
* *
* Definitions for the video controller module. * Definitions for the video controller module.
* *
* Version: @(#)video.h 1.0.10 2018/01/25 * Version: @(#)video.h 1.0.11 2018/01/27
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -203,6 +203,10 @@ extern char *video_card_getname(int card);
extern device_t *video_card_getdevice(int card); extern device_t *video_card_getdevice(int card);
#endif #endif
extern int video_card_has_config(int card); extern int video_card_has_config(int card);
extern int video_card_timing_gettype(int card);
extern int video_card_timing_getb(int card);
extern int video_card_timing_getw(int card);
extern int video_card_timing_getl(int card);
extern int video_card_getid(char *s); extern int video_card_getid(char *s);
extern int video_old_to_new(int card); extern int video_old_to_new(int card);
extern int video_new_to_old(int card); extern int video_new_to_old(int card);

View File

@@ -8,7 +8,7 @@
* *
* Application resource script for Windows. * Application resource script for Windows.
* *
* Version: @(#)86Box.rc 1.0.26 2018/01/23 * Version: @(#)86Box.rc 1.0.27 2018/01/27
* *
* Authors: Miran Grca, <mgrca8@gmail.com> * Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com> * Fred N. van Kempen, <decwiz@yahoo.com>
@@ -901,7 +901,7 @@ BEGIN
IDS_2128 "Screen Filter" IDS_2128 "Screen Filter"
IDS_2129 "Render Threads" IDS_2129 "Render Threads"
IDS_2130 "Recompiler" IDS_2130 "Recompiler"
IDS_2131 "System Default" IDS_2131 "Default"
IDS_2132 "%i Wait state(s)" IDS_2132 "%i Wait state(s)"
IDS_2133 "8-bit" IDS_2133 "8-bit"
IDS_2134 "Slow 16-bit" IDS_2134 "Slow 16-bit"

View File

@@ -8,7 +8,7 @@
* *
* Windows 86Box Settings dialog handler. * Windows 86Box Settings dialog handler.
* *
* Version: @(#)win_settings.c 1.0.35 2018/01/26 * Version: @(#)win_settings.c 1.0.36 2018/01/27
* *
* Author: Miran Grca, <mgrca8@gmail.com> * Author: Miran Grca, <mgrca8@gmail.com>
* *
@@ -864,13 +864,14 @@ win_settings_video_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
recalc_vid_list(hdlg); recalc_vid_list(hdlg);
h = GetDlgItem(hdlg, IDC_COMBO_VIDEO_SPEED); h = GetDlgItem(hdlg, IDC_COMBO_VIDEO_SPEED);
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2131));
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2133)); SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2133));
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2134)); SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2134));
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2135)); SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2135));
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2136)); SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2136));
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2137)); SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2137));
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2138)); SendMessage(h, CB_ADDSTRING, 0, (LPARAM)plat_get_string(IDS_2138));
SendMessage(h, CB_SETCURSEL, temp_video_speed, 0); SendMessage(h, CB_SETCURSEL, temp_video_speed + 1, 0);
h=GetDlgItem(hdlg, IDC_CHECK_VOODOO); h=GetDlgItem(hdlg, IDC_CHECK_VOODOO);
SendMessage(h, BM_SETCHECK, temp_voodoo, 0); SendMessage(h, BM_SETCHECK, temp_voodoo, 0);
@@ -959,7 +960,7 @@ win_settings_video_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam)
temp_gfxcard = video_new_to_old(video_card_getid(stransi)); temp_gfxcard = video_new_to_old(video_card_getid(stransi));
h = GetDlgItem(hdlg, IDC_COMBO_VIDEO_SPEED); h = GetDlgItem(hdlg, IDC_COMBO_VIDEO_SPEED);
temp_video_speed = SendMessage(h, CB_GETCURSEL, 0, 0); temp_video_speed = SendMessage(h, CB_GETCURSEL, 0, 0) - 1;
h = GetDlgItem(hdlg, IDC_CHECK_VOODOO); h = GetDlgItem(hdlg, IDC_CHECK_VOODOO);
temp_voodoo = SendMessage(h, BM_GETCHECK, 0, 0); temp_voodoo = SendMessage(h, BM_GETCHECK, 0, 0);

View File

@@ -9,7 +9,7 @@
* Implementation of the Iomega ZIP drive with SCSI(-like) * Implementation of the Iomega ZIP drive with SCSI(-like)
* commands, for both ATAPI and SCSI usage. * commands, for both ATAPI and SCSI usage.
* *
* Version: @(#)zip.c 1.0.2 2018/01/27 * Version: @(#)zip.c 1.0.3 2018/01/28
* *
* Author: Miran Grca, <mgrca8@gmail.com> * Author: Miran Grca, <mgrca8@gmail.com>
* *
@@ -1060,7 +1060,7 @@ static void zip_cmd_error(uint8_t id)
zip[id].packet_status = 0x80; zip[id].packet_status = 0x80;
zip[id].callback = 50LL * ZIP_TIME; zip[id].callback = 50LL * ZIP_TIME;
zip_set_callback(id); zip_set_callback(id);
pclog("ZIP %i: [%02X] ERROR: %02X/%02X/%02X\n", id, zip[id].current_cdb[0], zip_sense_key, zip_asc, zip_ascq); zip_log("ZIP %i: [%02X] ERROR: %02X/%02X/%02X\n", id, zip[id].current_cdb[0], zip_sense_key, zip_asc, zip_ascq);
} }
static void zip_unit_attention(uint8_t id) static void zip_unit_attention(uint8_t id)
@@ -1157,7 +1157,7 @@ int zip_data(uint8_t id, uint32_t *len, int out)
int i = 0; int i = 0;
if (zip[id].sector_pos >= zip_drives[id].medium_size) { if (zip[id].sector_pos >= zip_drives[id].medium_size) {
pclog("ZIP %i: Trying to %s beyond the end of disk\n", id, out ? "write" : "read"); zip_log("ZIP %i: Trying to %s beyond the end of disk\n", id, out ? "write" : "read");
zip_lba_out_of_range(id); zip_lba_out_of_range(id);
return 0; return 0;
} }
@@ -1443,12 +1443,12 @@ void zip_command(uint8_t id, uint8_t *cdb)
memcpy(zip[id].current_cdb, cdb, zip[id].cdb_len); memcpy(zip[id].current_cdb, cdb, zip[id].cdb_len);
if (cdb[0] != 0) { if (cdb[0] != 0) {
pclog("ZIP %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", id, cdb[0], zip_sense_key, zip_asc, zip_ascq, zip[id].unit_attention); zip_log("ZIP %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", id, cdb[0], zip_sense_key, zip_asc, zip_ascq, zip[id].unit_attention);
pclog("ZIP %i: Request length: %04X\n", id, zip[id].request_length); zip_log("ZIP %i: Request length: %04X\n", id, zip[id].request_length);
#if 0 #if 0
for (CdbLength = 1; CdbLength < zip[id].cdb_len; CdbLength++) for (CdbLength = 1; CdbLength < zip[id].cdb_len; CdbLength++)
pclog("ZIP %i: CDB[%d] = %d\n", id, CdbLength, cdb[CdbLength]); zip_log("ZIP %i: CDB[%d] = %d\n", id, CdbLength, cdb[CdbLength]);
#endif #endif
} }
@@ -1563,7 +1563,7 @@ void zip_command(uint8_t id, uint8_t *cdb)
case GPCMD_READ_6: case GPCMD_READ_6:
zip[id].sector_len = cdb[4]; zip[id].sector_len = cdb[4];
zip[id].sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]); zip[id].sector_pos = ((((uint32_t) cdb[1]) & 0x1f) << 16) | (((uint32_t) cdb[2]) << 8) | ((uint32_t) cdb[3]);
pclog("ZIP %i: Length: %i, LBA: %i\n", id, zip[id].sector_len, zip[id].sector_pos); zip_log("ZIP %i: Length: %i, LBA: %i\n", id, zip[id].sector_len, zip[id].sector_pos);
break; break;
case GPCMD_READ_10: case GPCMD_READ_10:
zip[id].sector_len = (cdb[7] << 8) | cdb[8]; zip[id].sector_len = (cdb[7] << 8) | cdb[8];
@@ -1783,7 +1783,7 @@ void zip_command(uint8_t id, uint8_t *cdb)
} }
zip[id].current_page_code = cdb[2] & 0x3F; zip[id].current_page_code = cdb[2] & 0x3F;
pclog("Mode sense page: %02X\n", zip[id].current_page_code); zip_log("Mode sense page: %02X\n", zip[id].current_page_code);
if (!(zip_mode_sense_page_flags & (1LL << zip[id].current_page_code))) { if (!(zip_mode_sense_page_flags & (1LL << zip[id].current_page_code))) {
zip_invalid_field(id); zip_invalid_field(id);
@@ -2552,7 +2552,7 @@ zip_global_reset(void)
if (zip_drives[c].bus_type) if (zip_drives[c].bus_type)
SCSIReset(zip_drives[c].scsi_device_id, zip_drives[c].scsi_device_lun); SCSIReset(zip_drives[c].scsi_device_id, zip_drives[c].scsi_device_lun);
pclog("ZIP global_reset drive=%d host=%02x\n", c, zip_drives[c].host_drive); zip_log("ZIP global_reset drive=%d host=%02x\n", c, zip_drives[c].host_drive);
if (wcslen(zip_drives[c].image_path)) if (wcslen(zip_drives[c].image_path))
zip_load(c, zip_drives[c].image_path); zip_load(c, zip_drives[c].image_path);
} }