1. ATI Extended 8514/A mode may not use bit 5 of ATI reg 0xb0 sometimes but at the same time it won't use the standard VGA way of setting up 256+ colors, therefore, in the VGA DAC writes, use standard VGA way to revert to VGA mode in the writes instead of relying on bit 5 of ATI reg 0xb0 being enabled/disabled there. Fixes mode switches in VLB/PCI configurations using Windows 9x and possibly other stuff, ISA is unaffected and still works fine.
2. Added more logs and and remove/set I/O handlers correctly for the PCI side.
Mark the ATI extended 8514/A mode accordingly (that is, if bit 5 of ATI reg 0xb0 and using ATI extended ports at the same time). Fixes wrong colors in some instances using standard IBM 8514/A drivers on Mach32.
1. Added the missing call to mach32_updatemapping from port 0x3CF through its index 6.
2. If the accelerator DAC is active and the extended 256 color bit is on too then enable 8514/A mode when needed, otherwise it's VGA mode or decided by the passthrough/clock selection ports.
3. VGA DAC reads are redirected to the 8514/A DAC reads only when 8514/A mode is on.
1. vga_on global variable removed, as it didn't play well with 2 subsystems at once (8514/A and XGA both enabled).
2. Emulate the Foreground/Background Color aliases of PIX_TRANS properly when not executing a command.
3. Voodoo 3D override now works properly (again) with Mach32 PCI cards and others by turning the 8514/A timer off and on accordingly.
1. Simplified 4bpp rendering mode.
2. Implement CRTC31 bit 0 functionality which enables/disables the vendor banks. Fixes Diamond Stealth 64 964 VRAM (VLB/PCI) detection on NT 3.1 (and possibly other cards) while keeping NT 3.1 347.1's full screen Command Prompt test normal without garbage using the 911/924 chips.
IBM 8514/A (MCA/ISA).
Added a configure button to the QT frontend for the amount of memory used by said add-on chips.
XGA:
Forgot a change about the 4mb aperture.
1. Pattern/font fixes for Windows 3.1's third party XGA drivers as well as OS/2's win3.x' box (seamless and full).
2. The 4MB aperture is still used internally even if the 1MB one is in use, fixes OS/2's XGA driver on boot when less than 16MB of memory is used.
8514/A compatibles:
1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time).
2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers.
3. Clipping regs are more accurate for acceleration.
XGA 1-2:
A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied.
8514/A/Mach8/32:
Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though).
PVGA:
Minor fixes to the banking.
S3-based (Pre-ViRGE):
1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver.
2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips).
XGA-1/2:
Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should.
Misc:
Added the BT481 RAMDAC for future card use.
1. SVGA decode mask shouldn't be used in XGA native mode, fixes wrong locks in LFB access.
2. INMOS XGA only: more accurate emulation per INMOS G201 MCA/ISA manual, including the MMIO access and port 0x96, allowing full BIOS and MMIO access at the same time on 0xc0000.
8514/A changes:
1. Correct interlaced display resolution.
2. Added a limit to cursor coordinates.
3. Test/WIP features of the add-on Mach8 side (ATI 8514/A Ultra) such as configurable BIOS.
4. Made the CMD 5 of the acceleration (Polygon Boundary) more accurate per manual (as much as I could regarding the clipping).
Cirrus related:
1. Added SUBSYS PCI vendor/device ID of the 5480 (per manual).
IBM VGA:
1. Built-in/option rom-less VGA don't need the "available" flag.
ATI Mach8/32:
1. As with 8514/A, corrected interlaced display.
XGA-1/-2:
1. Moved the XGA R/W memory size tests out of the SVGA R/W routines to reflect the per card basis, although anything that uses its own SVGA mapping would call the tests there (such as Cirrus, Headland and ATI) when not accessing the LFB. This finally puts an end to the XGA MCA mapping enabling bugs.
2. Re-organized the ISA standalone and non-standalone (INMOS) sides of the chips so that they work properly and remove the FILE rom loading hack from init.
3. The Memory Mapped R/W sides now account for instance in their address range.
4. INMOS only: prevent any ROM address access to anything lower than 0xc8000 to not conflict with the main BIOS rom loading.
5. Fixed native pitch by using the correct register, this fixes non 1024x768 resolutions under NT.
6. More logs when enabled to see any future bugs.
1. Actually fix the remaining pinkish/reddish stuff in 32bpp modes properly (for real, especially OS/2 and possibly other stuff).
2. The Compare accel stuff is more sanitized.
3. When the BitBLT DY coordinates are negative, don't draw the pixels. This fixes some software cursor issues with OS/2's S3 3.03.xx drivers.
4. Reset the FIFO when the card is reset.
5. Indentation fixes (to be improved further however).
6. Implement bit 5 functionality of 0xBEE8 index 0xE (MULT_MISC) (and currently only in the Rectangle Fill command). This fixes missing text on I-O Data Vision968 specific drivers for Windows 3.10 Japanese (PC/AT compatible)
7. Moved the Streams engine out of the FIFO (like the ViRGE) as well as making all CRTC's of the Trio64V2 writable and SEQREGs from 0x10 onwards to make sure the Streams engine works properly.
8. Added a missing break from the RAMDAC read stuff.
9. Remove a leftover of PCem.
1. Going from screenshots of the Mach32 chips, they all have the ati18811-1 clock regardless of the bus type, whilst the Mach8 has an ati18812, which is actually a ati18811-0
2. Unbreak the NS3.1 Mach32 driver, ergo, don't block the LFB processing.
The so called "NT 3.5 font fix" on the Mach64 applies only to the Source Control reg with bits 2-3 set, but Solaris only sets bit 2 (without bit 3), so, don't align the source with bit 3 cleared. This fixes the garbled fonts under Solaris using said card.
Apparently the extended sequencer registers (>= 0x20) are required to have sane values on the STREAMS engine on GX2 and probably other chips in the ViRGE range.
