Make sure for the 9001st time to display correctly the horizontal side of the display (looking at you, ATI 1992 set for win3.1x and Mach8/32 drivers for OS/2 1.2x).
1. The SPEA specific cards using the 801/5 chip apparently have an ID that's not 0xa0, rather, they either use 0xa2 or greater for the stepping. Fixes wrong colors in 800x600 modes and greater in 8bpp mode.
2. HWCursor addresses for 8bpp are now properly implemented if the 8bpp mode bit (CRTC3a bit 4) is checked, no longer relaying on GDCREG5 bit 6). Fixes garbage cursor in the SPEA 80x cards drivers (BigWin) using 8bpp mode.
IBM/ATI 8514/A side:
Made mode switches more immediate when actually switching from VGA to 8514/A and viceversa.
Tseng ET4000AX/W32 series side:
Actually use bit 2 of index 0x3f for the horizontal blank start bit 8 instead of bit 4 (horizontal retrace start), fixes skew issues with the et4000w32i rev B. card with resolutions like 1024x768 at 15 or 16bpp and others.
S3 side:
Temporary changes to match the release (due to tomorrow) of 86box. Said changes are about the horizontal display of the tvp3026-based S3 chips.
IBM/ATI 8514-based:
Temporarily commented out the hblank side of it due to htotal bugs.
TVP3026 side:
When the upper clock selection bits are 0 and when extended VGA modes are set, double the hdisp.
1. The Debian issue mystery lies around chain2_read/write being required when the LFB mapping is enabled too when MGA modes are set without blitting, however, when it is blitting, immediately tell chain2 to not interfere with the mapping. Fixes Debian once and for all as well as VRAM detection correctly while keeping existing compatibility fine.
2. Undev branch the G100 per above. (Revert if more bugs are revealed).
3. An AND with 0 is not tolerable as it nulls the LFB, fixes hang ups with Win2000 using the Millennium II and possibly the G100.
4. the Extended CRTCs now have a call for timing recalculation, fixes mode changes when blitting is going on.
