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178 Commits

Author SHA1 Message Date
OBattler
04ae339ba1 Parallel ports: Fix EPP-related ports handling, appears to fix a reported sound regression. 2025-07-07 03:07:22 +02:00
OBattler
ef977aec45 ALi M5123: Actually set the parallel port DMA channel. 2025-07-06 03:29:36 +02:00
OBattler
faf7cf9ce6 PC87310 / ALi M5105 - merge the three device_t's and use device_add_param(). 2025-06-28 01:05:24 +02:00
Jasmine Iwanek
58aa261273 LPT ECP/EPP support 
Co-Authored-By: Miran Grča <oubattler@gmail.com>
 2025-06-24 08:18:39 -04:00
OBattler
8482937f9f Added the Packard Bell Legend 300SX. 2025-06-13 19:42:59 +02:00
OBattler
d3f13cf82b Added the Ast! Advantage 40xxd. 2025-06-10 18:14:44 +02:00
OBattler
9ebcc44350 Add the Dell System 333s/L. 2025-05-28 19:41:27 +02:00
Miran Grča
e277fb894b PC87309: Swap keyboard and mouse to their correct logical devices. 2025-05-25 20:16:51 +02:00
OBattler
c8fbee1b62 Fixes to the two recently NSC Super I/O chips and the two boards that use the PC87309 (Tyan Tsunami ATX and the Freeway). 2025-05-22 06:20:04 +02:00
OBattler
455622492b All the required fixes - the Dell OptiPlex Gn+ now works correctly. 2025-05-21 20:49:54 +02:00
OBattler
a262a519cb PC87309: Actually fix relocation so it's implemented according to the PC87309 datasheet, not the PC87306 one. 2025-05-18 20:48:29 +02:00
OBattler
9441b6f2cf PC87309: Make the Super I/O chip relocatable. 2025-05-18 20:42:28 +02:00
OBattler
7b9b2bc10d Some FDC, SM(S)C FDC37C66x, and VLSI VL82C480 changes. 2025-05-18 08:14:46 +02:00
OBattler
e98424a8ae Added the ICS SB486PV. 2025-05-17 02:35:11 +02:00
OBattler
941766f2e8 Added the ZEOS Martin. 2025-05-16 05:04:48 +02:00
OBattler
93025cc115 SM(S)C FDC 37c6xx: Return 0xFF on out of bound register read, fixes segmentation fault on the DEC Venturis 4xx. 2025-05-06 19:29:30 +02:00
OBattler
018bbfae43 SM(S)C FDC37C93x Super I/O chip rewrite, add the Acer V62x, and un-dev-branch the V-Tech Laser XT machines. 2025-05-05 05:11:55 +02:00
Jasmine Iwanek
d00f80d3ce General changes from the obattler_202406 branch 
Co-Authored-By: Miran Grča <oubattler@gmail.com>
 2025-02-09 02:20:36 -05:00
Jasmine Iwanek
5f273265ae Assorted warning fixes 2025-02-02 03:24:50 -05:00
Jasmine Iwanek
4e6f29a7d5 malloc to calloc 2025-02-01 15:38:36 -05:00
Jasmine Iwanek
81b8038bc5 Clean up .available & .poll 2025-02-01 03:38:52 -05:00
Dmitry Borisov
8dc0beaeec pc87307: Fix GPIO base address configuration 
Don't clobber the GPIO I/O Base value.

According to the PC87307 datasheet, port 0x60 bits [2:7] are read-only
for the Parallel Port (4) device and cannot be altered by software.
For others devices, the 0x60 port may be written with any value.

The SGI firmware emits the following PC87307 initialization sequence
after each reset:

/* Select the GPIO device (7) */
SIO IDX: 2E <-- 07
SIO DAT: 2F <-- 07

/* I/O Base MSB = 0x0F */
SIO IDX: 2E <-- 60
SIO DAT: 2F <-- 0F

/* I/O Base LSB = 0xC0 */
SIO IDX: 2E <-- 61
SIO DAT: 2F <-- C0

/* Enable address decoding (I/O Base = 0xFC0) */
SIO IDX: 2E <-- 30
SIO DAT: 2F <-- 01

The GPIO I/O Base is erroneously assigned to 0x7C0. Fix by removing the 0x07 mask.
 2025-01-05 12:22:14 +06:00
Jasmine Iwanek
f4b63caf0b One line per file in CmakeLists.txt 2024-09-04 18:34:06 -04:00
OBattler
5fdd6263a2 FDC37x93x: Always return 0xFF on GPIO reads, allow the code in chipset/intel_piix.c to take over instead, fixes CPU speed readout on the HP Vectra VL 5 Series 4. 2024-08-30 19:47:22 +02:00
OBattler
fc714e7270 Backported the VLSI 82c113 Super I/O chip from my branch because of two machines we already had that require it. 2024-07-22 00:07:39 +02:00
OBattler
c377a36288 SM(S)C FDC37c932 Super I/O chip fixes, fixes #4601. 2024-07-19 17:45:44 +02:00
OBattler
509305f2f1 Make the SMC FDC37c935 Super I/O chip on the HP Brio 80xx and Packard Bell PB810 correctly use port 370h instead of the standard 3F0h, fixes #4427. 2024-05-07 20:09:30 +02:00
OBattler
75919a1cb9 Fixed the SM(S)C) FDC37C93x NVR handling and make any non-PIIX4 machine that uses it, use its full NVR capabilities. 2024-04-18 03:49:47 +02:00
OBattler
7f4e8caefa IT86x1: Use PRIXPTR instead of the #ifdef's. 2024-03-27 22:23:33 +01:00
OBattler
58a0c840c1 Added SiS 550x, 558x, 559x, (5)600, UMC UM8890, UMC UM8663 Super I/O Chips, UMC UM8673F and Winbond W83769F IDE Contollers, and a number of machines, and fixes to the UM888x 486 chipset. 2024-02-22 00:52:20 +01:00
OBattler
78dd603951 Minor change to FDC37C6xx. 2024-02-20 07:26:44 +01:00
OBattler
0483b8ceec FDC37C669: Fix a wrong condition causing segmentation faults. 2024-01-29 11:07:11 +01:00
BurnedPinguin
fc834decb9 Merge branch '86Box:master' into machine_23 2024-01-27 09:34:42 +01:00
OBattler
9107c2fa25 Added the AOpen AP61 and fixed floppies on the LG IBM 440 FX. 2024-01-24 04:56:31 +01:00
BurnedPinguin
5e59cb17cf Conflict resolution. 2024-01-18 11:45:21 +01:00
OBattler
1d15d48ee7 Broke out the ALi M5213 IDE from the ALi M1489 code (it turns out the ALi M1489 on-chip IDE is for all intents and purposes identical to the M5213) and made the Acer A1G use it. 2024-01-08 23:58:30 +01:00
OBattler
3a62aa4ea7 First batch of Acer A1G fixes, fixes #3992. 2024-01-08 22:27:09 +01:00
OBattler
4f392ca8e3 SM(S)C FDC37C669 Super I/O chip rewrite and proper FDC power down behavior, fixes floppy drive errors on the new Daeweoo machine. 2024-01-07 01:42:34 +01:00
OBattler
a76e3890b2 And the one in sio/sio_um8669f.c. 2023-12-16 20:57:58 +01:00
OBattler
c2a89f64b2 Fixed the warnings in sio/sio_it86x1f.c. 2023-12-16 20:56:45 +01:00
OBattler
e5cfed2c24 IT86x1F: Move the declaration of effective_ldn outside the case block. 2023-11-11 17:01:56 +01:00
RichardG867
adaba17743 sio_um8669f: Improve configuration register system and add definitions 2023-11-07 22:28:26 -03:00
RichardG867
c243af519b sio_um8669f: Implement IDE controller 2023-11-07 22:02:30 -03:00
RichardG867
61ec3213c6 Merge branch 'master' of ssh://github.com/86Box/86Box into version/4.1 2023-11-07 21:28:51 -03:00
OBattler
9e08c8317b Fixed NVR handling on PC87306 reset, fixes MR BIOS'es. 2023-11-06 04:14:42 +01:00
RichardG867
3d65f69949 Rewrite IT8661F and add IT8671F 2023-10-23 15:50:19 -03:00
OBattler
f3ca2a6dcd Added the Winbond W83878F variant with HEFERE = 0 (key = 88h) and correctly made the MS-5124 use it. 2023-10-20 21:48:51 +02:00
OBattler
57375db3bd More fixes. 2023-10-08 18:15:27 +02:00
OBattler
684a842699 Some fixes, Socket 7 3 V, and the on-board Vibra 16S. 2023-10-08 05:21:12 +02:00
OBattler
7fe79f995d Intel GPIO sanitization, phase 1. 2023-10-08 01:14:26 +02:00