claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
3,794 Commits 1 Branch 0 Tags
92ff0d7d3956a34586fcd791797807cb314c3c9d
Commit Graph

156 Commits

Author SHA1 Message Date
Miran Grča
92ff0d7d39 Merge pull request #996 from richardg867/master 
ALi M6117 SoC implementation
 2020-09-11 01:56:54 +02:00
tiseno100
f582d4b432 Disabled logging again 2020-09-11 00:08:57 +03:00
tiseno100
2e7781505a Added more 82335 parts 
Registers are treated with an array instead of separate values.
Minor Shadowing changes and also implemented the chipset lock mechanism fixing the ADI soft reset issue properly.
 2020-09-10 23:56:51 +03:00
tiseno100
54c569e5be System ROM shadowing doesn't depend from the selected register. It actually depends on the Video RAM 
Also seems like the System ROM is RO. RW causes it to hang
 2020-09-10 19:55:11 +03:00
tiseno100
7a075e35e3 Disable logging 2020-09-10 19:50:53 +03:00
tiseno100
b36f3be457 Fixed soft reset failures of the ADI 386SX 2020-09-10 19:48:18 +03:00
tiseno100
0993643327 Delete the old Intel 82335 code 2020-09-10 19:47:41 +03:00
tiseno100
0e24c8883d Full Intel 82335 rewrite 
Fixes black screen when you shadow video RAM. More checks may be required to get MR 82335 to work properly.
 2020-09-10 15:48:43 +03:00
RichardG867
5b016edb2a Add non-working AMI M6117 machine 2020-09-08 22:54:30 -03:00
RichardG867
8d44f2e329 Remove unused M6117 SMRAM function 2020-09-08 22:10:35 -03:00
RichardG867
4ca4ab76ae Merge branch 'master' of https://github.com/86Box/86Box 2020-09-08 21:44:28 -03:00
RichardG867
777a6d02e0 Indentation cleanups on STPC 2020-09-08 21:44:10 -03:00
RichardG867
a8c813cb4b Initial implementation of ALi M6117D 2020-09-08 21:43:54 -03:00
OBattler
2569bcbf43 Added a sanity check on write to PIIX4(E) DDMA base PCI registers. 2020-09-08 03:42:42 +02:00
tiseno100
20cd01aaca Added the US Technologies 386 motherboard. 
Late 386 motherboard using the Award 4.50G BIOS.
 2020-08-19 23:51:40 +03:00
tiseno100
2915080f02 Some rework on the write procedure of the ALi M1489 2020-08-11 10:36:04 +03:00
tiseno100
415a4c4f58 Mass ALi work 
It includes the M1489 which the rewritten M1429. Also a machine for the new 931APM SIO
 2020-08-10 12:20:29 +03:00
OBattler
949e145be3 Rewrite of AT keyboard controller polling. 2020-08-04 04:01:54 +02:00
RichardG867
e1b07f2fee Change special 440BX VPC behavior to is_vpc 2020-07-25 12:28:13 -03:00
RichardG867
e8f2fb0915 Isolate 440BX special behavior to devbranch 2020-07-24 15:02:59 -03:00
RichardG867
763b61c469 Add special behavior for a reserved 440BX bus speed bit for the Virtual PC 2007 machine 2020-07-24 15:00:58 -03:00
RichardG867
9efdf74b51 Merge branch 'master' of https://github.com/86Box/86Box 2020-07-24 13:48:29 -03:00
OBattler
751e5962d7 Fixed the bus speed register on the 440BX. 2020-07-24 17:06:43 +02:00
RichardG867
a4cf2c7859 Fix STPC serial unlocking behavior, add some more comments to the code 2020-07-20 15:24:51 -03:00
RichardG867
31ca983604 Fix STPC UART port check 2020-07-20 15:07:54 -03:00
tiseno100
6bef7affd7 Chips & Technologies 486 emulation 
Some extremely basic 486 chipset. Used by very few motherboards.
 2020-07-19 13:46:01 +03:00
tiseno100
0fec9779ea Minor changes on the VIA 486's. 2020-07-18 14:24:08 +03:00
tiseno100
1701dc5a4a VIA 486 bringup 2020-07-17 14:18:54 +03:00
OBattler
d2a80b3f2b Some SCAMP fixes (of bugs revealed by GCC when compiling 64-bit 86Box). 2020-07-15 05:11:23 +02:00
RichardG867
9eb4577101 Merge branch 'master' of https://github.com/86Box/86Box 2020-07-14 22:25:11 -03:00
RichardG867
a1e273b13b STPC serial and parallel support 2020-07-14 22:24:22 -03:00
OBattler
c24a24c1cb Finished the Headland rework, now EMS works on both machines as it should, as does shadowing. 2020-07-14 03:47:37 +02:00
OBattler
d248039995 Finished the headland fixes, now EMS works again. 2020-07-12 03:54:28 +02:00
OBattler
8020f8e763 Some Headland chipset fixes. 2020-07-12 02:07:27 +02:00
OBattler
3c0f4491a8 Fixed STPC Client IDE PCI Vendor ID. 2020-07-11 01:42:26 +02:00
OBattler
e0ea2b1f69 Fixed the STPC chipset PCI Vendor and Device ID's. 2020-07-11 00:56:45 +02:00
OBattler
0d2e69142d Fixed an IDE log line and fixed a bug in the implementation of the STPC chipsets caused by an erratum in the STPC Atlas programming manual (corrected in the other STPC chipsets' programming manuals). 2020-07-11 00:42:38 +02:00
OBattler
7ebe8f5018 Vastly improved the STPC PCI IDE controller emulation. 2020-07-10 04:23:10 +02:00
OBattler
f0633753fc Fixed STPC PCI IRQ steering again. 2020-07-10 03:14:15 +02:00
OBattler
fec5160bf4 Fixed STPC PCI IRQ steering and silenced the massive Voodoo warning. 2020-07-10 03:10:07 +02:00
OBattler
72c1c36ec6 OPTi 5x7 no longer does excess logging, running of timers on the recompiler is now done on every fourth AT KBC port 61h read instead of every 3F4h read, added some safety precautions to io.c to handle the cases where a handler removes itself, implmented the STPC ELCR and refresh control, and fixed the messed up register reading in the PC87307 and PC87309 implementations. 2020-07-10 02:05:49 +02:00
RichardG867
c23a9c984c Merge branch 'master' of https://github.com/86Box/86Box 2020-07-09 16:50:28 -03:00
RichardG867
37c5edacd0 STPC: Implement bus master IDE 2020-07-09 16:50:19 -03:00
OBattler
3a9c4cece2 Merge branch 'master' of https://github.com/86Box/86Box 2020-07-09 19:28:58 +02:00
OBattler
5a862e9551 Fixed 440GX ID without AGP and the FDC now causes the CPU to run the timers on MSR read when the recompiler is used. 2020-07-09 19:28:47 +02:00
Miran Grča
1186e7826f Merge pull request #914 from richardg867/master 
STPC PCI IRQ steering
 2020-07-09 17:55:46 +02:00
RichardG867
5304db348f STPC: disable PCI IRQs on reset 2020-07-08 18:25:35 -03:00
RichardG867
4ab5e7c5af STPC: implement PCI IRQ steering, leave blank space for ELCR registers 2020-07-08 18:21:06 -03:00
RichardG867
07fba1ce11 STPC: change hex values to upper case 2020-07-08 17:54:05 -03:00
nerd73
8be211c69a Merge branch 'master' into opti291 2020-07-08 02:00:46 -06:00