OBattler e0ea2b1f69 Fixed the STPC chipset PCI Vendor and Device ID's.

2020-07-11 00:56:45 +02:00

..

acc2168.c

Revert "Merge branch 'master' of https://github.com/86Box/86Box"

2020-06-07 15:52:45 -03:00

ali1429.c

Move all include files to src/include

2020-03-29 19:53:29 +02:00

amd640.c

Implemented the AMD 640 chipset

2020-06-22 11:09:11 +03:00

cs8230.c

Ported the latest cs8230 patch from greatpsycho.

2020-06-17 23:47:37 +02:00

headland.c

Move all include files to src/include

2020-03-29 19:53:29 +02:00

i82335.c

Use the correct UNIX encoding on the i82335

2020-06-23 17:20:22 +03:00

intel_4x0.c

Fixed 440GX ID without AGP and the FDC now causes the CPU to run the timers on MSR read when the recompiler is used.

2020-07-09 19:28:47 +02:00

intel_420ex.c

Unified DRB locking logic, added DRB locking to VIA VPX, and fixed SPD

2020-06-26 21:03:46 -03:00

intel_piix.c

Added the CMD640 (but the associated PB520R is not yet properly done, needs the 82091AA, so it's disabled until I implement it), fixed initialization of the IDE registers on the SMSC southbridge, bumped up the number of emulated serial ports to 4 (was 2), and added the ability to properly have multiple W83977's on a single machine.

2020-07-08 04:24:25 +02:00

intel_sio.c

Fixed a number of bug sin various modules, VS440FX mostly works now (one bug on soft reset is missing which is left to be debugged).

2020-06-15 17:08:42 +02:00

mcr.c

Moved the two (unused) Intel 386 chipset files to chipset/.

2020-06-13 10:27:07 +02:00

neat.c

Move all include files to src/include

2020-03-29 19:53:29 +02:00

opti5x7.c

OPTi 5x7 no longer does excess logging, running of timers on the recompiler is now done on every fourth AT KBC port 61h read instead of every 3F4h read, added some safety precautions to io.c to handle the cases where a handler removes itself, implmented the STPC ELCR and refresh control, and fixed the messed up register reading in the PC87307 and PC87309 implementations.

2020-07-10 02:05:49 +02:00

opti283.c

Commented the OPTi 283 logging code back

2020-07-07 16:40:07 +03:00

opti291.c

Implement F0000-FFFFF shadowing on the OPTi 291

2020-07-08 01:41:18 -06:00

opti495.c

Fixed shadowing on the OPTi 82c5x7, OPTi 82c495 now has Port 92h, and implemented the OPTi 82c611/611A VLB IDE controlled required by the Excalibur.

2020-07-07 20:43:28 +02:00

opti895.c

Fixed Shadow RAM handling for all OPTi 486 chipsets.

2020-06-30 03:24:06 +02:00

scamp.c

Move all include files to src/include

2020-03-29 19:53:29 +02:00

scat.c

Move all include files to src/include

2020-03-29 19:53:29 +02:00

sis_85c50x.c

Move all include files to src/include

2020-03-29 19:53:29 +02:00

sis_85c310.c

More reorganization and finally merged the two makefiles.

2020-06-13 12:32:09 +02:00

sis_85c471.c

Move all include files to src/include

2020-03-29 19:53:29 +02:00

sis_85c496.c

Fixes to SiS 496/497 and W83787F.

2020-06-29 04:32:30 +02:00

stpc.c

Fixed the STPC chipset PCI Vendor and Device ID's.

2020-07-11 00:56:45 +02:00

via_apollo.c

Implement DRB locking for VIA Apollo chipsets

2020-06-26 22:05:32 -03:00

via_vpx.c

Unified DRB locking logic, added DRB locking to VIA VPX, and fixed SPD

2020-06-26 21:03:46 -03:00

via_vt82c586b.c

A slight reorganization of the source tree and fixed a warning in disk/mo.c.

2020-06-13 10:17:57 +02:00

via_vt82c596b.c

A slight reorganization of the source tree and fixed a warning in disk/mo.c.

2020-06-13 10:17:57 +02:00

vl82c480.c

Rewrote the VLSI 82C480 chipset emuluation and gave the PS/1 Model 2133 its Super I/O chip.

2020-06-30 15:37:07 +02:00

wd76c10.c

Move all include files to src/include

2020-03-29 19:53:29 +02:00