Commit Graph

793 Commits

Author SHA1 Message Date
Miran Grča
a434a98495 Merge pull request #5455 from Torinde/patch-3
VIA Cyrix III (Samuel) - add codename
2025-04-21 02:28:23 +02:00
OBattler
8aa15fa21f The update value handler should be at Pentium Pro, not Cyrix Cx6x86. 2025-04-11 20:27:41 +02:00
OBattler
95a6aa0bdf Fix the LxS fix again. 2025-04-11 19:29:40 +02:00
Torinde
9032af002d VIA Cyrix III (Samuel) - add codename
To distinguish from Cyrix-heritage Joshua CPUs. #5451
2025-04-09 12:17:50 +02:00
OBattler
3b5966eb46 LDS/LES/LFS/LGS/LSS: Fix segment wraparounds in 16-bit address mode. 2025-04-07 06:03:19 +02:00
RichardG867
4bd374a7df Don't apply the Deschutes cacheability fix to Covington 2025-04-02 16:55:57 -03:00
RichardG867
f56f636248 Report 4 GB cacheable memory on Deschutes CPUs, fixes modern Linux limiting itself to 512 MB on some machines 2025-04-02 16:27:10 -03:00
Cacodemon345
abbae5efd2 Cleanups 2025-03-26 23:18:36 +06:00
Cacodemon345
ad4e90e345 Finally fix RETEM 2025-03-26 23:01:09 +06:00
Cacodemon345
2b107725bd Custom NMI handling for i8080 emulation 2025-03-26 20:17:13 +06:00
Cacodemon345
99e8d13afa Implement NEC V20/V30's i8080 emulation mode 2025-03-26 20:04:43 +06:00
OBattler
609f34cc49 Only flush write MMU cache on WP flag toggle as read and execute MMU cache is not affected by the flag. 2025-03-23 15:36:05 +01:00
Cacodemon345
a9c97abfb6 Pre-calculate pow table for FXTRACT instruction 2025-03-20 21:52:48 +06:00
OBattler
2cd99f0c70 X86 segmentation: apparently, the CPU can execute a data segment in some cases, used by LINK and CodeView, fixes #5283. 2025-03-19 07:54:54 +01:00
OBattler
395f23cf57 More Cyrix fixes. 2025-03-19 03:12:36 +01:00
OBattler
70dcdee72b Some Cyrix MII table/ID fixes and added some Cyrix CPU blocking for the NuPRO 592 and the P5MMS98. 2025-03-18 19:21:00 +01:00
OBattler
79134f3b21 Assorted Cyrix (and Codegen opcode Mod R/M passing table) fixes - fixes Windows 98 SE on Cyrix 6x86's with power management enabled. 2025-03-17 03:40:52 +01:00
OBattler
dd4e493f64 Applied the fix to the optional 486 implementation as well. 2025-03-17 00:07:41 +01:00
OBattler
52a16529dc 386 Interpreter: Fix execute breakpoints. 2025-03-16 23:54:55 +01:00
OBattler
9f200fe2e8 386 Interpreter: Check for debug breakpoint before segment limit and presence checking. 2025-03-16 21:20:15 +01:00
Miran Grča
3058acff0c Merge pull request #5358 from Cacodemon345/x87-fpu-interpreter
Use `fpclassify` for FXAM instead of manual comparison
2025-03-16 18:40:23 +01:00
OBattler
1c5d432d3c Disable special segment selector pushing behavior on Pentium onwards, fixes MSVC builds of ReactOS. 2025-03-16 18:37:32 +01:00
Cacodemon345
271a125301 Use fpclassify for FXAM instead of manual comparison
NaN detection for interpreter floating point compare on ARM64
2025-03-16 23:33:40 +06:00
OBattler
aef06552fb Some missing breaks in the Cyrix register writes. 2025-03-14 15:34:37 +01:00
OBattler
78f50c5b04 Move the Cyrix 6x86 out of the Dev branch. 2025-03-06 00:17:16 +01:00
OBattler
9b47522f43 FPU: Fix newly-introduced x87-related warnings. 2025-03-06 00:12:45 +01:00
OBattler
2300339588 Included stdlib.h. 2025-03-06 00:05:16 +01:00
Cacodemon345
c40aa61be4 Cyrix 6x86: Correctly initalize ARR3 on reset to avoid some SMM problems 2025-03-06 03:05:10 +06:00
Cacodemon345
5f3641ecbd Implement Cyrix EMMI extensions and 4 FPU instructions
PADDSIW, PSUBSIW, PMULHRW (named PMULHRWC in the code as recognized by some assemblers), PMULHRIW, PDISTIB, PMACHRIW, PAVEB, PMAGW, PMVZB, PMVNZB, PMVLZB, PMVGEZB, FTSTP, FRINT2, FRINEAR, FRICHOP are implemented for Cyrix 6x86MX. Cyrix 6x86(L) only has the last 4 instructions.
2025-03-06 03:05:10 +06:00
OBattler
8c2db2892d CPU: Fix Cyrix SMM instructions. 2025-03-05 21:52:17 +01:00
Cacodemon345
23b89d88c4 Revert "x87: Fix Final Reality discolored screen for interpreter"
This reverts commit 6d3816df64.
2025-02-28 16:51:48 +06:00
Cacodemon345
6bb2b447fd Revert "x87: Fix Final Reality discolored screen for all dynarecs"
This reverts commit 03dd94f361.
2025-02-28 16:51:33 +06:00
Cacodemon345
0bb89be0ad Revert "Fix compile on ARM64"
This reverts commit c7153916eb.
2025-02-28 16:51:13 +06:00
Cacodemon345
c7153916eb Fix compile on ARM64 2025-02-27 14:40:54 +06:00
Cacodemon345
03dd94f361 x87: Fix Final Reality discolored screen for all dynarecs 2025-02-27 13:50:45 +06:00
Cacodemon345
6d3816df64 x87: Fix Final Reality discolored screen for interpreter 2025-02-27 01:03:00 +06:00
pankozaC++
6362351987 bring back the Slot 1 to Socket 8 adapter 2025-02-13 19:14:36 +01:00
OBattler
63fbe6ab4f Documented three more functions. 2025-02-13 05:27:10 +01:00
OBattler
91ba20fbd0 Added the test mode entry point requested by gloriouscow. 2025-02-13 05:10:55 +01:00
OBattler
03c74f8bb6 Fix the AC flag on 8-bit and 16-bit ADC and SBB instructions. 2025-02-08 16:10:26 +01:00
OBattler
34e3f6e849 No longer list Socket 8 CPU's for Slot 1 machines, closes #5196. 2025-02-07 23:34:12 +01:00
Jasmine Iwanek
5f273265ae Assorted warning fixes 2025-02-02 03:24:50 -05:00
OBattler
40fd79aeb9 FPU: Properly implement INT 10h FPU exception, fixes #5162. 2025-01-19 09:06:39 +01:00
OBattler
a94a5bb0b5 Improved the Linux new dynamic recompiler freeze workaround per patch by Dax. 2025-01-16 05:48:37 +01:00
OBattler
fbafb7507b Dynamic recompiler: Only disable inline if not on Windows or MacOS. 2025-01-16 01:14:23 +01:00
greblosdier
2f5940fee3 Update 386_dynarec.c
Changed exec386_dynarec_dyn from inline to noinline to resolve NEW_DYNAREC build issue on Linux x86_64.
2025-01-15 12:57:51 -08:00
OBattler
ec175738ee FIX timings of SYSCALL/SYSRET/SYSENTER/SYSEXIT/FXSAVE/FXSTOR. 2025-01-13 05:38:10 +01:00
OBattler
b1f94abc27 Fixed the fix. 2025-01-13 05:01:00 +01:00
OBattler
123ff3b5e7 Fix NEC Vx0 INS*/OUS* timings calculation. 2025-01-13 04:35:23 +01:00
Adrian Siekierka
eb25bccf1e Add initial Mazovia 1016 emulation 2024-12-22 13:52:25 +01:00