Cyrix 6x86: Correctly initalize ARR3 on reset to avoid some SMM problems

2025-03-06 02:09:23 +06:00
parent 5f3641ecbd
commit c40aa61be4
1 changed files with 2 additions and 0 deletions
--- a/src/cpu/x86.c
+++ b/src/cpu/x86.c
@@ -275,6 +275,8 @@ reset_common(int hard)

    ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = ccr7 = 0;
    ccr4 = 0x85;
+    cyrix.arr[3].base = 0x30000;
+    cyrix.arr[3].size = 65536;

    if (hascache)
        cr0 = 1 << 30;