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e11b5535e1896927abd3cdd8bf06af94ae2b786e
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42 Commits

Author SHA1 Message Date
OBattler
88934ab0ca IDE fixes and finished the SiS 5511. 2023-10-20 02:57:50 +02:00
OBattler
29c153d287 Reverted Cacodemon345's broken USB OHCI implementation, fixes #3597. 2023-08-18 23:16:54 +02:00
OBattler
c30d5d90b7 PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable. 2023-08-07 03:04:52 +02:00
Jasmine Iwanek
998cfe5cc8 Constification 2023-07-25 17:59:24 -04:00
Jasmine Iwanek
922c4335ae Next round of sonarlint cleanups 2023-06-27 21:17:13 -04:00
Jasmine Iwanek
21adfd4d50 Next round of sonarlint cleanups 2023-06-26 18:28:13 -04:00
Jasmine Iwanek
6c1e4a8e2c Some code smell fixes from sonarlint 2023-05-15 19:25:56 -04:00
OBattler
ecb8091d41 Fixed Cacodemon345's OHCI mess and implemented proper OHCI IRQ updating, fixes the Gigabyte GA-5AX POST. 2023-05-07 02:53:04 +02:00
Cacodemon345
d6ff34208c usb: Hook up USB interrupts to rest of the chipsets 2023-05-06 15:36:44 +06:00
Jasmine Iwanek
bd75bc141a Header cleanups 
Tabs to spaces
Consistency
 2022-11-13 21:15:47 -05:00
Jasmine Iwanek
3753a9f8b2 clang-format in src/chipset/ 2022-09-18 17:19:21 -04:00
Jasmine Iwanek
a52f0cca79 src/chipset 2022-03-13 09:21:08 -04:00
Jasmine Iwanek
4674756664 More newline and whitespace cleanups 2022-02-20 16:26:40 -05:00
Jess Lovelace
f18615ae87 refactored device_t and all declarations 2022-02-02 16:31:22 -05:00
OBattler
f0e84f7f13 More fixes, fixes CMOS Setup on the Acrosses AR-B4179. 2021-08-09 16:10:55 +02:00
OBattler
3074d5b845 Cleaned up excess header includes from the chipset files and the ALI M1487/1489 is now correctly implemented (still Dev branched as I have not committed the machine files yet). 2021-03-24 20:03:20 +01:00
RichardG867
1e80ac1d15 Miscellaneous STPC changes 2020-11-23 14:49:13 -03:00
OBattler
0faf6692c9 WARNING: CONFIGS MIGHT PARTIALLY BREAK WHERE DEVICE NAMES HAVE CHANGED. 
Changes to device_t struct to accomodate the upcoming PCI IRQ arbitration rewrite;
Added device.c/h API to obtain name from the device_t struct;
Significant changes to win/win_settings.c to clean up the code a bit and fix bugs;
Ported all the CPU and AudioPCI commits from PCem;
Added an API call to allow ACPI soft power off to gracefully stop the emulator;
Removed the Siemens PCD-2L from the Dev branch because it now works;
Removed the Socket 5 HP Vectra from the Dev branch because it now works;
Fixed the Compaq Presario and the Micronics Spitfire;
Give the IBM PC330 its own list of 486 CPU so it can have DX2's with CPUID 0x470;
SMM fixes;
Rewrote the SYSENTER, SYSEXIT, SYSCALL, and SYSRET instructions;
Changed IDE reset period to match the specification, fixes #929;
The keyboard input and output ports are now forced in front of the queue when read, fixes a number of bugs, including the AMI Apollo hanging on soft reset;
Added the Intel AN430TX but Dev branched because it does not work;
The network code no longer drops packets if the emulated network card has failed to receive them (eg. when the buffer is full);
Changes to PCI card adding and renamed some PCI slot types, also added proper AGP bridge slot types;
USB UHCI emulation is no longer a stub (still doesn't fully work, but at least Windows XP chk with Debug no longer ASSERT's on it);
Fixed NVR on the the SMC FDC37C932QF and APM variants;
A number of fixes to Intel 4x0 chipsets, including fixing every register of the 440LX and 440EX;
Some ACPI changes.
 2020-11-16 00:01:21 +01:00
OBattler
6c72d834ef Fixed PIC ELCR priv pointers for the STPC and VIA VT82C49x. 2020-10-18 15:34:52 +02:00
OBattler
795a6017d2 PIC rewrite, proper SMRAM API, complete SiS 471 rewrite and addition of 40x, 460, and 461, changes to mem.c/h, disabled Voodoo memory dumping on exit, bumped SDL Hardware scale quality to 2, bumped IDE/ATAPI drives to ATA-6, finally bumped emulator version to 3.0, redid the bus type ID's to allow for planned ATAPI hard disks, made SST flash set its high mappings to the correct address if the CPU is 16-bit, and added the SiS 401 AMI 486 Clone, AOpen Vi15G, and the Soyo 4SA2 (486 with SiS 496/497 that can boot from CD-ROM), assorted 286+ protected mode fixes (for slightly more accuracy), and fixes to 808x emulation (MS Word 1.0 and 1.10 for DOS now work correctly from floppy). 2020-10-14 23:15:01 +02:00
RichardG867
777a6d02e0 Indentation cleanups on STPC 2020-09-08 21:44:10 -03:00
RichardG867
a4cf2c7859 Fix STPC serial unlocking behavior, add some more comments to the code 2020-07-20 15:24:51 -03:00
RichardG867
31ca983604 Fix STPC UART port check 2020-07-20 15:07:54 -03:00
RichardG867
a1e273b13b STPC serial and parallel support 2020-07-14 22:24:22 -03:00
OBattler
3c0f4491a8 Fixed STPC Client IDE PCI Vendor ID. 2020-07-11 01:42:26 +02:00
OBattler
e0ea2b1f69 Fixed the STPC chipset PCI Vendor and Device ID's. 2020-07-11 00:56:45 +02:00
OBattler
0d2e69142d Fixed an IDE log line and fixed a bug in the implementation of the STPC chipsets caused by an erratum in the STPC Atlas programming manual (corrected in the other STPC chipsets' programming manuals). 2020-07-11 00:42:38 +02:00
OBattler
7ebe8f5018 Vastly improved the STPC PCI IDE controller emulation. 2020-07-10 04:23:10 +02:00
OBattler
f0633753fc Fixed STPC PCI IRQ steering again. 2020-07-10 03:14:15 +02:00
OBattler
fec5160bf4 Fixed STPC PCI IRQ steering and silenced the massive Voodoo warning. 2020-07-10 03:10:07 +02:00
OBattler
72c1c36ec6 OPTi 5x7 no longer does excess logging, running of timers on the recompiler is now done on every fourth AT KBC port 61h read instead of every 3F4h read, added some safety precautions to io.c to handle the cases where a handler removes itself, implmented the STPC ELCR and refresh control, and fixed the messed up register reading in the PC87307 and PC87309 implementations. 2020-07-10 02:05:49 +02:00
RichardG867
37c5edacd0 STPC: Implement bus master IDE 2020-07-09 16:50:19 -03:00
RichardG867
5304db348f STPC: disable PCI IRQs on reset 2020-07-08 18:25:35 -03:00
RichardG867
4ab5e7c5af STPC: implement PCI IRQ steering, leave blank space for ELCR registers 2020-07-08 18:21:06 -03:00
RichardG867
07fba1ce11 STPC: change hex values to upper case 2020-07-08 17:54:05 -03:00
RichardG867
a1f267da72 Fix PCI IDs again 2020-07-07 17:07:08 -03:00
RichardG867
d8e3e44f59 Fix STPC PCI IDs again 2020-07-07 17:00:40 -03:00
RichardG867
5e18163b2e Fix STPC CPU identification 
Let port 22h/23h registers >= 0xc0 fall through to the Cyrix port 22h/23h code in cpu.c
 2020-07-07 15:38:34 -03:00
RichardG867
5b0e29d0ff STPC improvements 2020-07-07 13:25:17 -03:00
RichardG867
710796a180 Add ITOX STAR, a STPC Client machine with hardware monitoring and AMIBIOS 6 2020-07-06 21:12:09 -03:00
RichardG867
1ed6143f02 Implement STPC IDE 
Note that only the AR-B1479 has two IDE channels available on the board.
 2020-07-06 20:24:24 -03:00
RichardG867
11114c97d2 Initial implementation of STPC chipsets and machines 2020-07-06 18:45:34 -03:00