Reworked the Intel-based machines a little bit.

This commit is contained in:
waltje
2019-05-28 22:01:05 -05:00
parent 5a921a1885
commit 108f30d77a
14 changed files with 171 additions and 246 deletions

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@@ -1,166 +0,0 @@
/*
* VARCem Virtual ARchaeological Computer EMulator.
* An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the VARCem Project.
*
* Implementation of Intel mainboards.
*
* Version: @(#)intel.c 1.0.13 2019/05/17
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
*
* Copyright 2017-2019 Fred N. van Kempen.
* Copyright 2016-2018 Miran Grca.
* Copyright 2008-2018 Sarah Walker.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include "../../emu.h"
#include "../../timer.h"
#include "../../cpu/cpu.h"
#include "../../io.h"
#include "../../mem.h"
#include "../../device.h"
#include "../../plat.h"
#include "intel.h"
#include "clk.h"
typedef struct {
uint16_t timer_latch;
tmrval_t timer;
} batman_t;
static uint8_t
config_read(uint16_t port, priv_t priv)
{
// batman_t *dev = (batman_t *)priv;
uint8_t ret = 0x00;
switch (port & 0x000f) {
case 3:
ret = 0xff;
break;
case 5:
ret = 0xdf;
break;
}
return(ret);
}
static void
timer_over(priv_t priv)
{
batman_t *dev = (batman_t *)priv;
dev->timer = 0;
}
static void
timer_write(uint16_t addr, uint8_t val, priv_t priv)
{
batman_t *dev = (batman_t *)priv;
if (addr & 1)
dev->timer_latch = (dev->timer_latch & 0xff) | (val << 8);
else
dev->timer_latch = (dev->timer_latch & 0xff00) | val;
dev->timer = dev->timer_latch * TIMER_USEC;
}
static uint8_t
timer_read(uint16_t addr, priv_t priv)
{
batman_t *dev = (batman_t *)priv;
uint16_t latch;
uint8_t ret;
cycles -= (int)PITCONST;
timer_clock();
if (dev->timer < 0)
return 0;
latch = (uint16_t)(dev->timer / TIMER_USEC);
if (addr & 1)
ret = latch >> 8;
else
ret = latch & 0xff;
return(ret);
}
static void
batman_close(priv_t priv)
{
batman_t *dev = (batman_t *)priv;
free(dev);
}
static priv_t
batman_init(const device_t *info, UNUSED(void *parent))
{
batman_t *dev;
dev = (batman_t *)mem_alloc(sizeof(batman_t));
memset(dev, 0x00, sizeof(batman_t));
io_sethandler(0x0073, 1,
config_read,NULL,NULL, NULL,NULL,NULL, dev);
io_sethandler(0x0075, 1,
config_read,NULL,NULL, NULL,NULL,NULL, dev);
io_sethandler(0x0078, 2,
timer_read,NULL,NULL, timer_write,NULL,NULL, dev);
timer_add(timer_over, dev, &dev->timer, &dev->timer);
return((priv_t)dev);
}
const device_t intel_batman_device = {
"Intel Batman board chip",
0, 0, NULL,
batman_init, batman_close, NULL,
NULL, NULL, NULL, NULL,
NULL
};

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@@ -1,46 +0,0 @@
/*
* VARCem Virtual ARchaeological Computer EMulator.
* An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the VARCem Project.
*
* Definitions for the Intel mainboard handlers.
*
* Version: @(#)intel.h 1.0.2 2018/11/08
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
* Sarah Walker, <tommowalker@tommowalker.co.uk>
*
* Copyright 2017,2018 Fred N. van Kempen.
* Copyright 2016-2018 Miran Grca.
* Copyright 2008-2018 Sarah Walker.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#ifndef DEVICES_INTEL_H
# define DEVICES_INTEL_H
extern const device_t intel_batman_device;
#endif /*DEVICES_INTEL_H*/

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@@ -6,9 +6,9 @@
*
* This file is part of the VARCem Project.
*
* Emulation of Intel System I/O PCI chip.
* Emulation of Intel 82378IB System I/O Bridge chip.
*
* Version: @(#)intel_sio.c 1.0.8 2019/05/15
* Version: @(#)intel_sio.c 1.0.9 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 430xx-based Acer machines.
*
* Version: @(#)m_acer.c 1.0.5 2019/05/17
* Version: @(#)m_acer.c 1.0.6 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -50,7 +50,6 @@
#include "../devices/chipsets/intel4x0.h"
#include "../devices/system/pci.h"
#include "../devices/system/memregs.h"
#include "../devices/system/intel.h"
#include "../devices/system/intel_flash.h"
#include "../devices/system/intel_sio.h"
#include "../devices/system/intel_piix.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of various A/Open mainboards.
*
* Version: @(#)m_aopen.c 1.0.3 2019/05/17
* Version: @(#)m_aopen.c 1.0.4 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -49,7 +49,6 @@
#include "../devices/chipsets/intel4x0.h"
#include "../devices/system/pci.h"
#include "../devices/system/memregs.h"
#include "../devices/system/intel.h"
#include "../devices/system/intel_flash.h"
#include "../devices/system/intel_sio.h"
#include "../devices/system/intel_piix.h"

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@@ -8,7 +8,7 @@
*
* Implementation of several ASUS mainboards.
*
* Version: @(#)m_asus.c 1.0.3 2019/05/17
* Version: @(#)m_asus.c 1.0.4 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -49,7 +49,6 @@
#include "../devices/chipsets/intel4x0.h"
#include "../devices/system/pci.h"
#include "../devices/system/memregs.h"
#include "../devices/system/intel.h"
#include "../devices/system/intel_flash.h"
#include "../devices/system/intel_sio.h"
#include "../devices/system/intel_piix.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 430/440-based machines.
*
* Version: @(#)m_intel4x0.c 1.0.9 2019/05/17
* Version: @(#)m_intel4x0.c 1.0.10 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -39,18 +39,20 @@
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include "../emu.h"
#include "../config.h"
#include "../timer.h"
#include "../cpu/cpu.h"
#include "../io.h"
#include "../mem.h"
#include "../rom.h"
#include "../device.h"
#include "../devices/chipsets/intel4x0.h"
#include "../devices/system/clk.h"
#include "../devices/system/pci.h"
#include "../devices/system/memregs.h"
#include "../devices/system/intel.h"
#include "../devices/system/intel_flash.h"
#include "../devices/system/intel_sio.h"
#include "../devices/system/intel_piix.h"
@@ -58,12 +60,141 @@
#include "../devices/sio/sio.h"
#include "../devices/disk/hdc.h"
#include "../devices/video/video.h"
#include "../plat.h"
#include "machine.h"
typedef struct {
uint8_t port73, /* board config reg, also 0x78 */
port75; /* board config reg, also 0x79 */
uint16_t timer_latch;
tmrval_t timer;
} batman_t;
static uint8_t
config_read(uint16_t port, priv_t priv)
{
batman_t *dev = (batman_t *)priv;
uint8_t ret = 0x00;
switch (port) {
case 0x0073: /* board configuration register */
ret = dev->port73;
break;
case 0x0075: /* board configuration register */
ret = dev->port75;
break;
}
return(ret);
}
static void
timer_over(priv_t priv)
{
batman_t *dev = (batman_t *)priv;
dev->timer = 0;
}
static void
timer_write(uint16_t port, uint8_t val, priv_t priv)
{
batman_t *dev = (batman_t *)priv;
if (port & 1)
dev->timer_latch = (dev->timer_latch & 0xff) | (val << 8);
else
dev->timer_latch = (dev->timer_latch & 0xff00) | val;
dev->timer = dev->timer_latch * TIMER_USEC;
}
static uint8_t
timer_read(uint16_t port, priv_t priv)
{
batman_t *dev = (batman_t *)priv;
uint16_t latch;
uint8_t ret;
cycles -= (int)PITCONST;
timer_clock();
if (dev->timer < 0)
return 0;
latch = (uint16_t)(dev->timer / TIMER_USEC);
if (port & 1)
ret = latch >> 8;
else
ret = latch & 0xff;
return(ret);
}
static void
batman_close(priv_t priv)
{
batman_t *dev = (batman_t *)priv;
free(dev);
}
static priv_t
batman_init(const device_t *info, UNUSED(void *parent))
{
batman_t *dev;
dev = (batman_t *)mem_alloc(sizeof(batman_t));
memset(dev, 0x00, sizeof(batman_t));
io_sethandler(0x0073, 1,
config_read,NULL,NULL, NULL,NULL,NULL, dev);
io_sethandler(0x0075, 1,
config_read,NULL,NULL, NULL,NULL,NULL, dev);
io_sethandler(0x0078, 2,
timer_read,NULL,NULL, timer_write,NULL,NULL, dev);
timer_add(timer_over, dev, &dev->timer, &dev->timer);
return((priv_t)dev);
}
static const device_t batman_device = {
"Intel Batman support",
0, 0, NULL,
batman_init, batman_close, NULL,
NULL, NULL, NULL, NULL,
NULL
};
static void
premiere_init(int nx)
{
batman_t *dev;
/* Create the board registers. */
dev = (batman_t *)device_add(&batman_device);
/* Add configuration bits for port 75. */
dev->port73 = 0xff; /* 1111 1111, probably wrong */
dev->port75 = 0xc0; /* 1100 0000, " */
if (machine_get_config_int("setup_disable"))
dev->port75 |= 0x20; /* "disable Setup" */
pci_init(PCI_CONFIG_TYPE_2);
pci_register_slot(0x00, PCI_CARD_SPECIAL, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SPECIAL, 0, 0, 0, 0);
@@ -72,16 +203,14 @@ premiere_init(int nx)
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 3, 2, 4);
pci_register_slot(0x02, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&memregs_device);
if (nx)
device_add(&i430nx_device);
else
device_add(&i430lx_device);
device_add(&sio_device);
device_add(&intel_batman_device);
device_add(&intel_flash_bxt_ami_device);
device_add(&memregs_device);
m_at_common_init();
@@ -123,12 +252,13 @@ common_init(const device_t *info, void *arg)
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&memregs_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add(&intel_flash_bxt_ami_device);
device_add(&memregs_device);
m_at_common_init();
device_add(&keyboard_ps2_ami_pci_device);
device_add(&pc87306_device);
@@ -147,12 +277,13 @@ common_init(const device_t *info, void *arg)
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&memregs_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add(&intel_flash_bxt_ami_device);
device_add(&memregs_device);
m_at_common_init();
device_add(&keyboard_ps2_ami_pci_device);
device_add(&pc87306_device);
break;
@@ -169,12 +300,13 @@ common_init(const device_t *info, void *arg)
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x07, PCI_CARD_SPECIAL, 0, 0, 0, 0);
device_add(&memregs_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add(&intel_flash_bxt_ami_device);
device_add(&memregs_device);
m_at_common_init();
device_add(&keyboard_ps2_ami_pci_device);
device_add(&pc87306_device);
break;
@@ -184,6 +316,16 @@ common_init(const device_t *info, void *arg)
}
static const device_config_t batman_config[] = {
{
"setup_disable", "Disable SETUP", CONFIG_BINARY, "", 0
},
{
NULL
}
};
static const machine_t revenge_info = {
MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,
0,
@@ -199,7 +341,7 @@ const device_t m_batman = {
common_init, NULL, NULL,
NULL, NULL, NULL,
&revenge_info,
NULL
batman_config
};
@@ -218,7 +360,7 @@ const device_t m_plato = {
common_init, NULL, NULL,
NULL, NULL, NULL,
&plato_info,
NULL
batman_config
};

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@@ -8,7 +8,7 @@
*
* Implementation of various systems and mainboards.
*
* Version: @(#)m_misc.c 1.0.3 2019/05/17
* Version: @(#)m_misc.c 1.0.4 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -49,7 +49,6 @@
#include "../devices/chipsets/intel4x0.h"
#include "../devices/system/pci.h"
#include "../devices/system/memregs.h"
#include "../devices/system/intel.h"
#include "../devices/system/intel_flash.h"
#include "../devices/system/intel_sio.h"
#include "../devices/system/intel_piix.h"

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@@ -15,7 +15,7 @@
* _MUST_ enable the Internal mouse, or the PS/2 mouse as
* this is onboard. There is a jumper for this as well.
*
* Version: @(#)m_pbell.c 1.0.5 2019/05/17
* Version: @(#)m_pbell.c 1.0.6 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -57,7 +57,6 @@
#include "../devices/chipsets/intel4x0.h"
#include "../devices/system/pci.h"
#include "../devices/system/memregs.h"
#include "../devices/system/intel.h"
#include "../devices/system/intel_flash.h"
#include "../devices/system/intel_sio.h"
#include "../devices/system/intel_piix.h"

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@@ -8,7 +8,7 @@
*
* Implementation of the SiS 85C496/497 based machines.
*
* Version: @(#)m_sis49x.c 1.0.13 2019/05/17
* Version: @(#)m_sis49x.c 1.0.14 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -103,7 +103,7 @@ common_init(const device_t *info, void *arg)
device_add(&memregs_eb_device);
m_at_common_init();
device_add(&keyboard_ps2_pci_device);
device_add(&ide_pci_device);
device_add(&ide_pci_2ch_device);
device_add(&fdc37c665_device);
}

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@@ -27,7 +27,7 @@
* As stated above, it is hoped that by re-adding these, more
* testing will get done so they can be 'completed' sometime.
*
* Version: @(#)m_tyan.c 1.0.3 2019/05/17
* Version: @(#)m_tyan.c 1.0.4 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -68,7 +68,6 @@
#include "../devices/chipsets/intel4x0.h"
#include "../devices/system/pci.h"
#include "../devices/system/memregs.h"
#include "../devices/system/intel.h"
#include "../devices/system/intel_flash.h"
#include "../devices/system/intel_sio.h"
#include "../devices/system/intel_piix.h"

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@@ -8,7 +8,7 @@
#
# Makefile for Windows systems using the MinGW32 environment.
#
# Version: @(#)Makefile.mingw 1.0.89 2019/05/20
# Version: @(#)Makefile.mingw 1.0.90 2019/05/28
#
# Author: Fred N. van Kempen, <decwiz@yahoo.com>
#
@@ -754,7 +754,7 @@ DEVOBJ := bugger.o \
sio_acc3221.o sio_fdc37c66x.o sio_fdc37c669.o \
sio_fdc37c93x.o sio_pc87306.o sio_w83877f.o \
sio_um8669f.o \
intel.o intel_flash.o intel_sio.o intel_piix.o \
intel_flash.o intel_sio.o intel_piix.o \
keyboard.o \
keyboard_xt.o keyboard_at.o \
mouse.o \

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@@ -8,7 +8,7 @@
#
# Makefile for Windows using Visual Studio 2015.
#
# Version: @(#)Makefile.VC 1.0.73 2019/05/20
# Version: @(#)Makefile.VC 1.0.74 2019/05/28
#
# Author: Fred N. van Kempen, <decwiz@yahoo.com>
#
@@ -664,7 +664,7 @@ DEVOBJ := bugger.obj \
sio_acc3221.obj sio_fdc37c66x.obj sio_fdc37c669.obj \
sio_fdc37c93x.obj sio_pc87306.obj sio_w83877f.obj \
sio_um8669f.obj \
intel.obj intel_flash.obj intel_sio.obj intel_piix.obj \
intel_flash.obj intel_sio.obj intel_piix.obj \
keyboard.obj \
keyboard_xt.obj keyboard_at.obj \
mouse.obj \

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@@ -8,7 +8,7 @@
*
* Implementation of the Settings dialog.
*
* Version: @(#)win_settings_disk.h 1.0.19 2019/03/21
* Version: @(#)win_settings_disk.h 1.0.20 2019/05/28
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -1125,6 +1125,7 @@ hd_add_ok_common:
return TRUE;
case IDC_CFILE:
memset(temp_path, 0x00, sizeof(temp_path));
memset(hd_file_name, 0x00, sizeof(hd_file_name));
b = (existing&1)?DLG_FILE_LOAD:DLG_FILE_SAVE;
if (! dlg_file_ex(hdlg, get_string(IDS_3536), NULL, temp_path, b)) {