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amd-gpu: ringbuffer polling/timestamp buffer alignment fix

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According to Qualcomm it can be at a 4-byte boundary, but for using MMU
it needs to be at a page boundary
This commit is contained in:
Matt Sealey
2012-12-10 18:48:24 -06:00
parent 5395604743
commit fbbe86a046
1 changed files with 1 additions and 1 deletions
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2
drivers/mxc/amd-gpu/gsl_ringbuffer.c
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@@ -689,7 +689,7 @@ kgsl_ringbuffer_init(gsl_device_t *device)
}
// allocate memory for polling and timestamps
flags = (GSL_MEMFLAGS_ALIGN32 | GSL_MEMFLAGS_CONPHYS);
flags = (GSL_MEMFLAGS_ALIGNPAGE | GSL_MEMFLAGS_CONPHYS);
KGSL_DEBUG(GSL_DBGFLAGS_DUMPX, flags = GSL_MEMFLAGS_ALIGN32);
status = kgsl_sharedmem_alloc0(device->id, flags, sizeof(gsl_rbmemptrs_t), &rb->memptrs_desc);