ENGR00117739-2 i.MX28 EVK watchdog support

Add platform resource support

Signed-off-by: Fred.fan <r01011@freescale.com>
This commit is contained in:
Fred Fan
2010-01-26 17:38:52 +08:00
committed by Matt Sealey
parent f79bf9e443
commit 8aaa180642
4 changed files with 333 additions and 58 deletions

View File

@@ -360,12 +360,36 @@ static void mx28_init_mmc(void)
}
#endif
#if defined(CONFIG_MXS_WATCHDOG) || defined(CONFIG_MXS_WATCHDOG_MODULE)
static struct resource mx28_wdt_res = {
.flags = IORESOURCE_MEM,
.start = RTC_PHYS_ADDR,
.end = RTC_PHYS_ADDR + 0x2000 - 1,
};
static void __init mx28_init_wdt(void)
{
struct platform_device *pdev;
pdev = mxs_get_device("mxs-wdt", 0);
if (pdev == NULL || IS_ERR(pdev))
return;
pdev->resource = &mx28_wdt_res;
pdev->num_resources = 1;
mxs_add_device(pdev, 3);
}
#else
static void __init mx28_init_wdt(void)
{
;
}
#endif
int __init mx28_device_init(void)
{
mx28_init_dma();
mx28_init_duart();
mx28_init_mmc();
mx28_init_wdt();
return 0;
}

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@@ -0,0 +1,226 @@
/*
* Freescale RTC Register Definitions
*
* Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* This file is created by xml file. Don't Edit it.
*
* Xml Revision: 1.75
* Template revision: 26195
*/
#ifndef __ARCH_ARM___RTC_H
#define __ARCH_ARM___RTC_H
#define HW_RTC_CTRL (0x00000000)
#define HW_RTC_CTRL_SET (0x00000004)
#define HW_RTC_CTRL_CLR (0x00000008)
#define HW_RTC_CTRL_TOG (0x0000000c)
#define BM_RTC_CTRL_SFTRST 0x80000000
#define BM_RTC_CTRL_CLKGATE 0x40000000
#define BP_RTC_CTRL_RSVD0 7
#define BM_RTC_CTRL_RSVD0 0x3FFFFF80
#define BF_RTC_CTRL_RSVD0(v) \
(((v) << 7) & BM_RTC_CTRL_RSVD0)
#define BM_RTC_CTRL_SUPPRESS_COPY2ANALOG 0x00000040
#define BM_RTC_CTRL_FORCE_UPDATE 0x00000020
#define BM_RTC_CTRL_WATCHDOGEN 0x00000010
#define BM_RTC_CTRL_ONEMSEC_IRQ 0x00000008
#define BM_RTC_CTRL_ALARM_IRQ 0x00000004
#define BM_RTC_CTRL_ONEMSEC_IRQ_EN 0x00000002
#define BM_RTC_CTRL_ALARM_IRQ_EN 0x00000001
#define HW_RTC_STAT (0x00000010)
#define HW_RTC_STAT_SET (0x00000014)
#define HW_RTC_STAT_CLR (0x00000018)
#define HW_RTC_STAT_TOG (0x0000001c)
#define BM_RTC_STAT_RTC_PRESENT 0x80000000
#define BM_RTC_STAT_ALARM_PRESENT 0x40000000
#define BM_RTC_STAT_WATCHDOG_PRESENT 0x20000000
#define BM_RTC_STAT_XTAL32000_PRESENT 0x10000000
#define BM_RTC_STAT_XTAL32768_PRESENT 0x08000000
#define BP_RTC_STAT_RSVD1 24
#define BM_RTC_STAT_RSVD1 0x07000000
#define BF_RTC_STAT_RSVD1(v) \
(((v) << 24) & BM_RTC_STAT_RSVD1)
#define BP_RTC_STAT_STALE_REGS 16
#define BM_RTC_STAT_STALE_REGS 0x00FF0000
#define BF_RTC_STAT_STALE_REGS(v) \
(((v) << 16) & BM_RTC_STAT_STALE_REGS)
#define BP_RTC_STAT_NEW_REGS 8
#define BM_RTC_STAT_NEW_REGS 0x0000FF00
#define BF_RTC_STAT_NEW_REGS(v) \
(((v) << 8) & BM_RTC_STAT_NEW_REGS)
#define BP_RTC_STAT_RSVD0 0
#define BM_RTC_STAT_RSVD0 0x000000FF
#define BF_RTC_STAT_RSVD0(v) \
(((v) << 0) & BM_RTC_STAT_RSVD0)
#define HW_RTC_MILLISECONDS (0x00000020)
#define HW_RTC_MILLISECONDS_SET (0x00000024)
#define HW_RTC_MILLISECONDS_CLR (0x00000028)
#define HW_RTC_MILLISECONDS_TOG (0x0000002c)
#define BP_RTC_MILLISECONDS_COUNT 0
#define BM_RTC_MILLISECONDS_COUNT 0xFFFFFFFF
#define BF_RTC_MILLISECONDS_COUNT(v) (v)
#define HW_RTC_SECONDS (0x00000030)
#define HW_RTC_SECONDS_SET (0x00000034)
#define HW_RTC_SECONDS_CLR (0x00000038)
#define HW_RTC_SECONDS_TOG (0x0000003c)
#define BP_RTC_SECONDS_COUNT 0
#define BM_RTC_SECONDS_COUNT 0xFFFFFFFF
#define BF_RTC_SECONDS_COUNT(v) (v)
#define HW_RTC_ALARM (0x00000040)
#define HW_RTC_ALARM_SET (0x00000044)
#define HW_RTC_ALARM_CLR (0x00000048)
#define HW_RTC_ALARM_TOG (0x0000004c)
#define BP_RTC_ALARM_VALUE 0
#define BM_RTC_ALARM_VALUE 0xFFFFFFFF
#define BF_RTC_ALARM_VALUE(v) (v)
#define HW_RTC_WATCHDOG (0x00000050)
#define HW_RTC_WATCHDOG_SET (0x00000054)
#define HW_RTC_WATCHDOG_CLR (0x00000058)
#define HW_RTC_WATCHDOG_TOG (0x0000005c)
#define BP_RTC_WATCHDOG_COUNT 0
#define BM_RTC_WATCHDOG_COUNT 0xFFFFFFFF
#define BF_RTC_WATCHDOG_COUNT(v) (v)
#define HW_RTC_PERSISTENT0 (0x00000060)
#define HW_RTC_PERSISTENT0_SET (0x00000064)
#define HW_RTC_PERSISTENT0_CLR (0x00000068)
#define HW_RTC_PERSISTENT0_TOG (0x0000006c)
#define BP_RTC_PERSISTENT0_ADJ_POSLIMITBUCK 28
#define BM_RTC_PERSISTENT0_ADJ_POSLIMITBUCK 0xF0000000
#define BF_RTC_PERSISTENT0_ADJ_POSLIMITBUCK(v) \
(((v) << 28) & BM_RTC_PERSISTENT0_ADJ_POSLIMITBUCK)
#define BP_RTC_PERSISTENT0_SPARE_ANALOG 22
#define BM_RTC_PERSISTENT0_SPARE_ANALOG 0x0FC00000
#define BF_RTC_PERSISTENT0_SPARE_ANALOG(v) \
(((v) << 22) & BM_RTC_PERSISTENT0_SPARE_ANALOG)
#define BM_RTC_PERSISTENT0_EXTERNAL_RESET 0x00200000
#define BM_RTC_PERSISTENT0_THERMAL_RESET 0x00100000
#define BM_RTC_PERSISTENT0_RELEASE_GND 0x00080000
#define BM_RTC_PERSISTENT0_ENABLE_LRADC_PWRUP 0x00040000
#define BM_RTC_PERSISTENT0_AUTO_RESTART 0x00020000
#define BM_RTC_PERSISTENT0_DISABLE_PSWITCH 0x00010000
#define BP_RTC_PERSISTENT0_LOWERBIAS 14
#define BM_RTC_PERSISTENT0_LOWERBIAS 0x0000C000
#define BF_RTC_PERSISTENT0_LOWERBIAS(v) \
(((v) << 14) & BM_RTC_PERSISTENT0_LOWERBIAS)
#define BM_RTC_PERSISTENT0_DISABLE_XTALOK 0x00002000
#define BP_RTC_PERSISTENT0_MSEC_RES 8
#define BM_RTC_PERSISTENT0_MSEC_RES 0x00001F00
#define BF_RTC_PERSISTENT0_MSEC_RES(v) \
(((v) << 8) & BM_RTC_PERSISTENT0_MSEC_RES)
#define BM_RTC_PERSISTENT0_ALARM_WAKE 0x00000080
#define BM_RTC_PERSISTENT0_XTAL32_FREQ 0x00000040
#define BM_RTC_PERSISTENT0_XTAL32KHZ_PWRUP 0x00000020
#define BM_RTC_PERSISTENT0_XTAL24MHZ_PWRUP 0x00000010
#define BM_RTC_PERSISTENT0_LCK_SECS 0x00000008
#define BM_RTC_PERSISTENT0_ALARM_EN 0x00000004
#define BM_RTC_PERSISTENT0_ALARM_WAKE_EN 0x00000002
#define BM_RTC_PERSISTENT0_CLOCKSOURCE 0x00000001
#define HW_RTC_PERSISTENT1 (0x00000070)
#define HW_RTC_PERSISTENT1_SET (0x00000074)
#define HW_RTC_PERSISTENT1_CLR (0x00000078)
#define HW_RTC_PERSISTENT1_TOG (0x0000007c)
#define BP_RTC_PERSISTENT1_GENERAL 0
#define BM_RTC_PERSISTENT1_GENERAL 0xFFFFFFFF
#define BF_RTC_PERSISTENT1_GENERAL(v) (v)
#define BV_RTC_PERSISTENT1_GENERAL__ENUMERATE_500MA_TWICE 0x1000
#define BV_RTC_PERSISTENT1_GENERAL__USB_BOOT_PLAYER_MODE 0x0800
#define BV_RTC_PERSISTENT1_GENERAL__SKIP_CHECKDISK 0x0400
#define BV_RTC_PERSISTENT1_GENERAL__USB_LOW_POWER_MODE 0x0200
#define BV_RTC_PERSISTENT1_GENERAL__OTG_HNP_BIT 0x0100
#define BV_RTC_PERSISTENT1_GENERAL__OTG_ATL_ROLE_BIT 0x0080
#define HW_RTC_PERSISTENT2 (0x00000080)
#define HW_RTC_PERSISTENT2_SET (0x00000084)
#define HW_RTC_PERSISTENT2_CLR (0x00000088)
#define HW_RTC_PERSISTENT2_TOG (0x0000008c)
#define BP_RTC_PERSISTENT2_GENERAL 0
#define BM_RTC_PERSISTENT2_GENERAL 0xFFFFFFFF
#define BF_RTC_PERSISTENT2_GENERAL(v) (v)
#define HW_RTC_PERSISTENT3 (0x00000090)
#define HW_RTC_PERSISTENT3_SET (0x00000094)
#define HW_RTC_PERSISTENT3_CLR (0x00000098)
#define HW_RTC_PERSISTENT3_TOG (0x0000009c)
#define BP_RTC_PERSISTENT3_GENERAL 0
#define BM_RTC_PERSISTENT3_GENERAL 0xFFFFFFFF
#define BF_RTC_PERSISTENT3_GENERAL(v) (v)
#define HW_RTC_PERSISTENT4 (0x000000a0)
#define HW_RTC_PERSISTENT4_SET (0x000000a4)
#define HW_RTC_PERSISTENT4_CLR (0x000000a8)
#define HW_RTC_PERSISTENT4_TOG (0x000000ac)
#define BP_RTC_PERSISTENT4_GENERAL 0
#define BM_RTC_PERSISTENT4_GENERAL 0xFFFFFFFF
#define BF_RTC_PERSISTENT4_GENERAL(v) (v)
#define HW_RTC_PERSISTENT5 (0x000000b0)
#define HW_RTC_PERSISTENT5_SET (0x000000b4)
#define HW_RTC_PERSISTENT5_CLR (0x000000b8)
#define HW_RTC_PERSISTENT5_TOG (0x000000bc)
#define BP_RTC_PERSISTENT5_GENERAL 0
#define BM_RTC_PERSISTENT5_GENERAL 0xFFFFFFFF
#define BF_RTC_PERSISTENT5_GENERAL(v) (v)
#define HW_RTC_DEBUG (0x000000c0)
#define HW_RTC_DEBUG_SET (0x000000c4)
#define HW_RTC_DEBUG_CLR (0x000000c8)
#define HW_RTC_DEBUG_TOG (0x000000cc)
#define BP_RTC_DEBUG_RSVD0 2
#define BM_RTC_DEBUG_RSVD0 0xFFFFFFFC
#define BF_RTC_DEBUG_RSVD0(v) \
(((v) << 2) & BM_RTC_DEBUG_RSVD0)
#define BM_RTC_DEBUG_WATCHDOG_RESET_MASK 0x00000002
#define BM_RTC_DEBUG_WATCHDOG_RESET 0x00000001
#define HW_RTC_VERSION (0x000000d0)
#define BP_RTC_VERSION_MAJOR 24
#define BM_RTC_VERSION_MAJOR 0xFF000000
#define BF_RTC_VERSION_MAJOR(v) \
(((v) << 24) & BM_RTC_VERSION_MAJOR)
#define BP_RTC_VERSION_MINOR 16
#define BM_RTC_VERSION_MINOR 0x00FF0000
#define BF_RTC_VERSION_MINOR(v) \
(((v) << 16) & BM_RTC_VERSION_MINOR)
#define BP_RTC_VERSION_STEP 0
#define BM_RTC_VERSION_STEP 0x0000FFFF
#define BF_RTC_VERSION_STEP(v) \
(((v) << 0) & BM_RTC_VERSION_STEP)
#endif /* __ARCH_ARM___RTC_H */

View File

@@ -134,6 +134,16 @@ static struct platform_device mxs_mmc[] = {
};
#endif
#if defined(CONFIG_MXS_WATCHDOG) || defined(CONFIG_MXS_WATCHDOG_MODULE)
static struct platform_device mxs_wdt = {
.name = "mxs-wdt",
.id = 0,
.dev = {
.release = mxs_nop_release,
},
};
#endif
static struct mxs_dev_lookup dev_lookup[] = {
#if defined(CONFIG_SERIAL_MXS_DUART) || \
defined(CONFIG_SERIAL_MXS_DUART_MODULE)
@@ -157,7 +167,15 @@ static struct mxs_dev_lookup dev_lookup[] = {
.name = "mxs-mmc",
.size = ARRAY_SIZE(mxs_mmc),
.pdev = mxs_mmc,
}
},
#endif
#if defined(CONFIG_MXS_WATCHDOG) || defined(CONFIG_MXS_WATCHDOG_MODULE)
{
.name = "mxs-wdt",
.size = 1,
.pdev = &mxs_wdt,
},
#endif
};

View File

@@ -14,44 +14,45 @@
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <mach/platform.h>
#include <mach/hardware.h>
#include <mach/regs-rtc.h>
#define DEFAULT_HEARTBEAT 19
#define MAX_HEARTBEAT (0x10000000 >> 6)
/* missing bitmask in headers */
#define BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER 0x80000000
#define BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER 0x80000000
#define WDT_IN_USE 0
#define WDT_OK_TO_CLOSE 1
#define WDOG_COUNTER_RATE 1000 /* 1 kHz clock */
static DEFINE_SPINLOCK(stmp3xxx_wdt_io_lock);
static unsigned long wdt_status;
static const int nowayout = WATCHDOG_NOWAYOUT;
static int heartbeat = DEFAULT_HEARTBEAT;
static unsigned long boot_status;
static unsigned long wdt_base;
static DEFINE_SPINLOCK(mxs_wdt_io_lock);
static void wdt_enable(u32 value)
{
spin_lock(&stmp3xxx_wdt_io_lock);
__raw_writel(value, REGS_RTC_BASE + HW_RTC_WATCHDOG);
__raw_writel(BM_RTC_CTRL_WATCHDOGEN, REGS_RTC_BASE + HW_RTC_CTRL_SET);
spin_lock(&mxs_wdt_io_lock);
__raw_writel(value, wdt_base + HW_RTC_WATCHDOG);
__raw_writel(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER,
REGS_RTC_BASE + HW_RTC_PERSISTENT1_SET);
spin_unlock(&stmp3xxx_wdt_io_lock);
wdt_base + HW_RTC_PERSISTENT1_SET);
__raw_writel(BM_RTC_CTRL_WATCHDOGEN, wdt_base + HW_RTC_CTRL_SET);
spin_unlock(&mxs_wdt_io_lock);
}
static void wdt_disable(void)
{
spin_lock(&stmp3xxx_wdt_io_lock);
spin_lock(&mxs_wdt_io_lock);
__raw_writel(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER,
REGS_RTC_BASE + HW_RTC_PERSISTENT1_CLR);
__raw_writel(BM_RTC_CTRL_WATCHDOGEN, REGS_RTC_BASE + HW_RTC_CTRL_CLR);
spin_unlock(&stmp3xxx_wdt_io_lock);
wdt_base + HW_RTC_PERSISTENT1_CLR);
__raw_writel(BM_RTC_CTRL_WATCHDOGEN, wdt_base + HW_RTC_CTRL_CLR);
spin_unlock(&mxs_wdt_io_lock);
}
static void wdt_ping(void)
@@ -59,7 +60,7 @@ static void wdt_ping(void)
wdt_enable(heartbeat * WDOG_COUNTER_RATE);
}
static int stmp3xxx_wdt_open(struct inode *inode, struct file *file)
static int mxs_wdt_open(struct inode *inode, struct file *file)
{
if (test_and_set_bit(WDT_IN_USE, &wdt_status))
return -EBUSY;
@@ -70,11 +71,11 @@ static int stmp3xxx_wdt_open(struct inode *inode, struct file *file)
return nonseekable_open(inode, file);
}
static ssize_t stmp3xxx_wdt_write(struct file *file, const char __user *data,
static ssize_t mxs_wdt_write(struct file *file, const char __user *data,
size_t len, loff_t *ppos)
{
if (len) {
if (!nowayout) {
if (WATCHDOG_NOWAYOUT == 0) {
size_t i;
clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
@@ -99,10 +100,10 @@ static struct watchdog_info ident = {
WDIOF_MAGICCLOSE |
WDIOF_SETTIMEOUT |
WDIOF_KEEPALIVEPING,
.identity = "STMP3XXX Watchdog",
.identity = "MXS Watchdog",
};
static long stmp3xxx_wdt_ioctl(struct file *file, unsigned int cmd,
static long mxs_wdt_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
void __user *argp = (void __user *)arg;
@@ -166,11 +167,11 @@ static long stmp3xxx_wdt_ioctl(struct file *file, unsigned int cmd,
return ret;
}
static int stmp3xxx_wdt_release(struct inode *inode, struct file *file)
static int mxs_wdt_release(struct inode *inode, struct file *file)
{
int ret = 0;
if (!nowayout) {
if (WATCHDOG_NOWAYOUT == 0) {
if (!test_bit(WDT_OK_TO_CLOSE, &wdt_status)) {
wdt_ping();
pr_debug("%s: Device closed unexpectdly\n", __func__);
@@ -185,50 +186,57 @@ static int stmp3xxx_wdt_release(struct inode *inode, struct file *file)
return ret;
}
static const struct file_operations stmp3xxx_wdt_fops = {
static const struct file_operations mxs_wdt_fops = {
.owner = THIS_MODULE,
.llseek = no_llseek,
.write = stmp3xxx_wdt_write,
.unlocked_ioctl = stmp3xxx_wdt_ioctl,
.open = stmp3xxx_wdt_open,
.release = stmp3xxx_wdt_release,
.write = mxs_wdt_write,
.unlocked_ioctl = mxs_wdt_ioctl,
.open = mxs_wdt_open,
.release = mxs_wdt_release,
};
static struct miscdevice stmp3xxx_wdt_miscdev = {
static struct miscdevice mxs_wdt_miscdev = {
.minor = WATCHDOG_MINOR,
.name = "watchdog",
.fops = &stmp3xxx_wdt_fops,
.fops = &mxs_wdt_fops,
};
static int __devinit stmp3xxx_wdt_probe(struct platform_device *pdev)
static int __devinit mxs_wdt_probe(struct platform_device *pdev)
{
int ret = 0;
struct resource *res;
if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
heartbeat = DEFAULT_HEARTBEAT;
boot_status = __raw_readl(REGS_RTC_BASE + HW_RTC_PERSISTENT1) &
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL)
return -ENODEV;
wdt_base = (unsigned long)IO_ADDRESS(res->start);
boot_status = __raw_readl(wdt_base + HW_RTC_PERSISTENT1) &
BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER;
boot_status = !!boot_status;
__raw_writel(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER,
REGS_RTC_BASE + HW_RTC_PERSISTENT1_CLR);
wdt_base + HW_RTC_PERSISTENT1_CLR);
wdt_disable(); /* disable for now */
ret = misc_register(&stmp3xxx_wdt_miscdev);
ret = misc_register(&mxs_wdt_miscdev);
if (ret < 0) {
dev_err(&pdev->dev, "cannot register misc device\n");
return ret;
}
printk(KERN_INFO "stmp3xxx watchdog: initialized, heartbeat %d sec\n",
printk(KERN_INFO "mxs watchdog: initialized, heartbeat %d sec\n",
heartbeat);
return ret;
}
static int __devexit stmp3xxx_wdt_remove(struct platform_device *pdev)
static int __devexit mxs_wdt_remove(struct platform_device *pdev)
{
misc_deregister(&stmp3xxx_wdt_miscdev);
misc_deregister(&mxs_wdt_miscdev);
return 0;
}
@@ -236,55 +244,54 @@ static int __devexit stmp3xxx_wdt_remove(struct platform_device *pdev)
static int wdt_suspended;
static u32 wdt_saved_time;
static int stmp3xxx_wdt_suspend(struct platform_device *pdev,
static int mxs_wdt_suspend(struct platform_device *pdev,
pm_message_t state)
{
if (__raw_readl(REGS_RTC_BASE + HW_RTC_CTRL) &
BM_RTC_CTRL_WATCHDOGEN) {
wdt_suspended = 1;
wdt_saved_time = __raw_readl(REGS_RTC_BASE + HW_RTC_WATCHDOG);
if (__raw_readl(wdt_base + HW_RTC_CTRL) & BM_RTC_CTRL_WATCHDOGEN) {
wdt_saved_time = __raw_readl(wdt_base + HW_RTC_WATCHDOG);
wdt_disable();
wdt_suspended = 1;
}
return 0;
}
static int stmp3xxx_wdt_resume(struct platform_device *pdev)
static int mxs_wdt_resume(struct platform_device *pdev)
{
if (wdt_suspended) {
wdt_enable(wdt_saved_time);
wdt_suspended = 0;
wdt_enable(wdt_saved_time);
}
return 0;
}
#else
#define stmp3xxx_wdt_suspend NULL
#define stmp3xxx_wdt_resume NULL
#define mxs_wdt_suspend NULL
#define mxs_wdt_resume NULL
#endif
static struct platform_driver platform_wdt_driver = {
static struct platform_driver mxs_wdt_driver = {
.driver = {
.name = "stmp3xxx_wdt",
.name = "mxs-wdt",
},
.probe = stmp3xxx_wdt_probe,
.remove = __devexit_p(stmp3xxx_wdt_remove),
.suspend = stmp3xxx_wdt_suspend,
.resume = stmp3xxx_wdt_resume,
.probe = mxs_wdt_probe,
.remove = __devexit_p(mxs_wdt_remove),
.suspend = mxs_wdt_suspend,
.resume = mxs_wdt_resume,
};
static int __init stmp3xxx_wdt_init(void)
static int __init mxs_wdt_init(void)
{
return platform_driver_register(&platform_wdt_driver);
return platform_driver_register(&mxs_wdt_driver);
}
static void __exit stmp3xxx_wdt_exit(void)
static void __exit mxs_wdt_exit(void)
{
return platform_driver_unregister(&platform_wdt_driver);
return platform_driver_unregister(&mxs_wdt_driver);
}
module_init(stmp3xxx_wdt_init);
module_exit(stmp3xxx_wdt_exit);
module_init(mxs_wdt_init);
module_exit(mxs_wdt_exit);
MODULE_DESCRIPTION("STMP3XXX Watchdog Driver");
MODULE_DESCRIPTION("MXS Watchdog Driver");
MODULE_LICENSE("GPL");
module_param(heartbeat, int, 0);