ENGR00125052-1 Common codes changes when enable the eMMC44 DDR

The modifications of linux kernel common codes
when enable the eMMC44 DDR mode

Signed-off-by: Richard Zhu <r65037@freescale.com>
This commit is contained in:
Richard Zhu
2010-07-12 17:31:44 +08:00
committed by Matt Sealey
parent f15e9558f7
commit b6c9ffc709
4 changed files with 29 additions and 3 deletions

View File

@@ -121,7 +121,7 @@ static int mmc_decode_csd(struct mmc_card *card)
* v1.2 has extra information in bits 15, 11 and 10.
*/
csd_struct = UNSTUFF_BITS(resp, 126, 2);
if (csd_struct != 1 && csd_struct != 2) {
if (csd_struct < 1 || csd_struct > 3) {
printk(KERN_ERR "%s: unrecognised CSD structure version %d\n",
mmc_hostname(card->host), csd_struct);
return -EINVAL;
@@ -226,7 +226,13 @@ static int mmc_read_ext_csd(struct mmc_card *card)
mmc_card_set_blockaddr(card);
}
card->ext_csd.card_type = ext_csd[EXT_CSD_CARD_TYPE];
switch (ext_csd[EXT_CSD_CARD_TYPE]) {
case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52
| EXT_CSD_CARD_TYPE_26:
card->ext_csd.hs_max_dtr = 52000000;
break;
case EXT_CSD_CARD_TYPE_52 | EXT_CSD_CARD_TYPE_26:
card->ext_csd.hs_max_dtr = 52000000;
break;
@@ -238,6 +244,8 @@ static int mmc_read_ext_csd(struct mmc_card *card)
printk(KERN_WARNING "%s: card is mmc v4 but doesn't "
"support any high-speed modes.\n",
mmc_hostname(card->host));
printk(KERN_WARNING "%s: card type is 0x%x\n",
mmc_hostname(card->host), ext_csd[EXT_CSD_CARD_TYPE]);
goto out;
}
@@ -434,10 +442,21 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
* Activate wide bus (if supported).
*/
if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) {
(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA
| MMC_CAP_DATA_DDR))) {
unsigned ext_csd_bit, bus_width;
if (host->caps & MMC_CAP_8_BIT_DATA) {
if ((host->caps & MMC_CAP_8_BIT_DATA) &&
(host->caps & MMC_CAP_DATA_DDR) &&
(card->ext_csd.card_type & MMC_DDR_MODE_MASK)) {
ext_csd_bit = EXT_CSD_BUS_WIDTH_8_DDR;
bus_width = MMC_BUS_WIDTH_8 | MMC_BUS_WIDTH_DDR;
} else if ((host->caps & MMC_CAP_4_BIT_DATA) &&
(host->caps & MMC_CAP_DATA_DDR) &&
(card->ext_csd.card_type & MMC_DDR_MODE_MASK)) {
ext_csd_bit = EXT_CSD_BUS_WIDTH_4_DDR;
bus_width = MMC_BUS_WIDTH_4 | MMC_BUS_WIDTH_DDR;
} else if (host->caps & MMC_CAP_8_BIT_DATA) {
ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
bus_width = MMC_BUS_WIDTH_8;
} else {

View File

@@ -42,6 +42,8 @@ struct mmc_csd {
struct mmc_ext_csd {
unsigned int hs_max_dtr;
unsigned int sectors;
unsigned int card_type;
#define MMC_DDR_MODE_MASK (0x3<<2)
};
struct sd_scr {

View File

@@ -42,6 +42,7 @@ struct mmc_ios {
#define MMC_BUS_WIDTH_1 0
#define MMC_BUS_WIDTH_4 2
#define MMC_BUS_WIDTH_8 3
#define MMC_BUS_WIDTH_DDR 8
unsigned char timing; /* timing specification used */
@@ -118,6 +119,7 @@ struct mmc_host {
#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
#define MMC_CAP_DATA_DDR (1 << 7) /* Can the host do ddr transfers */
/* host specific block data */
unsigned int max_seg_size; /* see blk_queue_max_segment_size */

View File

@@ -265,10 +265,13 @@ struct _mmc_csd {
#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
#define EXT_CSD_CARD_TYPE_DDR_52 (2<<1) /* Card can run at DDR 52MHz */
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
#define EXT_CSD_BUS_WIDTH_4_DDR 5 /* Card is in 4 bit ddr mode */
#define EXT_CSD_BUS_WIDTH_8_DDR 6 /* Card is in 8 bit ddr mode */
/*
* MMC_SWITCH access modes