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ENGR00125052-1 Common codes changes when enable the eMMC44 DDR
The modifications of linux kernel common codes when enable the eMMC44 DDR mode Signed-off-by: Richard Zhu <r65037@freescale.com>
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@@ -121,7 +121,7 @@ static int mmc_decode_csd(struct mmc_card *card)
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* v1.2 has extra information in bits 15, 11 and 10.
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*/
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csd_struct = UNSTUFF_BITS(resp, 126, 2);
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if (csd_struct != 1 && csd_struct != 2) {
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if (csd_struct < 1 || csd_struct > 3) {
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printk(KERN_ERR "%s: unrecognised CSD structure version %d\n",
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mmc_hostname(card->host), csd_struct);
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return -EINVAL;
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@@ -226,7 +226,13 @@ static int mmc_read_ext_csd(struct mmc_card *card)
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mmc_card_set_blockaddr(card);
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}
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card->ext_csd.card_type = ext_csd[EXT_CSD_CARD_TYPE];
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switch (ext_csd[EXT_CSD_CARD_TYPE]) {
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case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52
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| EXT_CSD_CARD_TYPE_26:
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card->ext_csd.hs_max_dtr = 52000000;
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break;
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case EXT_CSD_CARD_TYPE_52 | EXT_CSD_CARD_TYPE_26:
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card->ext_csd.hs_max_dtr = 52000000;
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break;
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@@ -238,6 +244,8 @@ static int mmc_read_ext_csd(struct mmc_card *card)
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printk(KERN_WARNING "%s: card is mmc v4 but doesn't "
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"support any high-speed modes.\n",
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mmc_hostname(card->host));
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printk(KERN_WARNING "%s: card type is 0x%x\n",
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mmc_hostname(card->host), ext_csd[EXT_CSD_CARD_TYPE]);
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goto out;
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}
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@@ -434,10 +442,21 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
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* Activate wide bus (if supported).
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*/
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if ((card->csd.mmca_vsn >= CSD_SPEC_VER_4) &&
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(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA))) {
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(host->caps & (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA
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| MMC_CAP_DATA_DDR))) {
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unsigned ext_csd_bit, bus_width;
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if (host->caps & MMC_CAP_8_BIT_DATA) {
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if ((host->caps & MMC_CAP_8_BIT_DATA) &&
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(host->caps & MMC_CAP_DATA_DDR) &&
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(card->ext_csd.card_type & MMC_DDR_MODE_MASK)) {
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ext_csd_bit = EXT_CSD_BUS_WIDTH_8_DDR;
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bus_width = MMC_BUS_WIDTH_8 | MMC_BUS_WIDTH_DDR;
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} else if ((host->caps & MMC_CAP_4_BIT_DATA) &&
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(host->caps & MMC_CAP_DATA_DDR) &&
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(card->ext_csd.card_type & MMC_DDR_MODE_MASK)) {
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ext_csd_bit = EXT_CSD_BUS_WIDTH_4_DDR;
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bus_width = MMC_BUS_WIDTH_4 | MMC_BUS_WIDTH_DDR;
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} else if (host->caps & MMC_CAP_8_BIT_DATA) {
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ext_csd_bit = EXT_CSD_BUS_WIDTH_8;
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bus_width = MMC_BUS_WIDTH_8;
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} else {
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@@ -42,6 +42,8 @@ struct mmc_csd {
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struct mmc_ext_csd {
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unsigned int hs_max_dtr;
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unsigned int sectors;
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unsigned int card_type;
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#define MMC_DDR_MODE_MASK (0x3<<2)
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};
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struct sd_scr {
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@@ -42,6 +42,7 @@ struct mmc_ios {
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#define MMC_BUS_WIDTH_1 0
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#define MMC_BUS_WIDTH_4 2
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#define MMC_BUS_WIDTH_8 3
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#define MMC_BUS_WIDTH_DDR 8
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unsigned char timing; /* timing specification used */
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@@ -118,6 +119,7 @@ struct mmc_host {
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#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
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#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
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#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
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#define MMC_CAP_DATA_DDR (1 << 7) /* Can the host do ddr transfers */
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/* host specific block data */
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unsigned int max_seg_size; /* see blk_queue_max_segment_size */
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@@ -265,10 +265,13 @@ struct _mmc_csd {
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#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */
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#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */
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#define EXT_CSD_CARD_TYPE_DDR_52 (2<<1) /* Card can run at DDR 52MHz */
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
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#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
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#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
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#define EXT_CSD_BUS_WIDTH_4_DDR 5 /* Card is in 4 bit ddr mode */
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#define EXT_CSD_BUS_WIDTH_8_DDR 6 /* Card is in 8 bit ddr mode */
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/*
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* MMC_SWITCH access modes
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