Such an old version of BFS is not maintained and while it gave us some
noticable benefits, it is not worth dealing with the problems it could
cause.
This reverts commit 469d88e87d.
Such an old version of BFS is not maintained and while it gave us some
noticable benefits, it is not worth dealing with the problems it could
cause.
This reverts commit 4259e4284d.
May be some more cleanups with this, it is not clear which tuners and devices
relate to each other so some drivers may be being built without dependent
tuners - V4L2 is such a mess. Either way this cuts down build time and install
footprint and affects practically nobody.
May be some more cleanups with this, it is not clear which tuners and devices
relate to each other so some drivers may be being built without dependent
tuners - V4L2 is such a mess. Either way this cuts down build time and install
footprint and affects practically nobody.
The AMD gpu driver memory manager is stupid to allocating
a memory block from the first free block. Neither check the
best fit free block. Here just add a little codes to
let allocation to find a best size fitted free block.
To avoid memory fragement.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
increase max process number to fix gsl_kmod open issue
Signed-off-by: xianzhong <b07117@freescale.com>
Signed-off-by: Richard Liu <r66033@freescale.com>
Conflicts:
drivers/mxc/amd-gpu/include/gsl_buildconfig.h
When kernel_preempt not enable in configure, system bootup hangs
in sdma initialization.
This is caused by sdma initialization waiting for channel0 complete loading
script in queue, and arch_idle happens with action to disable some clocks,
if DDR clock disabled, script loading will failed and SoC hangs.
Solve it by make sure DDR clock is enabled during sdma initialization.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
If the internal clock is deadly accurate for the desired mode, that will be used instead
(the accuracy is set to within 1/200th which is well within VESA standards of 1/50th) to
save power.
efikamx changes: for HDMI, try external clock when necessary. For LVDS, don't since there
is some weird clock mess with the binary blob for the LCD panels in the mtl017 driver
which we think is derived from the lack of external clock support in more ancient kernels.
It is fudging the values to both correct some kind of panel EDID bug and also to fix the
potential deviation in clock, but since it's a binary blob it's kind of hard to change.
* improve clock accuracy check from 1/16 to 1/200 of intended clock rate
* properly round pixel clock to the parent and not against a hardcoded 150MHz max rate
* properly fix di external clock divisor to a maximum of 8
